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15.2. Main Block Diagram
SU
SD
TH-50PV30E
Main Block Diagram
S.R.
C12
C13
S.R
64
S.R
64
SC12
SC13
SC2 SC23
S.R
SC20
64
CONTROL
S.R
PULSE
64
S.R
64
INITIALIZE
S.R
PULSE
64
SCAN
S.R
VOLTAGE
64
S.R
64
SC
S.R
64
SC62
S.R
64
S.R
64
T
MAIN
T10
TUNER
S.R
64
H10
AUDIO
OUT
AV1
AV2
AV4
H
C6
C62
S.R.
S.R.
S.R.
S.R.
C1
D
SYNC PROCESSOR/
D20
DISCHARGE
CONTROL
MAIN MPU
SUB MPU
VD
HD
A/D
D3
HEADPHONE
G5
PC IN
G18
DG18
KEYSCAN
G7
DG7
VIDEO3
G
H9
H1
DG1
MSP
AV
H4
DG4
SWITCH
S.R.
S.R.
S.R.
S.R.
C10
C20
C22
C11
C24
HD/VD
CONTROL
ROM
FORMAT
CONVERTER
24bit
RGB
BUS
PROCESSOR
SDRAM
CONVERT
MICOM
MICOM
TEXT
EEPROM
SDRAM
RGB/PC
GC2M
RGB AMP
SELECT
GC2S
DG
TV ON
SDRAM
C54
C5
C61
C52
C60
C50
S.R.
S.R.
S.R.
S.R.
C21
C23
C2
C25
D31
D32
PLASMA AI
SUB-FIELD
PROCESSOR
SDRAM
ROM
SDRAM
PLASMA AI
SUB-FIELD
PROCESSOR
D34
D33
DG10
DG3
DG2
DG6
C55
C53
C51
S.R.
76
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