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DM9161BI
Layout Guide
DM9161BI
Layout Guide
Version: 1.0
Technical Reference Manual
Davicom Semiconductor, Inc
April 10, 2008
Version: DM9161BI-LG-V10
1
April 10, 2008

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Summary of Contents for Davicom DM9161BI

  • Page 1 DM9161BI Layout Guide DM9161BI Layout Guide Version: 1.0 Technical Reference Manual Davicom Semiconductor, Inc April 10, 2008 Version: DM9161BI-LG-V10 April 10, 2008...
  • Page 2 Layout Guide 1. Placement, Signal and Trace Routing • Place the 10/100M magnetic as close as possible to the DM9161BI (no more than 20mm) and to the RJ-45 connector. • Place the termination resistors 50Ω as close as possible to the 10/100M magnetic and the DM9161BI RX±...
  • Page 3 The RX± pair, TX± pair, clock, should be routed to have characteristic impedance of 50 Ohm. • Do not place the DM9161BI RX± receive pair across the TX± transmit pair. Keep the receive pair away from the transmit pair (no less than 3mm). It’s better to place ground plane between these two pairs of traces.
  • Page 4 Layout Guide 10Base-T/100Base-TX Application Figure 1-1 and 1-2 illustrate the two types of the specific magnetic interconnect and how to connect with Davicom DM9161BI. These magnetic are not pin-to-pin compatible. Please must be considered when using the DM9161BI in auto-MDIX mode.
  • Page 5: Power Supply Decoupling Capacitors

    The 0.1-0.01µF decoupling capacitor should be connected between each DVDD/DGND set and AVDD/AGND set and be placed as close as possible to the pins of DM9161BI. The conservative approach is to use two decoupling capacitors on each DVDD/DGND set and AVDD/AGND set. One 0.1µF is for low frequency noise, and the other 0.01µF is for high frequency noise on the power supply.
  • Page 6 • Ground plane need separate analog ground domain and digital ground domain, the analog ground domain and digital ground domain connected line is far away the AGND pins of DM9161BI (see Figure 4). • All AGND pins (pin 5, 6, 46) could not directly short each other (see Figure 3-3). It must be directly connected to analog ground domain (see Figure 3-2).
  • Page 7 EXCCL4532U or an equivalent. A 10µF, 0.1µF and 0.01µF electrolytic bypass capacitors should be connected between VDD and GND at the device side of each of the ferrite bead. • Should separate analog power planes from noisy logic power planes. Figure 4 Version: DM9161BI-LG-V10 April 10, 2008...
  • Page 8 ( Min ) 60 – 80 MHz Differential common dB ( Min ) 1 – 60 MHz mode rejection dB ( Min ) 60 – 100 MHz Transformer isolation 1500 Table 5-2: Magnetic Specification Requirements Version: DM9161BI-LG-V10 April 10, 2008...
  • Page 9 25 MHz +/- 0.01% Equivalent Series Resistance 25 ohms max Load Capacitance 22 pF type. Case Capacitance 7 pF max. Power Dissipation 1mW max. Table 6-1: Crystal Specifications 22pf 22pf AGND AGND Figure 6 Crystal Circuit Diagram Version: DM9161BI-LG-V10 April 10, 2008...
  • Page 10 • The length of the trace routing for the Media Independent Interface (MII) signals should be as short and direct as possible between the DM9161BI and MAC controller (Maximum shorter than 20cm). These MII signals are as follows, CRS, COL, TXD3, TXD2, TXD1, TXD0, TXEN, TXCLK, TXER RXER, RXCLK, RXDV, RXD0, RXD1, RXD2, RXD3, MDC, MDIO •...