Texas Instruments MSP430F67761 Manual
Hide thumbs Also See for MSP430F67761:

Advertisement

Quick Links

www.ti.com
Errata
MSP430F67761 Microcontroller
This document describes the known exceptions to the functional specifications (advisories).
1 Functional Advisories............................................................................................................................................................
2 Preprogrammed Software Advisories..................................................................................................................................
3 Debug Only Advisories..........................................................................................................................................................
4 Fixed by Compiler Advisories...............................................................................................................................................
5 Nomenclature, Package Symbolization, and Revision Identification................................................................................
Nomenclature.........................................................................................................................................................4
Markings..............................................................................................................................................................4
5.3 Memory-Mapped Hardware Revision (TLV Structure).......................................................................................................
Descriptions............................................................................................................................................................6
7 Revision History...................................................................................................................................................................
SLAZ511AC - JANUARY 2013 - REVISED MAY 2021
Submit Document Feedback
ABSTRACT

Table of Contents

Copyright © 2021 Texas Instruments Incorporated
Table of Contents
26
MSP430F67761 Microcontroller
2
2
3
3
4
5
1

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the MSP430F67761 and is the answer not in the manual?

Questions and answers

Summary of Contents for Texas Instruments MSP430F67761

  • Page 1: Table Of Contents

    5 Nomenclature, Package Symbolization, and Revision Identification................5.1 Device Nomenclature.................................4 5.2 Package Markings................................4 5.3 Memory-Mapped Hardware Revision (TLV Structure)....................... 6 Advisory Descriptions................................6 7 Revision History................................... SLAZ511AC – JANUARY 2013 – REVISED MAY 2021 MSP430F67761 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 2: Functional Advisories

    Advisories that affect factory-programmed software. ✓ The check mark indicates that the issue is present in the specified revision. Errata Number ✓ BSL7 MSP430F67761 Microcontroller SLAZ511AC – JANUARY 2013 – REVISED MAY 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 3: Debug Only Advisories

    Options: Check -msilicon-errata= and -msilicon-errata-warn= options • MSP430 GCC User's Guide IAR Embedded Workbench • IAR workarounds for msp430 hardware issues SLAZ511AC – JANUARY 2013 – REVISED MAY 2021 MSP430F67761 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 4: Nomenclature, Package Symbolization, And Revision Identification

    XMS – Experimental device that is not necessarily representative of the final device's electrical specifications MSP – Fully qualified production device Support tool naming prefixes: X: Development-support product that has not yet completed Texas Instruments internal qualification testing. null: Fully-qualified development-support product. XMS devices and X development-support tools are shipped against the following disclaimer: "Developmental product is intended for internal evaluation purposes."...
  • Page 5: Memory-Mapped Hardware Revision (Tlv Structure)

    Further guidance on how to locate the TLV structure and read out the HW_ID can be found in the device User's Guide. SLAZ511AC – JANUARY 2013 – REVISED MAY 2021 MSP430F67761 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 6: Advisory Descriptions

    Category Functional Function ADC stops operating if ADC clock source is changed from SMCLK to another source while SMCLKOFF = 1. MSP430F67761 Microcontroller SLAZ511AC – JANUARY 2013 – REVISED MAY 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 7 Scenario 2: When a battery is connected to DVCC, AUXVCC1 or AUXVCC2 as the first voltage supply, due to the low internal resistance of the battery a very fast rise time is SLAZ511AC – JANUARY 2013 – REVISED MAY 2021 MSP430F67761 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 8 The feature in the BSL to keep the JTAG unlocked by setting the bit BSL_REQ_JTAG_OPEN in the return value has been disabled in this device. Workaround None COMP Module COMP10 Category Functional MSP430F67761 Microcontroller SLAZ511AC – JANUARY 2013 – REVISED MAY 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 9 CPU Module CPU22 Category Compiler-Fixed Function Indirect addressing mode with the Program Counter as the source register may produce unexpected results SLAZ511AC – JANUARY 2013 – REVISED MAY 2021 MSP430F67761 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 10 Example: Actual Code: mov #4,R4 LABEL mov #1,R5 dec R4 jnz LABEL MSP430F67761 Microcontroller SLAZ511AC – JANUARY 2013 – REVISED MAY 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 11 TI MSP430 Compiler Tools (Code v4.0.x or later or assembler flag option below. -- Composer Studio) silicon_errata=CPU40 MSP430 GNU Compiler (MSP430- Not affected GCC) SLAZ511AC – JANUARY 2013 – REVISED MAY 2021 MSP430F67761 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 12 MSP430 GNU Compiler (MSP430- User using POPM instruction in Not affected GCC) assembler is required to implement the above workaround manually. MSP430F67761 Microcontroller SLAZ511AC – JANUARY 2013 – REVISED MAY 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 13 2. Disable all DMA channels during read-modify-write instruction of specific module registers containing interrupts flags while these interrupts are activated. SLAZ511AC – JANUARY 2013 – REVISED MAY 2021 MSP430F67761 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 14 None. Use other conditional/advanced triggered breakpoints to halt the debugger right after Flash erase/write instructions. Note This erratum affects debug mode only. EEM Module EEM19 MSP430F67761 Microcontroller SLAZ511AC – JANUARY 2013 – REVISED MAY 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 15 LPMx.5 debug support feature is enabled. To avoid a potentially unreliable debug session or general issues with JTAG device connectivity and the resulting bad customer experience Texas Instruments has chosen to remove the LPMx.5 debug support feature from common MSP430 IDEs including TIs Code Composer Studio 6.1.0 with msp430.emu updated to version 6.1.0.7 and IARs Embedded Workbench...
  • Page 16 LCD-controller and internal voltage generation. Workaround Do not modify VLCDx and/or LCDCPEN bits in LCDCVCTL register while LCDON = '1' PMM Module PMM11 Category Functional MSP430F67761 Microcontroller SLAZ511AC – JANUARY 2013 – REVISED MAY 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 17 (SVSMLCTL.SVSLFP=0). This provides a settling time delay of approximately 150us allowing the core sufficient time to increase to the expected voltage before the delay expires. SLAZ511AC – JANUARY 2013 – REVISED MAY 2021 MSP430F67761 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 18 -The SVSH/SVMH module is configured to transition from Normal mode to an OFF state when moving from Active/LPM0/LPM1 into LPM2/LPM3/LPM4 modes. The affected SVSMHCTL register settings are shaded in the following table. MSP430F67761 Microcontroller SLAZ511AC – JANUARY 2013 – REVISED MAY 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 19 1; // SVSH affected configurations if ((SVSMHCTL & SVMHE) && (!(SVSMHCTL & SVMHFP)) && (SVSMHCTL & SVSMHACE)) return 1; // SVMH affected configurations SLAZ511AC – JANUARY 2013 – REVISED MAY 2021 MSP430F67761 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 20 Device results in lock-up condition under one of the two scenarios below: 1) If RST pin is pulled low during write access to SVSMHCTL, with the RST/NMI pin MSP430F67761 Microcontroller SLAZ511AC – JANUARY 2013 – REVISED MAY 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 21 LPMx.5. Workaround None PORT Module PORT26 Category Functional Function Incorrect values for P1.1 / P1.2 input pins during power-up SLAZ511AC – JANUARY 2013 – REVISED MAY 2021 MSP430F67761 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 22 Use a controlled Vcc ramp to power up the device. UCS Module UCS11 Category Functional Function Modifying UCSCTL4 clock control register triggers an additional erroneous clock request MSP430F67761 Microcontroller SLAZ511AC – JANUARY 2013 – REVISED MAY 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 23 When eUSCIA is configured in SPI mode, the UCBUSY bit might get stuck to 1 or start toggling after transmission is completed. This happens in all four combinations of Clock SLAZ511AC – JANUARY 2013 – REVISED MAY 2021 MSP430F67761 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 24 UCCKPL = 1) before SPI slave is reset (UCSWRST bit is cleared). For eUSCI_A: to detect communication failure condition where UCRXIFG is not set, check MSP430F67761 Microcontroller SLAZ511AC – JANUARY 2013 – REVISED MAY 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 25 UCxSTE transitioning to the master-inactive state, the data must be rewritten into UCxTXBUF to be transferred when UCxSTE transitions back to the master-active state. SLAZ511AC – JANUARY 2013 – REVISED MAY 2021 MSP430F67761 Microcontroller Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 26: Revision History

    Page • Changed the document format and structure; updated the numbering format for tables, figures, and cross references throughout the document........................6 MSP430F67761 Microcontroller SLAZ511AC – JANUARY 2013 – REVISED MAY 2021 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated...
  • Page 27 TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for TI products.IMPORTANT NOTICE Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265 Copyright © 2021, Texas Instruments Incorporated...

Table of Contents