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6. KS24L161
6-1. PIN CONFIGURATION
6-2. BLOCK DIAGRAM
SDA
WP
SCL
6-3. PIN DESCRIPTION
Name
Type
A0, A1,A3
-
No internal connection
V
-
Ground pin.
SS
Bi-directional data pin forthe I
SDA
I/O
open-drain output. An external pull-up resistor must be connected to V
for this pull-up resistor are 4.7KΩ(100kHz) and 1KΩ(400kHz).
SCL
Input
Schmitt tigger input pin for serial clock input.
Input pin for hardware write protection control. If you tie this pin to V
WP
Input
function is disabled to protect previously written data in the entire memory; if you tie it
to V
V
-
Single power supply.
CC
Vcc
A0
Start/Stop
Logic
Slave Address
Comparator
2
C-bus serial data interface. Schmitt tigger input and
, the write function is enabled.
SS
WP
SCL
SDA
KS24L161
A1
A2
Vss
Control Logic
Word Address
Row
Pointer
Decoder
D
and ACK
OUT
Description
3-38
HV Generation
Timing Control
EEPROM
Celt Array
2,048 x 8 Bits
Column Decoder
Data Register
Circuit Number
. Typical values
DD
, the write
CC
-
-
3
2
1
-
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Troubleshooting
