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FII-PRA006/010 Hardware Reference Guide
V1.2
FRASER INNOVATION INC

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hashemie
July 14, 2025

hello I bought this model board FII-PRA006. But when connected to the computer it is not recognized and does not show the board. Please help me how to program the board. Thanks

Summary of Contents for Fraser Innovation FII-PRA006

  • Page 1 FII-PRA006/010 Hardware Reference Guide V1.2 FRASER INNOVATION INC...
  • Page 2 FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc Version Control Version Description Date V1.0 06/25/2019 Initial Release V1.1 07/15/2019 Add Description About PCF8591 V1.2 07/19/2019 Add Description About Oscillator and IIC 1 / 38...
  • Page 3 Copyright Notice: © 2019 Fraser Innovation Inc ALL RIGHTS RESERVED Without written permission of Fraser Innovation Inc, no unit or individual may extract or modify part of or all the contents of this manual. Offenders will be held liable for their legal responsibility.
  • Page 4: Table Of Contents

    FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc Contents Introduction ............................. 5 Basic Features ..........................9 1)FPGA ..............................9 2)USB Interface ..........................9 3)Oscillator ............................12 4) Segment LED Display ......................13 5)VGA Interface ..........................16 6)EEPROM AT24C02 ........................20 7)Gigabit Ethernet Interface ....................22 8)Push Button ..........................
  • Page 5 FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc Fraser Innovation Inc develops FII-PRA006/010 based on Intel Cyclone10 development board. It was initial released in 2019. The model is PRA006/010. Although it is designed for FPGA beginners, this development board has been spent a lot on the schematics design, PCB design, and function creation.
  • Page 6: Introduction

    FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc 1. Introduction This development board uses Intel's Cyclone10 series chip, model 10CL006YE144C8G or 10CL010YE144C8G. The Cyclone10 series is Intel's latest generation of FPGAs for the data torrent of the future and the rapidly growing IoT application market. This series provides fast, power-saving processing and is suitable for automotive, industrial automation, professional audio and visual systems and a variety of applications.
  • Page 7 FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc Chip resource: Resource 10CL006 10CL010 Logic Elements (LE) 6,272 10,320 Block Memory Capacity(Kb) 18 x 18 Multiplier Clock Maximum I/O Maximum LVDS Figure 1.2 Chip Resource Other parameters: Working temperature:0~85℃ Core voltage:1.15~1.25V(Recommended voltage 1.2V)...
  • Page 8 FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc to achieve data display; 1-channel VGA interface to display colorful pictures or camera video; • 1 EEPROM chip with I2C interface, model AT24C02; • 1 adaptive 10M/100M/Gigabit Ethernet interface; • 5 push buttons, 4 for programmable buttons, 1 for reset button;...
  • Page 9 FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc Before using the development board, it is necessary to check whether the power supply and jtag mode jumpers are correct. J9 is the selection jumper for either internal or external program download (when this development board is used as the downloader).
  • Page 10: Basic Features

    FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc 2. Basic Features 1)FPGA As mentioned above, this development board FPGA model is 10CL006YE144C8G (PRA010 uses 10CL010YE144C8G), which is Intel's latest generation of low-power high-performance FPGA. Figure 2.1 FPGA Physical Picture 2)USB Interface It is a micro USB interface onboard that integrates power supply, program download and serial communication functions.
  • Page 11 FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc the power supply of the FPGA. When the USB cable (sold with the board as a set) is connected to the development board and the computer's USB port, the development board will work through the 5V power supply provided by the computer's USB interface, but instead of directly using the 5V level, the 5V voltage will be converted by the conversion chip to the required voltages such as 1.2V,...
  • Page 12 FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc Figure 2.4 Schematics of 3.3V Power Supply Figure 2.5 Schematics of 2.5V Power Supply Figure 2.6 Schematics of 1.2V Power Supply If we look at the power supply of the FPGA, we can see these kinds of voltages:...
  • Page 13: 3)Oscillator

    FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc Figure 2.7 Pins of FPGA Power Supply In Figure 2.7, VCCD_PLL1_37, VCCD_PLL2_109 are the power supply pins of the FPGA phase-locked loop(PLL), and the following numbers 37, 109 are their pin numbers on the FPGA. VCCINT is the core voltage of the FPGA (the other power supply parts of the FPGA are not listed, please refer to the attached schematics for details).
  • Page 14: Segment Led Display

    FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc One on-board oscillators for 50MHz. The clock input is connected to the pin 91 of the FPGA. The schematic is as follows: Figure 3.1 Schematics of Oscillators Figure 3.2 Oscillators Physical Picture Pin Assignment...
  • Page 15 FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc One type of digital tube is a semiconductor light-emitting device. The segment decoder can be divided into a seven-segment decoder and an eight- segment decoder. The difference is that the eight-segment decoder has one more unit for displaying the decimal point, the basic unit is a light-emitting diode.
  • Page 16 FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc Figure 4.4 Schematic of Segment Decoders The six-in-one decoder is a dynamic display. Due to the persistence of human vision and the afterglow effect of the LED, although the decoders are not lit at the same time, if the scanning speed is fast enough, the impression of human eyes is a group of stable display data, no flickering can be noticed.
  • Page 17: 5)Vga Interface

    FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc Signal Name FPGA Pin Description SEG PA Segment A SEG PB Segment B SEG PC Segment C SEG PD Segment D SEG PE Segment E SEG PF Segment F SEG PG Segment G...
  • Page 18 FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc which are 0~0.714V peak-peak, 0V is colorless, and 0.714V is full color. Some non- standard displays use a full color level of 1Vpp. Figure 5.1 Schematics of VGA The three primary color source and terminal matching resistors are both 75 ohms.
  • Page 19 FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc The development board selects the 4:4:4 mode, that is, 4 bits for red, 4 bits for green, and 4 bits for blue. The following takes red 4 bits to illustrate the selection of the resistor.
  • Page 20 FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc Figure 5.4 VGA Weight Resistance Network Figure 5.5 VGA Interface Physical Picture VGA Pin Assignment Signal Name FPGA Pin Description Horizontal Synchronous VGA HS Signal VGA VS Vertical Synchronous Signal VGA R0 Red[0]...
  • Page 21: 6)Eeprom At24C02

    FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc VGA R2 Red[2] VGA R3 Red[3] VGA G0 Green[0] VGA G1 Green[1] VGA G2 Green[2] VGA G3 Green[3] VGA B0 Blue[0] VGA B1 Blue[1] VGA B2 Blue[2] VGA B3 Blue[3] 6)EEPROM AT24C02 EEPROM is generally used in the instrumentation design. It is often used as a storage for some parameters.
  • Page 22 FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc The onboard EEPROM is designed to learn how the IIC bus communicates. See Figure for the schematics. Figure 6.1 Schematics of EEPROM Physical Picture This chip is located on the back of the development board, Figure is the physical picture.
  • Page 23: 7)Gigabit Ethernet Interface

    FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc 7)Gigabit Ethernet Interface Ethernet is currently the most commonly used data communication method. Ethernet is getting faster and faster from the initial 10Mb/s to the later 100Mb/s, and to 1000Mb/s now. The development board is equipped with an RTL8211E Gigabit Ethernet chip.
  • Page 24 FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc Support crossover detection and auto-correction • Support half-duplex, full-duplex operation • 1000 MHz communication CAT 5 network cable can reach 100m • RGMII interface supports 3.3V, 2.5V, 1.8V, 1.5V signals • LED indications for three network states are available •...
  • Page 25 FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc Figure 7.1 Schematics of Gigabit Ethernet Chip Figure 7.2 Gigabit Ethernet Physical Picture Gigabit ethernet pin assignment Signal Name FPGA Pin RG0_RXCTL RG0_RX0 RG0_RX1 RG0_RX2 RG0_RX3 RG0_RXCK RG0_TXCK RG0_TX0 RG0_TX1 RG0_TX2 RG0_TX3 RG0_TXCTL...
  • Page 26: 8)Push Button

    FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc 8)Push Button The development board has 5 push buttons, 4 of which are programmable buttons and 1 is for system reset. The default is set high and can be pressed low. Schematics is shown in Figure 8.1.
  • Page 27: 9)Ad/Da Thermistor, Photoresistor And Potentiometer

    FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc Signal Name FPGA Pin Description left right down 9)AD/DA Thermistor, Photoresistor and Potentiometer The PCF8591 chip is a monolithically integrated, individually powered, low power consuming, 8-bit CMOS data acquisition device. It has 4 analog inputs, 1 analog output, and 1 serial I2C bus interface.
  • Page 28 FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc Max sampling rate given by I2C bus speed • 4 analog inputs configurable as single ended or differential inputs • Auto-incremented channel selection • Analog voltage ranges from VSS to VDD • On-chip track and hold circuit •...
  • Page 29: 10)Dip Switch

    FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc Figure 9.2 PCF8591 Physical Picture Figure 9.3 Potentiometer, Photoresistor, and Thermistor PCF8591 pin assignment Signal Name FPGA Pin ADDA_I2C_SAD ADDA_I2C_SCL 10)DIP Switch The 8-bit DIP switch is onboard, which share the pins of the FPGA with the 8-...
  • Page 30 FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc bit LEDs. The FPGA pin gets high when the DIP switch is turned on. The schematics is shown as follows: Figure 10.1 Schematics of DIP Switches Figure 10.2 DIP Switches Physical Picture Note that the number marked on the device, 1-8, is not the number in the circuit design.
  • Page 31: 11)Led

    FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc SW2_LED2 Third from right to left SW3_LED3 Fourth from right to left SW4_LED4 Fifth from right to left SW5_LED5 Sixth from right to left SW6_LED6 Seventh from right to left SW7_LED7 Eighth from right to left 11)LED...
  • Page 32 FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc FPGA and is not controlled by the switch. The schematic is shown in Figure 11.1. Figure 11.1 Schematics of LED Figure 11.2 8-bit LED Physical Picture LED pin assignment Signal Name FPGA pin...
  • Page 33: 12)Flash Configuration Chip

    FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc SW6_LED6 Seventh from right to left SW7_LED7 Eighth from right to left 12)FLASH Configuration Chip The N25Q128A is a serial FLASH chip with a capacity of 128Mbit, which is more than enough for storing programs in the FPGA. Figure 12.1...
  • Page 34 FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc The development board reserves two GPIO interfaces, P1 and P2. The P1 interface contains 6 standard IO pin PFGA resources, 2 GND signals, and 2 adjustable power signals. The P2 interface contains 3 pairs of LVDS signals, which can also be used as 6 standard IOs;...
  • Page 35 FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc Signal Name FPGA Pin Description P1-1/standard IO P1-2/ standard IO P1-3/ standard IO P1-4/ standard IO P1-5/GND P1-6/VCC P1-7/ standard IO P1-8/ standard IO P1-9/ standard IO P1-10/ standard IO P1-11/GND P1-12/VCC IO8_P...
  • Page 36: 14)Jtag Interface

    FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc 14)JTAG Interface PRA006/010 can be used as a full-featured development board or as a JTAG adapter. When used as a development board, as described in the introduction to this document, you need to connect the J9 jumper to the "INT" position so that the USB can download the program for the board FPGA;...
  • Page 37 FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc JTAG pin 2 20(TDO) JTAG pin 3 JTAG pin 4 18(TMS) JTAG pin 5 JTAG pin 6 SRST JTAG pin 7 JTAG pin 8 15(TDI) JTAG pin 9 JTAG pin 10 36 / 38...
  • Page 38: References

    FII-PRA006/010 Hardware Reference Guide Fraser Innovation Inc 3. References 1. http://www.mouser.com/ds/2/149/NDS331N-116501.pdf 2. https://www.mouser.com/ds/2/268/atmel_doc0180-1065439.pdf 3. https://www.nxp.com/docs/en/data-sheet/PCF8591.pdf 4. https://www.macronix.com/Lists/ApplicationNote/Attachments/1947/AN0244V1%20 -%20Comparing%20Micron%20N25Q128A%20with%20Macronix%20MX25U12835F.pdf 37 / 38...

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