Sony SMP-N100 Service Manual page 39

W21 VCCK Power
W23 VCCK Power
W25 VCCK Power
W27 VCCK_PWM Power
W29 VCCK Power
W31 VCCK Power
W35 VCC2IO Power
W37 B_RDQ18 I/O
W39 B_RDQ21 I/O
W41 B_RDQS2 I/O
W43 B_RDQS2_ I/O
Y2 FE_RFIP Analog Input
Y4 FE_RFIN Analog Input
Y6 FE_LVDS_1N Analog Output
Y8 FE_AGND Analog Ground
Y10 FE_DVDD12I Digital Power (1.2V)
Y14 DVSS Ground
Y20 VCCK Power
Y22 DVSS Ground
Y24 DVSS Ground
Y26 DVSS Ground
Y28 DVSS Ground
Y30 DVSS Ground
Y32 VCCK Power
Y36 B_RDQ23 I/O
Y38 B_RDQ16 I/O
Y40 B_RDQ20 I/O
Y42 B_RDQ22 I/O
AA1
FE_LVDS_2P Analog Output
AA3 FE_LVDS_2N Analog Output
AA5
FE_LVDS_1P Analog Output
AA7 FE_AGND Analog Ground
AA9 FE_AVDD33_lvds Analog Power (3.3V)
AA21 DVSS Ground
AA23 VCCK Power
AA25 VCCK Power
AA27 VCCK Power
AA29 VCCK Power
AA31
DVSS Ground
AA35 DVSS Ground
AA37
DVSS Ground
AA39 DVSS Ground
AA41 B_RDQ17 I/O
AA43 B_RDQ19 I/O
AB2
FE_LVDS_4N Analog Output
AB4 FE_LVDS_3N Analog Output
AB6 FE_LVDS_5N Analog Output
AB8 FE_AVDD12_3 Analog Power (1.2V)
AB10 FE_DVDD33O Digital Power (3.3V)
AB12
FE_DVDD33O Digital Power (3.3V)
AB20 VCCK Power
AB22 VCCK Power
AB24 DVSS Ground
AB26
DVSS Ground
AB28 DVSS Ground
AB30 VCCK Power
AB32 VCCK Power
A B 3 6 B _ R V R E F I
AB40 VCC2IO Power
AB42 VCC2IO Power
AC1 FE_LVDS_4P Analog Output
AC3 FE_LVDS_3P Analog Output
AC5 FE_LVDS_5P Analog Output
AC7 FE_AVDD12_4 Analog Power (1.2V)
AC9 FE_DVDD33O Digital Power (3.3V)
AC21 DVSS Ground
AC23 DVSS Ground
AC25 DVSS Ground
AC27 DVSS Ground
AC29 DVSS Ground
AC31 DVSS Ground
AC37 B_RA5 O
AC39 B_RBA2 O
AC41 B_RCKE O
AC43 B_RWE_ O
AD2 FE_CFREQ
I/O,
AD4 FE_FOO Analog Output
AD6 FE_GAINSW2 Analog Output
I/O,
AD8 FE_GIO0
AD20 VCCK Power
AD22 VCCK Power
AD24 DVSS Ground
AD26 DVSS Ground
1.1V Digital Power
1.1V Digital Power
1.1V Digital Power
1.1V Digital Power for PWM
1.1V Digital Power
1.1V Digital Power
1.8V Digital IO Power
Memory Data bit 18
Memory Data bit 21
Memory Positive Data Strobe bit 2
Memory Negative Data Strobe bit 2
Differential Input of AC Coupling BD RF SUM Signal (Positive)
Differential Input of AC Coupling BD RF SUM Signal (Negative)
LVDS 1N
Analog Ground
VDD for Internal Circuit
Digital Ground
1.1V Digital Power
Digital Ground
Digital Ground
Digital Ground
Digital Ground
Digital Ground
1.1V Digital Power
Memory Data bit 23
Memory Data bit 16
Memory Data bit 20
Memory Data bit 22
NC
NC
NC
Analog Ground
Power pin
Digital Ground
1.1V Digital Power
1.1V Digital Power
1.1V Digital Power
1.1V Digital Power
Digital Ground
Digital Ground
Digital Ground
Digital Ground
Memory Data bit 17
Memory Data bit 19
NC
NC
NC
Power pin
VDD for Digital Pad
VDD for Digital Pad
1.1V Digital Power
1.1V Digital Power
Digital Ground
Digital Ground
Digital Ground
1.1V Digital Power
1.1V Digital Power
M e m o y r V R E F
1.8V Digital IO Power
1.8V Digital IO Power
NC
NC
NC
Power pin
VDD for Digital Pad
Digital Ground
Digital Ground
Digital Ground
Digital Ground
Digital Ground
Digital Ground
Memory Address bit 5
Memory Bank Address bit 2
Memory Clock Enable
Memory Write Enable
FE_LDD_SDIO
LDD Serial Interface Data
Focus servo OUTPUT.
Motor Driver Gain switch
MUTE1
Motor Driver Mute Control
1.1V Digital Power
1.1V Digital Power
Digital Ground
Digital Ground
6-5
SMP-N100