Summary of Contents for Eurotech CPU-1432
- Page 1 EmbeddedDNA ® An0030 PC/104 CPU Module CPU-1432; TFT Digital Interface Rev. 1.0 Sep. 2003 COPYRIGHT 1994-2005 Eurotech S.p.A. All Rights Reserved.
- Page 2 Eurotech S.p.A. reserves the right to change the contents and form of this document, as well as the features and specifications of its products at any time, without notice.
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Page 3: Conventions
Application Note Conventions The following table lists conventions used throughout this guide. Icon Notice Type Description Important features or Information note instructions Information to alert you to potential damage to a program, Warning system or device or potential personal injury... - Page 4 (This page is intentionally left blank.)
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Page 5: Table Of Contents
J4 TFT Digital Interface signal description....................10 Chapter 2 BIOS Setup ..........................11 CPU-1432 BIOS Menu..........................11 CPU-1432 BIOS Flat Panel parameters ...................... 12 Defining CPU-1432 BIOS parameters ......................12 Timings Diagrams ............................14 Chapter 3 Connecting the TFT-LCD to the CPU-1432................16... - Page 6 (This page is intentionally left blank.)
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Page 7: Chapter 1 Cpu-1432 Tft Digital Interface
This brief application note contains information about using the CPU-1432 TFT digital interface. The goal is to help users properly connect TFT-LCD panels to the CPU-1432. TFT Digital Interface Overview The CPU-1432 allows you to connect various models of LCD-TFT panels via its J4 connector. The following table shows the supported LCD-TFT video resolutions Simultaneous... -
Page 8: J4 Tft Digital Interface Connector
Application Note J4 TFT Digital Interface Connector The TFT digital interface is accessible via the J4 connector, which is a 20x2 pitch 1.25mm SMT connector. Parallel/Floppy, LCD-TFT, USB, Serial1, Serial2 Audio-CODEC Geode Gx1 Processor PCI BUS J1 J2 NS Geode CS5530A Companion Auxiliary... -
Page 9: J4 Tft Digital Interface Pin Out
This information is intended to help the user properly build the cable used to connect the Digital interface of the CPU-1432 with the TFT LCD panel selected. Reducing the cable length can allows users to reduce possible interference to the TFT LCD digital signals. -
Page 10: J4 Tft Digital Interface Signal Description
Application Note J4 TFT Digital Interface signal description The digital TFT interface signals are described in the following table: SIGNAL NAME Description Electrical Characteristics Pixel Port Clock Dot Clock TTL 8mA V = 3.3V HMAX Dot Clock is the pixel dot clock output. It clocks the pixel data. Flat Panel Horizontal Sync Flat Panel Horizontal Sync establishes the line rate and TTL 8mA V... -
Page 11: Chapter 2 Bios Setup
To enable the TFT Digital Interface functionality, the user should properly configure the BIOS settings. This section illustrates the BIOS settings the user is allowed to modify for properly controlling the LCD-TFT. For further information on how to use the BIOS functionality, please refer to the CPU-1432 user manual. CPU-1432 BIOS Menu After entering BIOS setup by pressing the F2 Key during the boot time, select the Flat Panel menu using cursors. -
Page 12: Cpu-1432 Bios Flat Panel Parameters
To properly enter the parameters, the user should analyze the information contained in the TFT-LCD datasheet that the user wishes to connect to the CPU-1432 and insert the data for the various fields. Sometimes, if connecting both a CRT and TFT-LCD devices, the image shown on the CRT is rescaled and shifted because the parameters for the TFT interface modify the video settings. - Page 13 Application Note Table 6. Timing Characteristic Example for a TFT-LCD The following instructions are an example showing how to define the values to enter into the Flat Panel BIOS setup according to the timing characteristics in Table 6.
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Page 14: Timings Diagrams
Application Note BIOS Field BIOS Value Notes Type Custom We would enter custom parameters Resolution 640x480 Obtained from the TFT-LCD Data Sheet, this is a characteristic. Referring Table 6 CLK (1/Tc) Typical value. The reported value Dot Clock (MHz) 25.175MHz is approximated to 25Mhz Referring Table 6 HSync Front Porch (thf) Typical value. - Page 15 Application Note Figure 4. Timing Diagram Vertical Mode The previous figures may be useful to graphically verify if the entered BIOS parameters match the TFT timing diagram. Regarding the timing, the following relationships should be ensured: Horizontal Sync. : Period (th) = Display Period (thd) + Front Porch (thf) + Pulse Width (thp*) + Back Porch (thb*) Vertical Sync.
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Page 16: Chapter 3 Connecting The Tft-Lcd To The Cpu-1432
Read carefully the TFT-LCD datasheet, in particular the Electrical Characteristics that must be compatible with the electrical interface of the CPU-1432 TFT LCD interface referred to in Table 4; Consulting the TFT-LCD datasheet and the Table 3 CPU-1432 connector pin-out, write a table with the connections between the J19 CPU-1432 connector and the TFT-LCD selected;...
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