Ic's Functional Block Diagrams - Sherwood R-772 Service Manual

Audio/video receiver
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M30302FEPFP : IC1024(SUB MICOM)
1. Pin Description
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
U_VIR_RST
81
P0_7/AN0_7
U_VIR_SCL
82
P0_6/AN0_6
U_VIR_SDA
83
P0_5/AN0_5
U_ADC_PDN
84
P0_4/AN0_4
85
P0_3/AN0_3
86
P0_2/AN0_2
87
P0_1/AN0_1
CODEC_CDTO_U
88
P0_0/AN0_0
M16C30P
U_CODEC_SCCLK
89
P10_7/AN7
U_CODEC_SCDIN
90
P10_6/AN6
U_CODEC_CS
91
P10_5/AN5
U_CODEC_PD
P10_4/AN4
92
CODEC_INT0_U
P10_3/AN3
93
CODEC_INT1_U
P10_2/AN2
94
U_DAC_MUTE
P10_1/AN1
95
CPU_GND
AVSS
96
P10_0/AN0
97
VDD33_MIC
VREF
98
VDD33_MIC
AVCC
99
P9_7
100
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
2. Block Diagram
8
8
8
8
Port P0
Port P1
Port P2
Port P3
Internal peripheral functions
A/D converter
(10 bits X 8 channels)
Timer (16-bit)
Output (timer A): 3
UART or
Input (timer B): 3
clock synchronous serial I/O
(3 channels)
CRC arithmetic circuit (CCITT)
16
(Polynomial X
M16C/60 Series 16-bit CPU core
R0H
R0L
Watchdog timer
R1H
R1L
(15 bits)
R2
R3
DMAC
A0
(2 channels)
A1
FB
NOTES : 1. ROM size depends on microcomputer type.
2. RAM size depends on microcomputer type.

IC'S FUNCTIONAL BLOCK DIAGRAMS

P4_4
50
SCDT_U
P4_5
49
U_SIL9135_RST
P4_6
48
U_HDMI_CSCL
P4_7
47
U_HDMI_CSDA
P5_0
46
CE_UP
P5_1
45
P5_2
44
P5_3
43
P5_4
42
100P6S-A
EPM_UP_U
P5_5
41
P5_6
40
P5_7
39
P6_0
38
P6_1/CLK0
37
P6_2/RXD0
U_XM_TX
36
P6_3/TXD0
XM_RX_U
35
P6_4
34
P6_5/CLK1
33
P6_6/RXD1
TXD1_U
32
P6_7/TXD1
RXD1_U
31
8
8
8
Port P4
Port P5
Port P6
System clock
generation circuit
XIN-XOUT
XCIN-XCOUT
12
5
+X
+X
+1)
Memory
SB
ROM
(1)
USP
ISP
RAM
(2)
INTB
PC
FLG
Multiplier
3. Pin Function
Pin No.
Symbol
Description
U_SUB_CE
Chip Enable ( controled by Main Micom)
1
2
U_SUB_CCLK
Serial control clock ( controled by Main Micom)
3
SUB_SDIN_U
Serial data input ( controled by Main Micom)
4
U_SUB_SDOUT
Serial data output ( controled by Main Micom)
5
NC
GPIO P9_2
6
NC
GPIO P9_1
NC
7
GPIO P9_0
8
BITE
The data bus is 16 bits long when the this pin is held "L"
Connect this pin to Vss to when after a reset to start up
9
CNVSS_UP
in single-chip mode. Connect this pin to Vcc1 to start up
in microporcessor mode.
10
NC
GPIO P8_7
11
NC
GPIO P8_6
12
SUB_RST
Reset ( controled by Main Micom)
U_XTAL_OUT
13
I/O pin for the main clock generation circuit
CPU_GND
14
Vss
15
U_XTAL_IN
I/O pin for the main clock generation circuit
16
VCC1
VCC1 +3V3
17
NC
GPIO P8_5
18
SUB_PDN
Power Down Signal from Main Micom
19
U_XM_DAC_MUTE
XM DAC
20
U_XM_DAC_PDN
XM DAC Power Down
21
U_XM_DAC_CSN
XM DAC Cotrol Chip Selection
22
U_XM_DAC_CCLK
XM DAC Control Clock Output
23
U_XM_DAC_CDTI
XM DAC Control Clock Input
24
NC
GPIO P7_6
25
U_XM_COMMSEL
XM IC Communication Select
26
XM_IRQ_U
Interrupt Request from XM IC
27
U_XM_RST
XM Reset
28
NC
GPIO P7_2
29
NC
OPEN DRAIN
30
NC
OPEN DRAIN
31
RXD1_U
UART for UP GRADE
TXD1_U
32
UART for UP GRADE
NC
33
GPIO P6_5
34
NC
GPIO P6_4
35
XM_RX_U
XM Receiver
36
U_XM_TX
XM Transmitter
37
NC
GPIO P6_1
38
NC
GPIO P6_0
39
NC
GPIO P5_7
40
NC
GPIO P5_6
41
EPM_UP
UP GRADE
42
NC
GPIO P5_4
43
NC
GPIO P5_3
44
NC
GPIO P5_2
45
NC
GPIO P5_1
46
CE_UP
UP GRADE
47
U_HDMI_CSDA
HDMI I2C data
48
U_HDMI_CSCL
HDMI I2C clock
49
U_SIL9135_RST
SIL9135 Reset
50
SCDT_U
Indicates active video at HDMI input port
35
Model No.:R-772
Pin No.
Symbol
Description
51
SIL9135_INT_U
SIL9135 Interrupt request
52
SIL9134_INT_U
SIL9134 Interrupt request
53
U_SIL9134_RST
SIL9134 Reset
54
U_PCA9546_RST
PCA9546 Reset
55
U_EDSCL
HDMI EDID Serial Clock
56
U_EDSDA
HDMI EDID Serial Data
57
U_ED_SEL2
HDMI EDID Select2
58
U_ED_SEL1
HDMI EDID Select1
59
U_HDMI2_HPD
HDMI Input2 Hot Plug Detect
60
U_HDMI1_HPD
HDMI Input1 Hot Plug Detect
61
NC
GPIO P3_1
62
VCC2
VCC2 +3V3
63
NC
GPIO P3_0
64
VSS
GND
65
NC
GPIO P2_7
66
U_DSP_RST
CS49700 Reset
CS49700 Serial Control Port for Master
67
U_SCP1_MOSI
Output Slave Input
68
U_DSP_CE
CS49700 Chip Enable
CS49700 Serial Control Port for Master
SCP1_MISO_U
69
Input Slave Output
70
U_DSP_SCLK
CS49700 Serial Control Clock
DSP_IRQ_U
Interrupt requet from CS49700
71
DSP_BSY_U
72
BSY from CS49700
U_FLASH_RST
73
Output for Flash Reset
74
U_LVC257_CONT1
LVC257 Control output
75
U_LVC257_CONT
LVC257 Control output
76
U_RM2_DAC_PDN
Room2 dac(AK4385) power down
77
U_RM2_DAC_CSN
Room2 dac(AK4385) Chip enable
78
U_RM2_DAC_CCLK
Room2 dac(AK4385) Control Clock
79
U_RM2_DAC_CDTI
Room2 dac(AK4385) Control Data In
80
U_RM2_DAC_MUTE
Room2 dac(AK4385) audio output mute
81
U_VIR_RST
NJU26220 Reset
82
U_VIR_SCL
NJU26220 Serial Clock
83
U_VIR_SDA
NJU26220 Serial data
84
U_ADC_PDN
AK5381 Power down
85
NC
GPIO P0_3
86
NC
GPIO P0_2
87
NC
GPIO P0_1
88
CODEC_CDTO_U
AK4588 Control data output
89
U_CODEC_SCCLK
AK4588 Serial Control Clock
90
U_CODEC_SCDIN
AK4588 Serial Data In
91
U_CODEC_CS
AK4588 Chip Enable
92
U_CODEC_PD
AK4588 Power Down
93
CODEC_INT0_U
Interrupt request 0 from AK4588
94
CODEC_INT1_U
Interrupt request 1 from AK4588
95
U_DAC_MUTE
AK4588 Output Audio Mute
96
AVSS
GND
97
NC
GPIO P10_0
VREF
VCC1 +3V3
98
AVCC
VCC1 +3V3
99
NC
100
GPIO P9_7

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