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Serial Cables PCIe Gen4 U2 8Bay Active JBOF User Manual

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PCIe Gen4 U2/U3 8Bay Ac ve JBOF
User's Manual
REV: 1.2
Oct. 2020
1

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Summary of Contents for Serial Cables PCIe Gen4 U2 8Bay Active JBOF

  • Page 1 PCIe Gen4 U2/U3 8Bay Ac ve JBOF User’s Manual REV: 1.2 Oct. 2020...
  • Page 2 PCIe Gen4 U2/U3 8Bay Ac ve JBOF Drive Present LED: White Drive Fault LED: Power Bu on Drive Ac vity Led: Blue Slot 8 Slot 1 AC Input System FANs Ethernet System LED Slide switch Mute bu on system good: Green Switch Heartbeat LED: Blue...
  • Page 3 PCIe Gen4 U2/U3 8Bay Ac ve JBOF Synthe c JBOF: 1 Host Set Host card side band mode to “PCI-SIG” PCI4-4444SE2 MiniSAS Cables...
  • Page 4 PCIe Gen4 U2/U3 8Bay Ac ve JBOF USB Driver Installa on Step1: Download and install the CDC driver for unidentified device (VID_03EB&PID_2018) Available at: https://www.serialcables.com/wp-content/uploads/2018/11/SynergyUSBCDC_20180518.rar Note: No USB driver is required for Windows 10 and Linux [Figure 1] [Figure 2] [Figure 3] [Figure 4]...
  • Page 5 PCIe Gen4 U2/U3 8Bay Ac ve JBOF USB Driver Installa on [Figure 5] [Figure 6] [Figure 7] [Figure 8] [Figure 9] [Figure 10] [Figure 11] [Figure 12]...
  • Page 6 PCIe Gen4 U2/U3 8Bay Ac ve JBOF USB Driver Installa on [Figure 13] [Figure 14]...

  • Page 7: Cli Setup

    PCIe Gen4 U2/U3 8Bay Ac ve JBOF CLI Setup Step 1. Install and launch Tera Term applica-on (or Hyper Terminal requires version 3.0 or higher). Step 2: To ensure proper communica-ons between Ac-ve 8bays JBOF controller and the VT100 Terminal emula-on, please configure the VT100 Terminal emula-on se7ngs to the values shown below: Step 3: For “Port”, select COM3 in this example.
  • Page 8 PCIe Gen4 U2/U3 8Bay Ac ve JBOF uP Synergy FW Upgrading Step 1. Connect the USB port of JBOF to PC or laptop Step 2. Press the mute bu>on in the rear of JBOF then power on. Mute bu on Step 3.
  • Page 9 PCIe Gen4 U2/U3 8Bay Ac ve JBOF Ac ve JBOF Commands List...

  • Page 10: Eth Command

    PCIe Gen4 U2/U3 8Bay Ac ve JBOF eth Command Set Ethernet IP configura-on. Usage: eth <ipaddr(*)> <subnet(*)> <gateway(*)> setmac Command Set Ethernet MAC (Media Access Control) address Usage: setmac <xx:xx:xx:xx:xx:xx>...
  • Page 11 PCIe Gen4 U2/U3 8Bay Ac ve JBOF fdl Command Update the configura-on, SBR, FW or MFG files for Atlas PCIe switch. The fld is used for CLI via USB Type-B port not support in RJ45 LAN port Usage: fdl cfg|sbr|fw|mfg cfg=update the combined config file into MCU, user can u-lize “setmode”...
  • Page 12 PCIe Gen4 U2/U3 8Bay Ac ve JBOF pwmctrl Command Set the PWM duty for all FANs in JBOF Usage: pwmctrl <fan_id(D)> <duty(D)|off> fan_id=1, Switch Fan fan_id=2, System Fan1 fan_id=3, System Fan2 Cau-on: The 8Bays JBOF implemented smart fan control, it isn’t suggested to set FAN PWM manual unless for stress tes-ng purpose mw Command Write 32bits data to registers...
  • Page 13 PCIe Gen4 U2/U3 8Bay Ac ve JBOF dr Command Atlas switch registers dump per address (offset) Usage: dr <register(H)> [count(H)]...
  • Page 14 PCIe Gen4 U2/U3 8Bay Ac ve JBOF dp Command Atlas switch registers dump per port (offset 0x0 ~ 0xFFF) Usage: dp <port_number(D)>...
  • Page 15 PCIe Gen4 U2/U3 8Bay Ac ve JBOF df Command Atlas switch registers of flash dump Usage: df <address(H)> [count(H)]...
  • Page 16 PCIe Gen4 U2/U3 8Bay Ac ve JBOF ssdpwr Command Slot power status checking and ON/OFF control Usage: Usage: ssdpwr [<slot(D)> <on|off>] The slot power is turned off automa-cally when drive is plug out from slot, the use case of power con- trol command is when drive is plugging into slot.
  • Page 17 PCIe Gen4 U2/U3 8Bay Ac ve JBOF ssdrst Command Issue PERST# from uP to device Usage: Usage: ssdrst <slot(D)|all> [channel(D)] Channel a: The 1 PHY of dual port drive Channel b: The 2 PHY of dual port drive...

  • Page 18: Showport Command

    PCIe Gen4 U2/U3 8Bay Ac ve JBOF showport Command Shows link speed and link width informa-on for all upstream ports(SFF8674) and downstream ports(SFF8639) Usage: showport When “dual” command is not implemented for slots, the showport shows the informa-on for single port x4 per slot When “dual”...
  • Page 19 PCIe Gen4 U2/U3 8Bay Ac ve JBOF showtype Command Shows the Back plane board type(U2 or U3) in Ac-ve 8 bays JBOF. Usage: showtype Dual Command Enable dual port control per slot or for all slots. Usage: dual <slot(D)|all> <on|off> It requires drive power cycle, hot plug or switch reset to apply the dual port enable/disable se7ng etc.
  • Page 20 PCIe Gen4 U2/U3 8Bay Ac ve JBOF buz Command The command is for controlling the buzzer on switch controller board Usage: buz <on|off|en|dis> [en]: enable the buzzer func-on [dis]: disable the buzzer func-on [on]: set buzzer to beep in one -me [off]: mute buzzer beeping...

  • Page 21: Scan Command

    PCIe Gen4 U2/U3 8Bay Ac ve JBOF scan Command Scan all devices in 8bays Ac-ve JBOF Usage: scan Spread Command Set the reference clock to Atlas switch and 8 slots to CFC(spread off) or FFC(spread on with -0.5%) Usage: Spread <on|off> It requires switch reset for applying the se7ng of spread ON or OFF...
  • Page 22 PCIe Gen4 U2/U3 8Bay Ac ve JBOF clk Command Disable or enable the PCIe reference clock in slots Usage: clk[en|dis] Clock DIFF0 is for Atlas switch, it must be always enabled iicwr Command Data read for U.2/M.2 drives from SMbus Usage: iicwr <Addr(H)>...

  • Page 23: Ver Command

    PCIe Gen4 U2/U3 8Bay Ac ve JBOF iicw Command Byte or page write data to U.2/M.2 drive from SMbus Usage: iicw <Addr(H)> <Slot(D)> <WriteData(H)...> - Addr(H) : Device address - Slot(D) : Slot should be 1 ~ 8 - WriteData(D) : Max write byte is 32 byte - Ex : iicw d4 1 ff...

  • Page 24: Reset Command

    PCIe Gen4 U2/U3 8Bay Ac ve JBOF eventmark Command Use for following events mask Usage: eventmask <event ID> <on|off> Event ID from 1 to 7 1. Switch Fan Event 2. System Fan1 Event 3. System Fan2 Event 4. Switch Temp Event 5.

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