LG MBD62I Service Manual page 47

4-3. FUNCTIONAL BLOCK DIAGRAM
OTW
Internal Pullup
Resistors to VREG
SD
M1
M2
M3
RESET_AB
RESET_CD
PWM
PWM_D
Rcv.
PWM
PWM_C
Rcv.
PWM
PWM_B
Rcv.
PWM
PWM_A
Rcv.
LGE Internal Use Only
Under-
voltage
Protection
Power
On
Reset
Protection
and
I/O Logic
Temp.
Sense
Overload
Protection
Ctrl.
Timing
Ctrl. Timing
Ctrl. Timing
Ctrl. Timing
3-36
4
VREG
Isense
Gate
Drive
BTL/PBTL Configuration
Gate
Drive
BTL/PBTL Configuration
Gate
Drive
BTL/PBTL Configuration
Gate
Drive
BTL/PBTL Configuration
Copyright © 2007 LG Electronics. Inc. All right reserved.
VDD
VREG
AGND
GND
OC_ADJ
GVDD_D
BST_D
PVDD_D
OUT_D
Pulldown Resistor
GND_D
GVDD_C
BST_C
PVDD_C
OUT_C
Pulldown Resistor
GND_C
GVDD_B
BST_B
PVDD_B
OUT_B
Pulldown Resistor
GND_B
GVDD_A
BST_A
PVDD_A
OUT_A
Pulldown Resistor
GND_A
Only for training and service purposes