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< 4-1-1-2_PMIC_PM8226_POWER >
VBUS_USB_IN
+5V0_VREG_BHARGER
+5V0_VREG_BHARGER
+VPWR
25V
25V
CHG_PGND
VBAT_SENSE
VBAT_SENSE_P
+VPWR
R4135
DNI
If BMS_CSP and BMS_CSN pins are not used,
please connect them to VPH_PWR.
+VPWR
R4138
DNI
VBAT_SENSE_N
+5V0_VREG_BHARGER
+VPWR
R4141
0
+VPWR
Current Sensing Point for WLED Driver
VREG_L12_1V8
X4100
X1E0002910001
4
3
Thermistor
XTAL2
1
2
XTAL1
GND/Therm
19.2MHz
Note 1
BB_CLK has special layout and component requirements.
R4110
Note 1
BB_CLK
Please refer to 80-NC833-14 for more information.
SLEEP_CLK
R4114
BB_CLK
SLEEP_CLK
DNI
DNI
LGE Internal Use Only
161
USB_IN_1
172
USB_IN_2
10V
171
C4131
10n
OVP_CP_DRV
162
OVP_OUT
167
C4132
100n
VDRV_P
16V
143
VCHG_1
155
VCHG_2
L4133
154
VSW_CHG_1
166
1u
VSW_CHG_2
VCOIN
+VPWR
VBAT
152
VPH_PWR_1
164
VPH_PWR_2
140
BATFET_CP_DRV
C4146
139
VBAT_1
470n
151
VBAT_2
163
VBAT_3
156
VBAT_SNS
131
BMS_BYP
107
BMS_CSP
96
BMS_CSN
76
VCOIN
U4100
104
VDD_FLASH
4
VREG_S3_1P35
VDD_GR1
GR1 : L1, L2, L4, L5
GR5 : L14, L12
1
PM8226
VDD_GR2_1
GR2 : L3, L24, L26
GR6 : L15, L16, L17, L18
11
GR3 : L6, L7, L8, L9, L27
VDD_GR2_2
GR4 : L10, L11, L13
GR7 : L19, L20, L21, L22, L23, L28
115
VREG_S4_2P1
VDD_GR3
27
VDD_GR4
59
+VPWR
VDD_GR5_1
60
VDD_GR5_2
7
+VPWR
R4209
0
VDD_GR6
41
VDD_GR7
48
VDD_L25
121
AVDD_BYP
170
VPRE_BYP
9
VDD_S1_1
10
VDD_S1_2
22
GND_S1_1
33
GND_S1_2
34
VDD_S2
57
GND_S2_1
67
GND_S2_2
68
GND_S2_3
47
VDD_S3
23
GND_S3
93
VDD_S4
69
GND_S4
126
VDD_WLED
113
GND_WLEDI_1
114
GND_WLEDI_2
79
VDD_GP
92
GND_9
(05/30)
10V
10V
10V 10V
10V
10V
25V
C4172
C4171
22u
22u
for tuning Audible Noise
QCT Ref.E(06/07)
Place input caps close to respective VIN pins.
Each capacitor GND should be star routed to their respective reference ground
(GND_S1, GND_S2, GND_S3, GND_S4)
Then input caps should via directly to main ground
CHG_PGND
< 4-1-1-1_PMIC_PM8226_DATA >
TP4100
85
102
PM_KYPD_PWR_N
108
119
JTAG_PS_HOLD
100
R4104
10K
MSM_PS_HOLD
101
R4105
0
77
TP4103
MSM_RESIN_N
112
Layout
R4107
0
PMIC_SPMI_CLK
123
PMIC -> CAP -> MSM
R4108
0
PMIC_SPMI_DATA
QCT Ref.checklist)(05/30)
120
63
5
6
62
17
BB_CLK has special layout and component requirements.
Please refer to 80-NC833-14 for more information.
44
BB_CLK_EN
13
WTR0_XO_IN
39
XO_G_TCXO
31
0
42
88
0
169
VREF_BAT_THERM
61
VREF_LPDDR2
129
117
Note 2
GND_REF must connect directly to cap on a thin trace
The cap should via directly to main ground with
no connections to intermediate ground fills
Rev_1.0
L4130
240n
8
VSW_S1_1
21
VSW_S1_2
Remote Sense
20
R4132
VREG_S1
0
45
L4131
240n
VSW_S2_1
46
VSW_S2_2
58
VSW_S2_3
Remote Sense
56
R4133
0
VREG_S2
35
L4132
1u
VSW_S3
36
VREG_S3
6.3V
6.3V
81
L4134
2.2u
VSW_S4
95
VREG_S4
80
DNC_3
78
GND_10
15
VREG_L1
3
VREG_L2
2
VREG_L3
37
VREG_L4
25
VREG_L5
105
VREG_L6_1
106
VREG_L6_2
116
VREG_L7
118
VREG_L8
128
VREG_L9
38
VREG_L10
16
VREG_L11
PMIC Internal Use for VREG_L6
71
VREG_L12
14
VREG_L13
PMIC Internal Use for VREG_RF_CLK
49
VREG_L14
43
VREG_L15
19
VREG_L16
18
VREG_L17_1
30
VREG_L17_2
32
VREG_L18
29
VREG_L19
55
VREG_L20
53
VREG_L21
52
VREG_L22
51
VREG_L23
12
VREG_L24
70
VREG_L25
24
VREG_L26
127
VREG_L27
50
VREG_L28
94
VOUT_LVS1
138
L4136
10u
VSW_WLED
Max.33V
137
OVP_WLED
PMIC_LED_A
125
WLED_1
ZD4130
PMIC_LED_C
103
VLED_FLASH
FLASH_LED_OUT_P
up to 10EA of LED
50V
Rev_0.6
124
CBL_PWR_N
GPIO_1
PMIC_AUDIO_REF_CLK
136
KPD_PWR_N
GPIO_2
CDC_BOOST_5V_EN
149
OPT_2
GPIO_3
135
OPT_1
GPIO_4
BATT_UIM_ALARM
148
GPIO_5
FLASH_STROBE_TRIG
160
CABC_WLED
PS_HOLD
GPIO_6
134
RESIN_IN
GPIO_7
TX_GTR_THRESH
122
PON_RESET_N
GPIO_8
159
SPMI_CLK
MPP_1
VREF_MSM_PX_MPP_1
146
SPMI_DATA
MPP_2
158
MPP_3
VREF_LDO_MPP_3
157
XO_THERM
MPP_4
132
GND_XOADC
MPP_5
PA_THERM_0
144
U4100
MPP_6
130
XTAL_19M_IN
MPP_7
PCB_REVISION
141
XTAL_19M_OUT
MPP_8
66
GND_XO_BUFF
VIB_DRV_N
65
GND_XO
GND_DRV
168
BB_CLK1_EN
LED_CHG
72
RF_CLK1
AMUX_1
VBAT_THERM
73
R4109
RF_CLK2
AMUX_2
BAT_ID
DNI
97
BB_CLK1
USB_ID_IN
R4111
0
PM_USB_ID
R4113
BB_CLK2
VREG_L6_1V8
200K
SLEEP_CLK1
TOL=0.01
VREF_BAT_THM
VREF_LPDDR
REF_BYP
GND_REF
- 156 -
PCB REVISION
VREG_L12_1V8
Rev
R4130
0
100K
A
100K
B
100K
C
100K
D
100K
PCB_REVISION
E
100K
VREG_S1_1P15
VREG_S2_1P15
DNI
1.0
100K
VREG_S3_1P35
1.1
DNI
VREG_S4_2P1
Output capacitor should be placed close to MSM load
ground cap directly to main ground using separate via.
Main ground should be continuous (not fragmented) plane
between output capacitor and the PMIC
BACKUP BATT
VREG_L1_1V225
VREG_L2_1V2
10uAH / 0.03F
VREG_L3_1V15
VREG_L4_1V2
VREG_L5_1V2
VCOIN
VREG_L6_1V8
VREG_L7_1V9
VREG_L8_1V8
VREG_L9_2V05
VREG_L10_1V8
VREG_L12_1V8
VREG_L14_2V75
VREG_L15_2V8
VREG_L16_3V3
VREG_L17_2V95
VREG_L25_2V075
VREG_L18_2V95
L25 helper to S4
Current Assist when VBAT drops below 3V
VREG_L19_2V85
VREG_L20_3V075
VREG_L21_2V75
VREG_L22_2V95
VREG_L23_2V95
VREG_L24_1V3
VREG_L25_2V075
VREG_L28_2V95
VREG_LVS1_1V8
2
1
QCT recommand
the load caps as DNI for pseudo capless LDOs
0603 : under 150mA
(05/30)
<9-1-2_Battery_CNT_4P>
Routing Width 2mm
VBAT
R9100
0
VBAT_SENSE_P
If you use external sensing resister, you have to change 0ohm to Sensing Resister
R9101
0
External sensing resistor : ERHY0035601(10mm ohm, 1%)
VBAT_SENSE_N
R9106
0
VBAT_SENSE
1%
TOL=0.01
1%
R9104
150K
VREF_BAT_THERM
R9102
36K
VBAT_THERM
BAT_ID
VREF_BAT_THERM
R9105
4.7K
TOL=0.01
(DGMS Guide)
MC-C04766-5 :
Use F(1%) grade component
1. PCB rev
2. Device ADC
TOL=0.01
3. Thermistor, temperature pheri.
(DGMS Guide)
MC-C00073-15 : Apply to large capacity around the bat connector
1. Over 47uF around the bat connector
2. Over 100uF totally on Vbat line
Use the TVS diode of VR=5V, when TVS diode have to use for ESD
Note 4
AMUX Input
6. CIRCUIT DIAGRAM
R4131
20K
0.300
30K
0.415
43K
0.541
68K
0.729
100K
0.900
180K
1.157
DNI
1.800
100K
0.000
C4182
47u
0
R4139
VREG_S4_2P1
REV.0.5
CN9100
D1
1
2
3
4
R9107
120
D2
Copyright © 2014 LG Electronics. Inc. All right reserved.
Only for training and service purposes
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Troubleshooting
