1. Manuals
  2. Brands
  3. Keithley Manuals
  4. Network Hardware
  5. KPCMCIA-12AIAOH
  6. User manual

Keithley KPCMCIA-12AIAOH User Manual

Type ii pcmcia card
Hide thumbs
Table of Contents

Advertisement

Quick Links

Download this manual
KPCMCIA-12AIAOH
Type II PCMCIA Card
User's Manual
A G R E A T E R M E A S U R E O F C O N F I D E N C E

Advertisement

Table of Contents
loading

Related Manuals for Keithley KPCMCIA-12AIAOH

Summary of Contents for Keithley KPCMCIA-12AIAOH

  • Page 1 KPCMCIA-12AIAOH Type II PCMCIA Card User’s Manual A G R E A T E R M E A S U R E O F C O N F I D E N C E...
  • Page 2 Upon receiving notification of a defect in the Keithley Hardware during the warranty period, Keithley will, at its option, either repair or replace such Keithley Hard- ware. During the first ninety days of the warranty period, Keithley will, at its option, supply the necessary on site labor to return the product to the condition prior to the notification of a defect.
  • Page 3 KPCMCIA-12AIAOH Type II PCMCIA Card User’s Manual ©1999, Keithley Instruments, Inc. All rights reserved. Cleveland, Ohio, U.S.A. Second Printing, July 2002 Document Number: 98936 Rev. B...
  • Page 4 Revision A (Document Number 98936) ..................September 1999 Revision B (Document Number 98936) ..................... July 2002 All Keithley product names are trademarks or registered trademarks of Keithley Instruments, Inc. Other brand and product names are trademarks or registered trademarks of their respective holders.
  • Page 5 Keithley products are designed for use with electrical signals that The instrument and accessories must be used in accordance with its are rated Installation Category I and Installation Category II, as de- specifications and operating instructions or the safety of the equip-...
  • Page 6 Keithley Instru- symbol on an instrument indicates that the user should re- ments. Standard fuses, with applicable national safety approvals, fer to the operating instructions located in the manual.

  • Page 7: Table Of Contents

    Table of Contents Introduction Getting started ..............................1-2 Features ................................1-3 Technical support ..............................1-4 Installation Hardware setup ..............................2-2 Software setup..............................2-2 Theory of Operation Introduction ................................3-2 DC/DC power supply............................3-2 Analog input multiplexer ............................. 3-3 Programmable gain control ..........................3-3 Scan list ................................
  • Page 8 Specifications PCMCIA Interface Introduction .................................B-2 Configuration and option register (COR)......................B-3 Card configuration and status register (CCSR) ....................B-3 I/O Registers Introduction .................................C-2 Data FIFO register (base + 0)..........................C-3 Data FIFO operation modes ........................C-3 Mode setting ..............................C-4 FIFO flags..............................C-5 Scan list queue register (base + 1, write only).....................C-6 Scan list queue programming ........................
  • Page 9 List of Illustrations Theory of Operation Figure 3-1 State transition diagram of A/D conversion process.................... 3-6 I/O Connections Figure 4-1 KPCMCIA-12AIAOH PC card D-37 output connector, KCAB-AIAO.............. 4-3 I/O Registers Figure C-1 Pacer clock block diagram ..........................C-12...
  • Page 10 Table B-2 COR bit definitions ............................. B-3 Table B-3 CCSR bit definitions ............................B-3 I/O Registers Table C-1 KPCMCIA-12AIAOH PC card register map...................... C-2 Table C-2 Data FIFO register bit allocation ........................C-3 Table C-3 Data FIFO operation mode ..........................C-3 Table C-4 Data FIFO threshold setting ..........................

  • Page 11: Introduction

    Introduction...

  • Page 12: Getting Started

    (gain = 1000), ±0.1V (gain =100), ±1V (gain =10), and ±10V (gain = 1) with programmable gains of 1, 10, 100, and 1000. The KPCMCIA-12AIAOH PC card supports sampling rates up to 100 kHz at either 12-bit or 16-bit resolution.

  • Page 13: Features

    KPCMCIA-12AIAOH User’s Manual Introduction Features The KPCMCIA-12AIAOH PC card offers the following features: • 12- or 16-bit A/D resolution. • Four differential or eight single-ended analog input channels, expandable to 128 channels. Bipolar input range up to ±10V. • •...

  • Page 14: Technical Support

    Introduction KPCMCIA-12AIAOH User’s Manual Technical support Before returning any equipment for repair, call Keithley Instruments, Inc., for technical support 1-888-KEITHLEY Monday - Friday, 8:00 a.m. - 5:00 p.m., Eastern Time An applications engineer will help you diagnose and resolve your problem over the telephone.

  • Page 15: Installation

    Installation...

  • Page 16: Hardware Setup

    Installation KPCMCIA-12AIAOH User’s Manual Hardware setup To install a KPCMCIA-12AIAOH PC card, insert the adapter into any type II PCMCIA socket. All other configuration options are determined by the DriverLINX software and operating system, as discussed in your DriverLINX documentation.

  • Page 17: Theory Of Operation

    Theory of Operation...

  • Page 18: Introduction

    Associated control circuits DC/DC power supply The KPCMCIA-12AIAOH PC card uses a standard 5V power supply for its digital circuit. The ±15V power supplies are used for the analog front end, and the analog +5V power supply is used for the A/D converter. All are generated by a DC/DC converter off of the +5 digital input power supply from the PCMCIA connector.

  • Page 19: Analog Input Multiplexer

    ±30V. Programmable gain control The KPCMCIA-12AIAOH PC card has an internal gain of 1, 10, 100, and 1000. The gain can be changed “on the fly” from channel to channel when scanning through the channels. There is a pro- grammable gain instrumentation amplifier with gains of 1, 10, 100, and 1000.

  • Page 20: Trigger Circuit

    A/D converter and data FIFO The KPCMCIA-12AIAOH PC card always assumes a bipolar input range of ±10V if the gain is one. The output data format will always be in 2’s complement (and left justified for 12-bit ver- sions). The data acquisition time of the A/D converter is 2µs, while its conversion time is no more than 8µs.

  • Page 21: Interrupt And Status

    Digital I/O The KPCMCIA-12AIAOH PC card has one digital input port (base + 3, read only) of four bits (bits 0 to 3) and one digital output port (base + 3, write only) of four output bits (bits 0 to 3). The output port is latched, but the input port is not.

  • Page 22: A/D State Machine

    KPCMCIA-12AIAOH User’s Manual A/D state machine The KPCMCIA-12AIAOH PC card has an internal state machine (see Figure 3-1) that controls A/ D operation. The state machine defaults to state S0 after power up or reset. The normal state flow is first S0 to S3, initiated by a scan list (queue) flush command (RSTQ).

  • Page 23: D/A Circuit

    12-bit output register. The data loaded into the output register determines the analog output of the D/A channel. The KPCMCIA-12AIAOH PC card has four D/A operation modes (modes 0 to 3). Mode 0 is the direct update mode. The corresponding D/A channel output register updates immediately after the data word is written into the D/A port (if byte I/O is used, after the high byte is written).
  • Page 24 Theory of Operation KPCMCIA-12AIAOH User’s Manual There are four timer/counter modes: 0, 1, 2, and 3. In mode 0, the counter stops and reloads with the initial value by the rising edge of the selected clock source. In mode 1, the counter pauses counting but does not reload (as it does in mode 0).
  • Page 25 I/O Connections...

  • Page 26: Cable Assembly

    I/O Connections KPCMCIA-12AIAOH User’s Manual Introduction The KPCMCIA-12AIAOH PC card is fitted in with a 32-pin, 0.8mm shielded connector with the pin assignment shown in Table 4-1. Cable assembly Table 4-1 KPCMCIA-12AIAOH PC card cable mapping PC Card 32 D-37 pin...
  • Page 27 KPCMCIA-12AIAOH User’s Manual I/O Connections Note that the cable assembly for the KPCMCIA-12AIAOH PC card (KCAB-AIAO) in Figure 4-1 looks very similar to the one for the KPCMCIA-12AI/16AI and KPCMCIA-12AIH PC cards (KCAB-AI). Do not mistake one for the other; severe damage to the PC cards may occur. The cable assembly for the KPCMCIA-12AIAOH PC cards have the name KCAB-AIAO on its 37-pin D-shell connector.
  • Page 28 Optional Accessories...
  • Page 29 Optional Accessories KPCMCIA-12AIAOH User’s Manual The following optional accessories are available from Keithley: • STP-37 • STA-U • EXP-1600...
  • Page 30 Specifications...
  • Page 31 Specifications KPCMCIA-12AIAOH User’s Manual A/D converter 12-bit version 16-bit version Acquisition + Conversion 2µs + 8µs 2µs + 8µs Monotonicity No missing codes No missing codes Integral linearity error ±1 LSB ±3 LSB Differential linearity error ±1 LSB +3/-2 LSB Full-scale error ±0.5%...
  • Page 32 KPCMCIA-12AIAOH User’s Manual Specifications General specifications Power consumption 210mA (full power), 70mA (power down) Operating temperature 0° to 50°C Storage temperature 0° to 70°C Humidity 0 to 95%, non-condensing Size (cable not included) Standard PCMCIA type II Weight 1.5 oz (for reference only)
  • Page 33 PCMCIA Interface...
  • Page 34 Introduction Information in this section is provided for those who need low-level PCMCIA interface details of the KPCMCIA-12AIAOH PC card. The client driver or the enabler that comes with the PC card is sufficient for most applications. The KPCMCIA-12AIAOH PC card performs data acquisition for all host computers equipped with a version 2.1 compliant PCMCIA interface.

  • Page 35: Configuration And Option Register (Cor

    Card configuration and status register (CCSR) Refer to Table B-3. The KPCMCIA-12AIAOH PC card uses two bits in this register. When bit 1 is set to 1, it indicates a pending interrupt. The bit will remain as 1 until the software clears the interrupt source.

  • Page 36: I/O Registers

    I/O Registers...

  • Page 37: Introduction

    Introduction The KPCMCIA-12AIAOH PC card uses eight consecutive I/O locations within the system I/O address space. The base address of the adapter is determined by the client driver or enabler. The eight I/O locations used by the PC card are summarized in Table C-1.

  • Page 38: Data Fifo Register (Base + 0

    KPCMCIA-12AIAOH User’s Manual I/O Registers Data FIFO register (base + 0) The data FIFO register can be considered the access port to the data FIFO, which can hold up to 2048 data words of the A/D conversion result. The port is also used to program the data FIFO thresholds.

  • Page 39: Mode Setting

    I/O Registers KPCMCIA-12AIAOH User’s Manual Mode 0 is the FIFO program mode in which the two consecutive words (four bytes) written into the register address will set the almost-full and almost-empty thresholds (in bytes). The first word specifies the almost-empty threshold (not used; can be set to anything), while the second word determines the almost-full threshold.

  • Page 40: Fifo Flags

    KPCMCIA-12AIAOH User’s Manual I/O Registers FIFO flags When reading the register under mode 1 or 3, the first available data byte from the data FIFO will be returned if it is not empty. Otherwise, the returned byte is not defined. The FIFO empty flag will be set immediately after the last byte is read from the FIFO, while the FIFO full flag will be...

  • Page 41: Scan List Queue Register (Base + 1, Write Only

    I/O Registers KPCMCIA-12AIAOH User’s Manual Scan list queue register (base + 1, write only) The scan list queue register can be considered the access port to the scan list queue, which can hold up to 2048 entries (each has two bytes), each specifying an analog input channel and its asso- ciated gain as well as other settings.

  • Page 42: Channel Configuration

    This bit should always be set to 0 if the selected internal channel is connected to an expansion card because the output from the expansion cards is always single-ended. Bit 15 (MSB) is not used by the KPCMCIA-12AIAOH PC card. It should be set to 0.

  • Page 43: Analog Input Offset Correction

    I/O Registers KPCMCIA-12AIAOH User’s Manual Analog input offset correction The input to the A/D converter will be shorted to ground if bit 14 (MSB) is set to 1 while the inter- nal channel selection of bits 8 through 10 specifies internal channels 4 through 7. (Bit 11 is not used and therefore should be considered as “don’t care.”) This can be used for analog input offset...

  • Page 44: Trigger Mode

    KPCMCIA-12AIAOH User’s Manual I/O Registers Trigger mode Bit 2 determines the trigger mode. It is set to 0 for the one-shot mode in which each trigger signal, internal or external, starts one scan of input analog channels specified by the scan list. Bit 2 should be set to 1 for the continuous trigger mode in which the trigger signal, internal or external, starts the first scan of the input analog channels specified by the scan list.The pacer clock then initiates...

  • Page 45: Status Register (Base + 2, Read Only

    C-10 I/O Registers KPCMCIA-12AIAOH User’s Manual Take care when using the analog trigger with the pre-trigger option. After receiving the arm com- mand, the A/D converter is already scanning the analog input channels specified in the scan list. The analog comparator generates the analog trigger any time its input passes through the thresh- old.

  • Page 46: Digital Output Register (Base + 3, Write Only

    0 (default after reset). In other words, the digital output bits are only valid when KPCMCIA-12AIAOH PC card is not in expansion mode. These bits are ignored otherwise. For digital output register bit definitions, refer to Table C-11.

  • Page 47: Pacer Clock (Base + 4, + 5, + 6; Write Only

    3kHz. Command register (base + 7, write only) The command register is used to send control commands to the KPCMCIA-12AIAOH PC card including arm/trigger (or start A/D), scan list queue and data FIFO flush, stop A/D, and timer/ counter latch commands.

  • Page 48: Trigger/Arm Command

    The data FIFO program/access bit and the scan speed selection bits are latched each time they are written. Therefore, take care to avoid changing these bits accidentally when sending the com- mands to the KPCMCIA-12AIAOH PC card. Refer to Table C-13 for the command register bit definitions.

  • Page 49: Stop A/D Command

    1 when sending other commands (flush scan list, stop A/D, or trig/ arm) to the KPCMCIA-12AIAOH PC card by writing them into the auxiliary control register after programming the thresholds. A useful tip for safe operation is to set the bit to 0 only when flushing and programming the FIFO thresholds.

  • Page 50: Scan Rate Selection

    Depending on the input mode and the gain selection, the analog front end may have different set- tling times. To keep the best performance, the KPCMCIA-12AIAOH PC card allows you to choose three different scanning rates by setting bit 2 and bit 3 while the start A/D command is issued.

  • Page 51: D/A Update Modes

    C-16 I/O Registers KPCMCIA-12AIAOH User’s Manual The data word written into the D/A port is first latched into the 16-bit buffer register. It is then loaded into the 16-bit shift register and shifted into the D/A channel’s input register across the serial link.

  • Page 52: Timer/Counter Port (Base + 10, Base + 11

    KPCMCIA-12AIAOH User’s Manual I/O Registers C-17 Timer/counter port (base + 10, base + 11) The timer/counter port can be accessed either as a 16-bit word at base + 8 or two consecutive bytes at base + 8 (low byte) and base + 9 (high byte). The port contains a 16-bit reload register, a 16-bit up-counter, a 16-bit read latch register, and the associated control logic.

  • Page 53: Timer/Counter Clock Source

    C-18 I/O Registers KPCMCIA-12AIAOH User’s Manual Timer/counter clock source Bit 2 of the auxiliary control register (base + 15, write) selects the timer/counter clock source. It is either the internal 1MHz clock (bit 2 is 0) or the external clock (bit 2 is 1). Because of the pin confinement, the timer/counter external clock input is shared with the A/D external clock input,...

  • Page 54: Auxiliary Control Register (Base + 15, Write Only

    KPCMCIA-12AIAOH User’s Manual I/O Registers C-19 Auxiliary control register (base + 15, write only) This register configures the operation of A/D, D/A, and the timer counter. It is 8-bit wide and write only. Refer to Table C-18. Bit 7 selects between TTL and analog trigger source. Bit 6 sets the pre- trigger option.

  • Page 55: Auxiliary Status Register (Base + 15, Read Only

    C-20 I/O Registers KPCMCIA-12AIAOH User’s Manual Auxiliary status register (base + 15, read only) Bits 0 to 3 and bit 7 in this register are organized for bits in the status register (base + 2) and can be referenced without the associated side effect of “clear after read” on the latched events. Back- ward compatibility is kept by preserving the “clear after read”...
  • Page 56 Index A/D converter and data FIFO 3-4 D/A channel output C-15 A/D interrupt enable C-8 D/A circuit 3-7 A/D state machine 3-6 D/A data port (base + 8, base + 9) C-15 Analog input multiplexer 3-3 D/A port interface C-15 Analog input offset correction C-8 D/A update modes C-16 Analog trigger threshold C-9...
  • Page 57 Features 1-3 Pacer clock (base + 4, + 5, + 6; write only) C-12 FIFO flags C-5 PCMCIA interface B-1 Flush data FIFO command C-13 Programmable gain control 3-3 Flush scan list queue command C-13 Reading the contents of the timer/counter C-18 Getting started 1-2 Scan list 3-3 Hardware setup 2-2...
  • Page 58 Specifications are subject to change without notice. All Keithley trademarks and trade names are the property of Keithley Instruments, Inc. All other trademarks and trade names are the property of their respective companies. Keithley Instruments, Inc. 28775 Aurora Road • Cleveland, Ohio 44139 • 440-248-0400 • Fax: 440-248-6168 1-888-KEITHLEY (534-8453) •...

Table of Contents