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Teknor Industrial Computers TEK-CPCI 1003 Technical Reference Manual

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TEK-CPCI 1003
CompactPCI Mobile PENTIUM II SBC
VERSION 1.1b
TECHNICAL REFERENCE MANUAL
November 1998
ref.: M1003_1-1
NOTE:
This manual is for reference purpose only.
Reproduction in whole or in part is authorized provided
TEKNOR INDUSTRIAL COMPUTERS INC. is cited as
the original source.

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  • Page 1 CompactPCI Mobile PENTIUM II SBC VERSION 1.1b TECHNICAL REFERENCE MANUAL November 1998 ref.: M1003_1-1 NOTE: This manual is for reference purpose only. Reproduction in whole or in part is authorized provided TEKNOR INDUSTRIAL COMPUTERS INC. is cited as the original source.

  • Page 2: Table Of Contents

    TABLE OF CONTENTS PART ONE – Product Description PRODUCT OVERVIEW ................1-1 COMPATIBILITY WITH TEKNOR PRODUCTS ......... 2-1 UNPACKING ..................... 3-1 SAFETY PRECAUTIONS ................4-1 ..................4-1 TATIC LECTRICITY ................4-1 TORAGE NVIRONMENT ..................4-1 OWER UPPLY ONBOARD INTERCONNECTIVITY ............5-1 ................
  • Page 3 TEK-CPCI-1003 Technical Reference Manual PART TWO – Feature Description ONBOARD FEATURES................7-1 ................7-1 OMPACT LASH NTERFACE IDE I ................. 7-3 NHANCED NTERFACES ................7-4 THERNET NTERFACES ................7-6 LOPPY NTERFACE ..............7-6 EYBOARD OUSE NTERFACE ..................7-7 ARALLEL .................. 7-9 OWER ANAGEMENT SCSI I...
  • Page 4 Table of Contents 11. CPCI I/O SIGNALS .................. 11-1 11.1 J3 S ................11-1 IGNAL PECIFICATION 11.2 J4 S ................11-3 IGNAL PECIFICATION 11.3 J5 S ................11-6 IGNAL PECIFICATION PART FOUR – Software Setups 12. AWARD SETUP PROGRAM ..............12-1 12.1 ............
  • Page 5 PRODUCT DESCRIPTION PRODUCT OVERVIEW COMPATIBILITY WITH TEKNOR PRODUCTS UNPACKING SAFETY PRECAUTIONS ONBOARD CONNECTIVITY MEZZANINE CONCEPTS...

  • Page 6: Product Overview

    1. PRODUCT OVERVIEW ® The TEK-CPCI-1003 is the first CompactPCI™ industrial SBC based on the Intel’s Pentium ® II processor in a ‘mini-cartridge’ package (Mobile Pentium II). The board supports 233MHz, 266MHz, 300MHz, and future processors, 512KB L2 pipelined burst cache and Intel’s 82443BX and 82371AB PIIX4E chipset. It features J3/J4/J5 de-facto industry standard connectors to handle I/O signals such as serial, parallel, and USB ports, Ethernet, video and V-Port, SCSI, and IDE interfaces, keyboard, speaker, mouse, and reset signals, SMBus and power.
  • Page 7 TEK-CPCI-1003 Technical Reference Manual § Supported Processors Single 233MHz, 266MHz, or 300MHz Mobile Pentium II processor with Intel’s 82443BX and 82371AB PIIX4 chipset. § Memory System memory: The TEK-CPCI-1003 supports from 8MB to 384MB vertical SDRAM on three 168-pin DIMMs sockets with ECC capabilities.
  • Page 8 Product Overview § Interfacing with the Environment CPCI The TEK-CPCI-1003 SBC is provided for rack-mounted systems. Through the J1/J2 segment, the board can drive up to seven external CompactPCI slots, supporting individual REQ/GNT arbitration signals and individual clocks. All I/O signals are duplicated and available through the J3/J4/J5 I/O segment to be distributed to their respective I/O connectors located on the backplane.

  • Page 9: Compatibility With Teknor Products

    2. COMPATIBILITY WITH TEKNOR PRODUCTS The TEK-CPCI-1003 CPU Single Board Computer is a member of the TEKNOR CompactPCI product family. The board is fully compliant with the PICMG 2.0 R2.1 CompactPCI specification for the PCI bus segment. When building a basic environment around the TEK-CPCI-1003, the system may be composed with any of the following devices: §...

  • Page 10: Unpacking

    3. UNPACKING Follow these recommendations while unpacking: 1. After opening the box, save it and the packing material for possible future shipment. 2. Remove the board from its antistatic wrapping and place it on a grounded surface. 3. Inspect the board for damage. If there is any damage, or items are missing, notify TEKNOR immediately.

  • Page 11: Safety Precautions

    4. SAFETY PRECAUTIONS 4.1 STATIC ELECTRICITY Since static electricity can damage the board, the following precautions should be taken: 1. Keep the board in its antistatic package, until you are ready to install it. 2. Touch a grounded surface or wear a grounding wrist strap before removing the board from its package;...

  • Page 12: Onboard Interconnectivity

    5. ONBOARD INTERCONNECTIVITY The TEK-CPCI-1003 is not only a matter of computation power. The board also provides a high capability to interface with peripherals through three integrated chipsets: . Host-to-PCI bridge - 443BX from Intel: interface with the processor (host), system memory, video controller, and Primary PCI bus (3.3V / 33MHz).
  • Page 13 TEK-CPCI-1003 Technical Reference Manual TEK-CPCI-1003 Block Diagram XTAL Intel Mobile Pentium II 512KB L2 Cache Switching Clocks MPII Core Regulators System Clock Synthes. & 233/266MHz Buffers Thermal Sensor VCores SMBus 21150 2M RAM, PCI- APIC Rambus Bridge 3x168P Connector DIMM Jn1/Jn2 Intel &...
  • Page 14 Onboard Interconnectivity n 21150 PCI-to-PCI Bridge The 21150 is a 32/32-bit 33MHz PCI-to-PCI bridge that allows the board to support up to seven loads on its secondary PCI bus through a passive backplane. The bridge is fully compliant the PCI Local Bus Specification, Rev. 2.1. It provides full support for delayed transactions, which enables the buffering of memory read, I/O and configuration transactions.

  • Page 15: Connector Location

    TEK-CPCI-1003 Technical Reference Manual 5.1 CONNECTOR LOCATION...

  • Page 16: Onboard Connectors And Headers

    Onboard Interconnectivity 5.2 ONBOARD CONNECTORS AND HEADERS § Fan Header (J7) The +12V DC CPU fan power supply is provided through this header. § Processor Socket (J9) Mobile Pentium II processor dedicated connector. § CompactFlash Connector (J11) This connector is dedicated to the TEKNOR’s CompactFlash module to support CompactFlash disks.

  • Page 17: Front Plate Connectors

    TEK-CPCI-1003 Technical Reference Manual 5.3 FRONT PLATE CONNECTORS § Video Connector (J8) Standard 15-pin DSUB female connectors. § Reset Button Use a small tool to press the button and proceed to a hardware reset of the board. § IDE/SCSI LEDs When lit indicate there is an activity on IDE/SCSI devices.

  • Page 18: Compactpci Connectors

    Onboard Interconnectivity 5.4 COMPACTPCI CONNECTORS § CPCI J5 Connector Supports PS/2 mouse, serial ports 1 and 3, first IDE channel, parallel port, keyboard, speaker, floppy disk, reset, USB, SMBus and power signals. § CPCI J4 Connector Supports Ethernet 0, second IDE channel, SCSI, VGA, and power signals.

  • Page 19: Mezzanine Concepts

    6. MEZZANINE CONCEPTS The capability of the TEK-CPCI-1003 to connect with other devices is enforced by three mezzanine board concepts TEKNOR has implemented on the board. A fully equipped TEK-CPCI-1003 board may appear as follows:...

  • Page 20: Proprietary Mezzanine Concept

    TEK-CPCI-1003 Technical Reference Manual 6.1 PROPRIETARY MEZZANINE CONCEPT This is TEKNOR’s proprietary concept to expand the I/O capability of the board. It is built around two connectors: § J14: which handles a complete PCI signal set (Primary bus) including the REQ/GNT arbitration signal pair (REQ4/GNT4).

  • Page 21: Compactflash Feature

    Mezzanine Concepts 6.3 COMPACTFLASH FEATURE The TEK-CPCI-1003 board also supports standard CompactFlash disks through a CompactFlash module. CompactFlash disk is becoming a new standard method of storing and transferring data. It is supported on the board as a standard IDE drive and connects to the EIDE 0 interface. The CompactFlash drive can be set as a Master or Slave device and combined with any standard hard disk drive.
  • Page 22 FEATURE DESCRIPTION ONBOARD FEATURES...

  • Page 23: Onboard Features

    7. ONBOARD FEATURES 7.1 COMPACTFLASH INTERFACE The board supports an IDE compatible flash disk by using a CompactFlash module. CompactFlash (C-Flash) disks are the world’s smallest resident industry-standard ATA/IDE subsystem for application, data, image, and audio storage. They have the same functionality and capabilities as intelligent disk drives, but with the advantages of being very compact, rugged (typical M.T.B.F.
  • Page 24 TEK-CPCI-1003 Technical Reference Manual 3. To connect the module to the SBC, line up the J11 connector and the module’s connector, and then press the module firmly into the connector to engage the connector and the spacers. CompactFlash Module CompactFlash Disk Onboard CompactFlash Connector...

  • Page 25: Enhanced Ide Interfaces

    Onboard Features 7.2 ENHANCED IDE INTERFACES The board features two Enhanced IDE interfaces dedicated to Primary and Secondary EIDE logical interfaces. Each support up to two IDE devices (including CD-ROMs, hard disks, plus CompactFlash on the secondary IDE interface) with independent timings, in Master/Slave combination.

  • Page 26: Ethernet Interfaces

    TEK-CPCI-1003 Technical Reference Manual 7.3 ETHERNET INTERFACES Both Ethernet controllers reside on the Primary PCI bus and are therefore Plug and Play by default. No manual configuration is required. Each interface supports 10Base-T and 100Base-TX specifications: 10Mbps and 100Mbps network speeds are automatically detected and switched. SIGNAL PATH Ethernet signal path depends on the output configuration you have ordered for the board.
  • Page 27 Onboard Features § CPCI I/O Configuration Ethernet 0 and 1 signals are respectively available on J4 and J3 CPCI I/O connectors only when the board is ordered for rear panel output operations. Setting the board to operate in rear panel output configuration requires the installation of zero ohm resistors on the board to connect signals to the connectors.

  • Page 28: Floppy Disk Interface

    TEK-CPCI-1003 Technical Reference Manual 7.4 FLOPPY DISK INTERFACE The onboard floppy disk controller is IBM PC XT/AT compatible (single and double density), and supports Enhanced Floppy mode (2.88MB). It handles 3.5” and 5.25”, low and high density drives. Up to two drives can be supported in any combination. SIGNAL PATHS The Floppy Disk Controller interface is available through the J5 CPCI I/O connector and through the J19 Mezzanine connector.

  • Page 29: Parallel Port

    Onboard Features PARALLEL PORT The TEK-CPCI-1003 features one multi-mode parallel port. It is compatible with standard Mode IBM PC/XT, PC/AT, and PS/2 compatible bi-directional parallel port, Enhanced Parallel Port (EPP), and Enhanced Capabilities Port (ECP). SIGNAL PATHS The Parallel Port interface is available through the J5 CPCI I/O connector only. The differences between Standard, EPP, and ECP modes appear in the signal assignation of the pins on the connector.
  • Page 30 TEK-CPCI-1003 Technical Reference Manual 7.6.1 Standard Mode The Standard mode is unidirectional. It is supported to maintain the compatibility with the IBM PC standard. 7.6.2 EPP Mode The EPP (Enhanced Parallel Port) mode consists of a hardware independent method of accessing a parallel port configured as EPP.

  • Page 31: Power Management

    Onboard Features 7.7 POWER MANAGEMENT Power Management features are supported at the BIOS level. All Power Management options are described in Section 12.3.4 – Power Management Setup. 7.8 SCSI INTERFACE The board features wide UltraSCSI interface with 32-bit PCI bus master control and zero wait state transfer capabilities.

  • Page 32: Serial Ports

    TEK-CPCI-1003 Technical Reference Manual 7.9 SERIAL PORTS Four full function serial ports are provided on the board for asynchronous serial communications. They are 16C550 high-speed UART compatible and support 16-byte FIFO buffers for transfer rates at up to 230 and 460Kbaud. Each serial port is specified as follows: Designation Communication Mode...
  • Page 33 Onboard Features 7.9.2 Serial Port 2 Serial Port 2 is buffered directly for RS-232 operations and is 16C550 PC-Compatible. The interface includes the complete signal set for handshaking, modem control, interrupt generation, and data transfer. When assigned as COM2 logical port, the port is 100% compatible with the IBM-AT serial port.
  • Page 34 TEK-CPCI-1003 Technical Reference Manual Upon a power-up or reset, the Serial Port 3 interface circuits are automatically configured for the operation mode setup in the BIOS. The Serial Port 3 signal assignation on the J5 CPCI I/O connector depends on the operation mode (RS-232, RS-422, or RS-485) it has been set: Pin Number (J5) RS-232 RS-422...
  • Page 35 Onboard Features § RS-485 Protocol: The RS-485 protocol (Half Duplex) also uses differential signals during a communication session. It differs from the RS-422 mode as it offers the ability to transmit and receive over the same pair of wires, and allows the sharing of the communication line by multiple stations. This configuration (also known as Party Line) allows only one system to take control of the communication line at the time.

  • Page 36: Thermal Management

    TEK-CPCI-1003 Technical Reference Manual 7.10 THERMAL MANAGEMENT Two temperature sensors are provided to supervise the thermal environment. One is used to monitor the CPU die temperature, while the second one, located on the casing, allows the monitoring of the ambient temperature around the CPU. The temperature is controlled according to two temperature levels, the Low temperature limit, which indicates normal operating conditions, and the High temperature limit, which indicates an overheating condition.

  • Page 37: Usb Interfaces

    Onboard Features 7.11 USB INTERFACES Signals for two USB ports are available through the J5 CPCI I/O connector. USB is becoming the new essential peripheral interface. The USB strengths are as follows: capability to daisy chain as many as 127 devices per interface, fast bi-directional, isochronous/asynchronous interface, 12Mbps transfer rate, and standardization of peripheral interfaces into a single format.

  • Page 38: Video Interface

    TEK-CPCI-1003 Technical Reference Manual 7.12 VIDEO INTERFACE The high-performance video capability of the board is based on the latest Accelerated Graphics Port (AGP) technology. The video controller, CL-GD5465 from Cirrus Logic, connects directly to the Primary PCI bus, and interfaces with 2MB onboard video memory through the Rambus channel (600MB/sec bandwidth).
  • Page 39 Onboard Features 7.12.1 Supported Resolutions The maximum video resolution and performance depend directly on the drivers running with your software application. Resolution and number of colors specification are listed below: Resolution Number of Colors 640x480, 800x600, 1024x768, 1280x1024, 1600x1200 256 (8 bits) 640x480, 800x600, 1024x768 65,536 (16 bits) 640x480, 800x600...

  • Page 40: V-Port

    TEK-CPCI-1003 Technical Reference Manual 7.13 V-PORT V-Port signals are provided as a dedicated video path to the display memory. It is intended to support a source of live video incoming from an external video source. The enhanced V-Port captures video off-screen buffers from which it is displayed with resizing and color space conversion.
  • Page 41 INSTALLATION AND SETTINGS CUSTOMIZING THE BOARD SETTING JUMPERS BUILDING A CPCI SYSTEM CPCI I/O SIGNALS...

  • Page 42: Customizing The Board

    8. CUSTOMIZING THE BOARD 8.1 PROCESSOR AND FAN Your board will be installed with one of the available Mobile Pentium II processor: 233MHz, 266MHz or 300MHz, and its adequate cooling system. 8.1.1 Installing Microprocessor Since CPUs are very sensitive components, particular attention should be given while installing a processor on the board.

  • Page 43: Backup Memory

    TEK-CPCI-1003 Technical Reference Manual 8.2 BACKUP MEMORY An onboard 3.6V lithium battery is provided to backup BIOS setup values and the real time clock (RTC). 3.6V Lithium Battery Positive Pin Negative Pin (centered pin) (outer pin) Negative Contact Positive Contact Onboard Battery Connector When replacing, the battery must be connected as follows:...

  • Page 44: Installing Memory

    Customizing the Board 8.3 INSTALLING MEMORY 8.3.1 SDRAM System Memory The TEK-CPCI-1003 supports three 168-pin DIMM (Dual In-Line Memory Module) sockets for memory configuration from 8MB to 384MB of Synchronous DRAM (SDRAM) or 768MB using RSDRAM (Registered SDRAM). The memory characteristics must conform to the following: §...
  • Page 45 TEK-CPCI-1003 Technical Reference Manual The recommended DIMM devices are listed in the table below. Many other models are available and function equally well. Users are encouraged to check with their local distributors for comparable substitutes. SDRAM DIMM Module VENDOR PART NUMBER MRP Code 32MB - 4M*72 ROCKY MOUNTAIN RAM...

  • Page 46: Supervision Features

    Customizing the Board 8.4 SUPERVISION FEATURES The TEK-CPCI-1003 provides a set of programmable I/O registers to setup the Intel PIIX4 (I/O addresses 4030h to 4037h) and the XILINX CPLD (I/O addresses programmable at 190h-193h, 290h-293h or 390h-393h using the AWARD Chipset Features Setup). Only register bits needed to program the power fail detection and watchdog functions are described below.
  • Page 47 TEK-CPCI-1003 Technical Reference Manual 8.4.2 Watchdog The TEK-CPCI-1003 provides a two-stage watchdog to monitor the CPU inactivity. Its function is to issue a failure signal if the processor fails to refresh the watchdog within the watchdog timeout period. The feature is useful in embedded systems where human supervision is not required or impossible.
  • Page 48 Customizing the Board n Dual-Stage Watchdog The dual-stage watchdog consists of a second watchdog in cascade with the first one: in the event the first watchdog failed to toggle, the second stage is set to grant the system an additional 1.6s delay prior to the system reset. Before the second stage watchdog resets the system, the first watchdog output can be tied to the ISA’s IOCHK line to generate an NMI to the CPU, while the two watchdog values are stored.
  • Page 49 TEK-CPCI-1003 Technical Reference Manual 8.4.3 Thermal Management The thermal management is built around two digital temperature sensors and a thermal watchdog. Both devices can be programmed to set their outputs when the temperature of the processor or the ambient temperature exceeds a programmable high limit, and reset its output when the temperature is under a programmable low limit.

  • Page 50: Setting Jumpers

    9. Setting Jumpers Ten jumpers are available to configure the TEK-CPCI-1003: Jumper Description CPU Core Voltage - Use this jumper to setup the core voltage according to your CPU specification. Watchdog – enables Single or Dual Stage watchdog or disables the watchdog. IOCHK Line Assignation –...

  • Page 51: Jumper Location

    TEK-CPCI-1003 Technical Reference Manual JUMPER LOCATION...

  • Page 52: Jumper Settings (Table 1)

    Setting Jumpers JUMPER SETTINGS (Table 1)

  • Page 53: Jumper Settings (Table 2)

    TEK-CPCI-1003 Technical Reference Manual JUMPER SETTINGS (TABLE 2)

  • Page 54: Building A Cpci System

    10. BUILDING A CPCI SYSTEM When building a CompactPCI system, a minimum requirement consists in: a chassis with 6U slots, CompactPCI backplane, storage module, power supply unit, and ventilation system. The main AC power is drawn to the chassis components through an IEC power plug with a 2-stage filter, fuse holder and power switch.
  • Page 55 TEK-CPCI-1003 Technical Reference Manual 10.1.1 Backplane The TEK-CPCI-1003 is compatible with all standard CompactPCI passive backplanes available on the market. An entry-level backplane is provided by TEKNOR. It is referred to as TEK-CPCI-1103. It features 8 CPCI slots (one PCI I/O segment), and includes P3-P5 I/O connectors on all slots.
  • Page 56 Building a CPCI System The Rear I/O Transition module gathers all the I/O signals of the CPU board and makes them easily accessible through standard headers and connectors located at the rear of enclosure. The Rear I/O Transition module (TEK-CPCI-1071) is illustrated below: 10.1.3 Storage Devices A storage mezzanine (TEK-CPCI-1050/1051) attaches directly to the TEK-CPCI-1003.

  • Page 57: Installing The Board Into A Bay

    TEK-CPCI-1003 Technical Reference Manual 10.2 INSTALLING THE BOARD INTO A BAY The TEK-CPCI-1003 is a mechanical Eurocard form factor board. It takes advantages of the IEEE1101.10 specifications that ensure a mechanical interchange capability between different plug-in elements in sub-racks. Due to the high-density pinout of the Hard Metric connector, some precautions must be taken when connecting or disconnecting a board to/from a backplane: 1.
  • Page 58 Building a CPCI System 10.2.3 Connection To install the TEK-CPCI-1003 board into a bay, proceed as follows: 1. Power off your CompactPCI system 2. Locate the 6U system slot 3. Remove the front plate of the slot where you intend to insert the TEK-CPCI-1003 4.

  • Page 59: Cpci I/O Signals

    11. CPCI I/O SIGNALS This section describes integrated feature signals available on rear panel CPCI I/O connectors (J3, J4, and J5). 11.1 J3 SIGNAL SPECIFICATION 11.1.1 V-PORT Signal Pin Assignation (J3) Description VP-OUT Reserved ZVPCLK V-Port clock from the video source pixel clock VP-IN Reserved VACTI...
  • Page 60 TEK-CPCI-1003 Technical Reference Manual 11.1.4 Serial Port 3 Signal Pin Assignation (J3) Description /JDCD3 Data Carrier Detect JRXD3 Receive Data /JDSR3 Data Set Ready JTXD3 Transmit Data /JRTS3 Ready To Send /JCTS3 Clear To Send /JRI3 Ring Indicator /JDTR3 Data Terminal Ready 11.1.5 Serial Port 4 Signal Pin Assignation (J3)

  • Page 61: J4 Signal Specification

    CPCI I/O Signals 11.2 J4 SIGNAL SPECIFICATION 11.2.1 Power Management Signal Pin Assignation (J4) Description I2C-CLK I2C clock signal I2C-DATA I2C data signal Reserved /EXT-FAN0-FAIL Enclosure fan 0 fail /EXT-FAN1-FAIL Enclosure fan 1 fail /SM-BYPASS Reserved 11.2.2 SCSI Interface Signal Pin Assignation (J4) Description SCD 0-15...
  • Page 62 TEK-CPCI-1003 Technical Reference Manual 11.2.3 Video Interface Signal Pin Assignation (J4) Description VSDA Video serial data line (video I2C) VSCL Video serial clock line (video I2C) HSYNC Horizontal sync line VSYNC Vertical sync line Analog Red video signal GREEN Analog Green video signal BLUE Analog Blue video signal 11.2.4 Ethernet 0 Interface...
  • Page 63 CPCI I/O Signals 11.2.5 EIDE 1 Interface Signal Pin Assignation (J4) Description /BRSTDRV SDD 0-15 B20, E19, C19, A19, Sec. Disk Data – These signals are used to transfer D18, B18, E17, C17, data to or from the IDE device. D17, A18, C18, E18, B19, D19, A20, C20 SDREQ...

  • Page 64: J5 Signal Specification

    TEK-CPCI-1003 Technical Reference Manual 11.3 J5 SIGNAL SPECIFICATION 11.3.1 EIDE 0 Interface Signal Pin Assignation (J5) Description /BRSTDRV /BRSTDRV PDD 0-15 B4, E3, C3, A3, D2, B2, Prim. Disk Data – These signals are used to transfer E1, C1, D1, A2, C2, E2, data to or from the IDE device.
  • Page 65 CPCI I/O Signals 11.3.3 Floppy Disk Interface Signal Pin Assignation (J5) Description /FD-DRVEN 0-1 E7, A8 Drive 0-1 density select /FD-INDEX Index /FD-MTR 0-1 C8, A9 Motor 0-1 enable /FD-DS 0-1 E8, D8 Drive 0-1 select /FD-DIR Direction /FD-STEP Step pulse /FD-WDATA Write disk data /FD-WGATE...
  • Page 66 TEK-CPCI-1003 Technical Reference Manual 11.3.6 Parallel Port Signal Pin Assignation (J5) Description SLCT Printer select Paper end BUSY Busy signal /ACK Acknowledge handshake PD 0-7 E17, C17, A17, D16, Parallel port data bus C16, B16, A16, E15 /SLCTIN Printer select Auto line feed /INIT Initiate output...
  • Page 67 SOFTWARE SETUPS AWARD SETUP PROGRAM UPDATING THE BIOS WITH UPGBIOS VT100 MODE...

  • Page 68: Award Setup Program

    12. AWARD SETUP PROGRAM Normally the software setup will follow all system hardware connections in order to configure controllers and installed devices. Also, software setup should come before any operating systems and drivers are installed. NOTES Make sure you setup the AWARD software prior to installing your operating system and your drivers.

  • Page 69: Accessing The Award Setup Program

    TEK-CPCI-1003 Technical Reference Manual 12.1 ACCESSING THE AWARD SETUP PROGRAM The system BIOS (Basic Input Output System) provides an interface between the operating system and the hardware of the TEK-CPCI-1003 single board computer. The interface provided by AWARD is 100% IBM AT compatible. All functions accept similar inputs as IBM and provide the same results, although the program code itself is different.

  • Page 70: Using Award Setup Program

    AWARD Setup Program 12.2 USING AWARD SETUP PROGRAM The arrow keys (↑ ↓ → ←) are used to highlight items on the menu and the PAGEUP and PAGEDOWN keys are used to change the entry values for the highlighted item. To select an entry, press the ENTER key.
  • Page 71 TEK-CPCI-1003 Technical Reference Manual 12.2.2 Available Features The Main Menu includes the following categories: Standard CMOS This Setup page includes all the items in a standard, AT-compatible Setup BIOS (date, time, hard disk type, floppy disk type, video adapter type, and memory…).

  • Page 72: Setups

    AWARD Setup Program 12.2.3 Save & Exit Operations Use one of the following options available from the Main Menu: Save & Exit After having modified the AWARD Setup, you can save the configuration in CMOS RAM and the Flash BIOS, by selecting this option.
  • Page 73 TEK-CPCI-1003 Technical Reference Manual 12.3.1 Standard CMOS Setup This part of the setup allows you to set the time, date, hard disk type, types of floppy drives and video type. Date/Time The current values for each category are displayed. Enter new values through the keyboard.
  • Page 74 AWARD Setup Program 12.3.2 BIOS Features Setup This part of the setup handles options and features such as boot sequence, NUM LOCK, security options, shadowing, … BIOS Setup Option Possible Description Default Default Settings Virus Warning Dis. Dis. En., Dis. When Enabled, you receive a warning message if a program (specifically, a virus) attempts to write to the boot sector or the partition table of the hard disk drive.
  • Page 75 TEK-CPCI-1003 Technical Reference Manual BIOS Features Setup (Continued) BIOS Setup Option Possible Description Default Default Settings Typematic Rate Dis. En., Dis. When Disabled, the following Typematic Rate and Typematic Setting Delay are irrelevant. Keystrokes repeat at a rate determined by the keyboard controller in your system.
  • Page 76 AWARD Setup Program 12.3.3 Chipset Features Setup This part of the setup allows you to define chipset-specific options and features. BIOS Setup Option Possible Description Default Default Settings SDRAM CAS Latency 2, 3 For 100MHz SDRAM, set this option to 2 (clocks). Time For 66MHz SDRAM, set this option to 3 (clocks).
  • Page 77 TEK-CPCI-1003 Technical Reference Manual 12.3.4 Power Management Setup This part of the setup configures power conservation options. BIOS Setup Option Possible Description Default Default Settings ACPI Function Dis. En., Dis. When Enabled and the OS supports ACPI or OSPM (e.g., Win98, Window NT 5), power management functionality moves to the OS.
  • Page 78 AWARD Setup Program Power Management Setup (Continued) BIOS Setup Possible Option Description Default Default Settings 12.5%, 25.0%, When the system enters Doze mode, the CPU clock runs only Throttle Duty Cycle 75.0% 75.0% 37.5%, 50.0%, part of the time. You may select the percentage of time that the 62.5%, clock does not run.
  • Page 79 TEK-CPCI-1003 Technical Reference Manual 12.3.5 Thermal Management Setup This part of the setup configures thermal management options. BIOS Setup Option Possible Description Default Default Settings Thermal Management Dis. Dis. En., Dis. When this option is enabled, the CPU temperature is monitored. Whenever the CPU overheats, the CPU slows down to lower the temperature.
  • Page 80 AWARD Setup Program 12.3.6 PnP/PCI Configuration This part of the setup configures PnP/PCI options. BIOS Setup Option Possible Description Default Default Settings PNP OS Installed Yes, No If the operating system (OS) is Plug and Play (for example Windows 95), select “Yes” if you want the OS to allocate resources according to Plug and Play standards, or “No”...
  • Page 81 TEK-CPCI-1003 Technical Reference Manual 12.3.7 Integrated Peripherals This part of the setup configures Integrated Peripherals options. BIOS Setup Option Possible Description Default Default Settings IDE HDD Block Mode Dis. En., Dis. Block mode is also called block transfer, multiple commands, or multiple sector read/write.
  • Page 82 AWARD Setup Program Integrated Peripherals (Continued) BIOS Setup Possible Option Description Default Default Settings Standard, UART 3 Selects the operating mode for UART 3. IrDA 1.0, ISK-IR, IrDA 1.1 Duplex Select Half Half Half, Full IrDA 1.0, ISK-IR, IrDA 1.1 modes only: Select Half for one communication at a time, Full for simultaneous communication.

  • Page 83: Updating The Bios With Upgbios

    13. UPDATING THE BIOS WITH UPGBIOS UPGBIOS is an utility that allows you to take BIOS files from a disk and update the Boot Block Flash BIOS with them. The command line format is as follows: UPGBIOS [/ALL filename] [/VGA VGA_filename] [/?] [/h] where:...

  • Page 84: Cpld Upgrade After Abios Update

    TEK-CPCI-1003 Technical Reference Manual 13.1 CPLD UPGRADE AFTER A BIOS UPDATE During the first system bootup after you update the Boot Block Flash BIOS with the UPGBIOS utility, the BIOS may need to upgrade the CPLD devices. WARNING Whenever the BIOS performs a CPLD hardware upgrade, do not interrupt the system in any way (power down, reset, mouse or keyboard functions).
  • Page 85 Rebooting in 5 second(s). § If the update is not successful, the following message appears under the “Status:” line: ERROR: general failure programming CPLDs! Please contact Teknor Industrial Computers technical support. You must contact TEKNOR’s technical support for further instructions. 13-3...

  • Page 86: Vt100 Mode

    14. VT100 MODE The VT100 operating mode allows remote setups of the board. This configuration requires a remote terminal that must be connected to the board through a serial communication link. 14.1 REQUIREMENTS The terminal should emulate a VT100 or ANSI terminal. Terminal emulation programs such as Telix or Procomm can also be used.

  • Page 87: Running Without A Terminal

    TEK-CPCI-1003 Technical Reference Manual VT100 Full Setup VT100 Partial Setup 14.3 RUNNING WITHOUT A TERMINAL The board can boot up without a screen or terminal attached. However, if VT100 Mode is desired, but the terminal is to be disconnected, you must ensure the control lines are in an active state.
  • Page 88 APPENDIX BOARD SPECIFICATIONS MEMORY AND I/O MAPS BOARD DIAGRAMS CONNECTOR PINOUTS BIOS SETUP ERROR CODES 14-1...
  • Page 89 A. BOARD SPECIFICATIONS TEK-CPCI-1003 DESCRIPTION ® Overview Intel Mobile Pentium II based CompactPCI System Board ® Supported Intel Mobile Pentium 233MHz, 266MHz and Microprocessors 300MHz Bus Interface CompactPCI bus, 32-bit (33MHz) through J1 and J2 PCI Mezzanine (PMC) Proprietary Mezzanine with PCI bus, FD and EIDE interfaces SMBus (for power management, DRAM control) Data Path: 64-bit on CPU and video memory;...
  • Page 90 TEK-CPCI-1003 Technical Reference Manual TEK-CPCI-1003 DESCRIPTION Video 64-bit AGP video controller (Cirrus Logic GD5465) 2MB Rambus video memory. CRT only. V-Port (Asynchronous Digital Video) interface supporting video on graphics, and graphics on video overlays; V-Port signals are accessible rear I/O connector Connectors Front Plate...
  • Page 91 Board Specifications ® ® ® ® Operating System MS-DOS , Windows 95, Windows NT, VxWorks , Psos Compatibility 9.2 x 6.3 x 1.6 inches / 233 x 160 x 41 mm Dimensions 6U x 8HP board mechanically compliant to IEEE 1101.10 ; compliant to PICMG 2.0 Rev 2.1.
  • Page 92 B. MEMORY & I/O MAPS MEMORY MAPPING Address Function 00000-9FFFF 0-640 KB DRAM A0000-BFFFF Video DRAM C0000-CBFFF Video BIOS D8000-FFFFF System DRAM LAN BIOS around 30KB if activated, address may vary SCSI BIOS 18KB at runtime, 2KB if no device, address may vary 100000-Top of DRAM 1 MB - Top of DRAM...
  • Page 93 TEK-CPCI-1003 Technical Reference Manual I/O MAPPING Address Optional Optional Optional Function Address Address Address 000-01F DMA Controller 1 020-03F Interrupt Controller 1 040-05F Timer 060-06F Keyboard 070-07F Real-time clock 080-09F DMA Page Register 0A0-0BF Interrupt Controller 2 0C0-0DF DMA Controller 2 0F0-0F1, Math Coprocessor 0F8-0FF...
  • Page 94 Memory & I/O Maps IRQ LINES The board is fully PC compatible with interrupt steering for PCI plug and play compatibility. Controller # 1 Controller # 2 IRQ 0 Timer Output 0 IRQ 8 Real-Time Clock IRQ 1 Keyboard (Output Buffer Full) IRQ 9 Available IRQ 2...
  • Page 95 C. BOARD DIAGRAMS ASSEMBLY - TOP DIAGRAM...
  • Page 96 D. CONNECTOR PINOUTS TEK-CPCI-1003 connectors and headers are listed below: CPCI Bus Connector CPCI Bus Connector CPCI I/O Connector CPCI I/O Connector CPCI I/O Connector Fan Connector CRT VGA Connector (Front panel configuration only) Serial Port 1 – RS-232 (Front panel configuration only) CompactFLASH Disk Connector Ethernet 1 Connector (Front panel configuration only) Mezzanine PCI Connector...
  • Page 97 TEK-CPCI-1003 Technical Reference Manual J1, J2 – CPCI BUS CONNECTORS ROW “A” ROW “B” ROW “C” Ref. SIGNAL Ref. SIGNAL Ref. SIGNAL -12V /TRST /INTA /INTB /INTC N.C. VI/O N.C. N.C. /RST /REQ0 +3.3V AD30 AD29 AD28 AD26 VI/O /CBE3 N.C.
  • Page 98 Connector Pinouts ROW “D” ROW “E” PINOUT Ref. SIGNAL Ref. SIGNAL (Top View) +12V /INTD IRQ14 IRQ15 /GNT0 CLK0 AD31 AD27 AD25 AD24 AD22 AD20 AD19 /C/BE2 /TRDY (P1) (P1) /STOP /LOCK /PERR /CBE1 AD13 AD11 AD10 N.C. /CBE0 +3.3V ----- ------ ---------------...
  • Page 99 TEK-CPCI-1003 Technical Reference Manual J3 – CPCI I/O CONNECTORS ROW “A” ROW “B” ROW “C” Ref. SIGNAL Ref. SIGNAL Ref. SIGNAL VP-OUT ZVPCLK VP-IN VSCL2 /VP-HSYNC VSDA2 ACTLED0 PEEP Reserved ACTLED1 Reserved ETX+1 ETX-1 ERX+1 (P3) Reserved N.C. /JDCD4 JRXD4 /JRTS4 /JCTS4 /JRI4...
  • Page 100 Connector Pinouts ROW “D” ROW “E” PINOUT Ref. SIGNAL Ref. SIGNAL (Top View) VACTI VP-VSYNC /EN-CAM PEED Reserved Reserved Reserved Reserved ERX-1 (P3) (P3) Reserved Reserved /JDSR4 JTXD4 /JDTR4 /JDSR3 JTXD3 /JDTR3 N.C. N.C. N.C. N.C. N.C. N.C. 2-IRRX 2-IRTX PWROK-33 N.C.
  • Page 101 TEK-CPCI-1003 Technical Reference Manual J4, J5 – CPCI I/O CONNECTORS ROW “A” ROW “B” ROW “C” Ref. SIGNAL Ref. SIGNAL Ref. SIGNAL I2C-CLK I2C-DATA SM-B /CD11 /CD10 YPASS /SIO /SREQ /RST /ACK /BSY TERMPWR /WIDEPS /CD7 /DPL /CD2 /CD4 /CD3 /CD15 /CD14 N.C.
  • Page 102 Connector Pinouts ROW “D” ROW “E” PINOUT Ref. SIGNAL Ref. SIGNAL (Top View) /DEG1 /SCD8 /SSEL /SMSG /SATN TERMPWR /SDC6 /SCD5 /SCD1 /SCD0 /SCD1 /SCD12 VSDA N.C. GREEN IGND N.C. N.C. (P4) (P4) ERX-0 SDD8 SDD6 SDD4 SDD11 SDD13 SDD1 N.C.
  • Page 103 TEK-CPCI-1003 Technical Reference Manual FAN CONNECTOR (J7) Front View Pin # Signal +12V DC CRT VGA CONNECTOR (J8) Signal Signal Signal Top View Analog GND Not Connected GREEN Analog GND Not Connected BLUE Analog GND HSYNC Not Connected Not Connected VSYNC Not Connected SERIAL PORT 1 - RS-232 (J10)
  • Page 104 Connector Pinouts COMPACTFLASH DISK CONNECTOR (J11) Top View Pin Number Pin Number Signal Signal CS3# Not Connected RPCS1# Not Connected IOR# PDIAG# IOW# RIRQ14 BRSTDRV# To W5 jumper CFLASH-ACT# Not Connected IOCS16# ETHERNET 1 CONNECTOR (J12) Top View Signal Green Not Connected Not Connected Yellow...
  • Page 105 TEK-CPCI-1003 Technical Reference Manual MEZZANINE PCI CONNECTOR (J14) Top View 5V_KEY Reserved AD00 VI/O (5V) AD02 AD01 AD05 AD04 AD03 C/BE0# AD07 AD06 AD09 AD08 AD11 VI/O (5V) AD10 MM66EN AD14 AD13 AD12 +3.3V C/BE1# AD15 +3.3V SERR# SB0# PERR# +3.3V SDONE STOP#...
  • Page 106 Connector Pinouts D.10 ETHERNET 0 CONNECTOR (J15) Top View Signal Green Not Connected Not Connected Yellow Not Connected Not Connected D.11 MEZZANINE STORAGE CONNECTOR (J19) Top View PDD0 MCLK MDATA PDD1 PDD2 KBDAT KBCLK PDD3 PDD4 VCC-KBDF PDD5 PDD6 PDD7 PDD8 PDD9 PDD10...
  • Page 107 TEK-CPCI-1003 Technical Reference Manual D.12 PMC CONNECTOR (J20) Top View Pin Number Pin Number Signal Top View Signal Not Connected -12V INTA# INTB# INTC# BUSMODE1# INTD# Not Connected Not Connected PCLK-PMC GNT-PMC# REQ-PMC# AD31 AD28 AD27 AD25 C/BE3# AD22 AD21 AD19 AD17 FRAME#...
  • Page 108 Connector Pinouts D.13 PMC CONNECTOR (J21) Top View Pin Number Pin Number Signal Top View Signal +12V Not Connected Not Connected Not Connected Not Connected Not Connected Not Connected Not Connected BUSMODE2# 3.3V PCIRST# BUSMODE3# 3.3V BUSMODE4# Not Connected AD30 AD29 AD26 AD24...
  • Page 109 E. BIOS SETUP ERROR CODES POST BEEP POST beep codes are defined in the BIOS to provide low level tone indication when an error occurs during the BIOS initialization. Beep codes consist of a combination of long and short beeps. They are described as follows: Beep Codes Post code...
  • Page 110 TEK-CPCI-1003 Technical Reference Manual ERROR MESSAGES One or more of the following messages may be displayed if the BIOS detects an error during the POST. This list includes messages for both the ISA and EISA BIOS. CMOS BATTERY HAS FAILED CMOS battery is no longer functional.
  • Page 111 BIOS Setup Error Codes ERROR ENCOUNTERED INITIALIZING HARD DRIVE Hard drive cannot be initialized. Be sure the adapter is installed correctly and all cables are correctly and firmly attached. Also be sure the correct hard drive type is selected in Setup. ERROR INITIALIZING HARD DRIVE DISK CONTROLLER Cannot initialize controller.
  • Page 112 TEK-CPCI-1003 Technical Reference Manual MEMORY VERIFY ERROR AT ... Indicates an error verifying a value already written to memory. Use the location along with your system’s memory size in the memory map to locate the bad chip. OFFENDING SEGMENT This message is used in conjunction with the I/O CHANNEL CHECK and RAM PARITY ERROR messages when the segment that has caused the problem cannot be isolated.
  • Page 113 BIOS Setup Error Codes POST CODES POST # Designation Description BOOT BLOCK Boot Block in EMERGENCY : Clear Base Memory Area. Initialize Chips Clear CMOS shutdown byte. Initialize EISA extended registers. (Not for us since we don’t have EISA bus.) Test Memory Refresh Toggle RAM must be periodically refreshed in order to keep the memory from decaying.
  • Page 114 TEK-CPCI-1003 Technical Reference Manual POST # Designation Description Initialize Keyboard Open Xilinx I/O Port Boot Block 1 : Verify BIOS location to x90h (X=1,2 or checksum. 3) inside the chipset (if necessary). Disable (if necessary). Boot Block in EMERGENCY 2 Thermal Management.
  • Page 115 BIOS Setup Error Codes POST # Designation Description Test Struck 8259's Interrupt Bits Nothing Test 8259 Interrupt functionality Force an interrupt and verify that the interrupt occurred (IRQ 0 - clock int. 8h). Test Struck NMI Bits (Parity/ IO Nothing. check) 1A-1E Reserved...
  • Page 116 TEK-CPCI-1003 Technical Reference Manual POST # Designation Description Pre-Boot Enable Enable Parity checker. Enable NMI. Enable cache before boot. Initialize Option (ROM scan) Call POST 81 Initialize any ROMs present from C8000h to DBFFFh. Disable POST code from segment E0000h. Initialize any ROMs present from DC000h to E0800h.
  • Page 117 BIOS Setup Error Codes POST # Designation Description Very Early Initialization OEM Specific – Initialize hardware before any other hardware initialization. CB-CF Reserved Reserved Power Management Full speed Trying to go back or into full speed mode. Power Management -- Doze Trying to go or in Doze mode.
  • Page 118 F. EMERGENCY PROCEDURE Follow this procedure only in case of emergency such as a critical error occurred during the Boot Block Flash BIOS update (when using UBIOS utility program or saving VIP-UP parameters flash) or if you meet one of the following symptoms at anytime: 1.
  • Page 119 TEK-CPCI-1003 Technical Reference Manual GENERATE AN EMERGENCY FLOPPY DISKETTE: Use a system that has a 1.44 Mbytes floppy drive A. 1. Insert the TEKNOR EMERGENCY diskette in drive A: 2. Copy the two files WDISK.COM and EMERDISK.TEK from drive A: to your hard drive (those files are available in your TEKNOR diskette package).
  • Page 120 J7G 2A7 CANADA LIMITED WARRANTY TEKNOR INDUSTRIAL COMPUTERS INC. ("the seller") warrants its boards to be free from defects in material and workmanship for a period of two (2) years commencing on the date of shipment. The liability of the seller shall be limited to replacing or repairing, at the seller's option, any defective units.
  • Page 121 PCI-941 Technical Reference Manual Returning Defective Merchandise If your TEKNOR product malfunctions, please do the following before returning any merchandise: 1) Call our Technical Support department in Canada at (450) 437-5682. Make certain you have the following at hand: the TEKNOR Invoice #, your Purchase Order #, and the Serial Number of the defective board.
  • Page 122 RETURN TO MANUFACTURER AUTORIZATION REQUEST Contact Name: Company Name: Street Address: City: Province / State: Country: Postal / Zip Code: Phone Number: Fax Number: Extension: Fax this form to TEKNOR's Technical Support department in Canada at (450) 437-8053...

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