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PAGE# DESCRIPTION NOTE AC IN BLOCK DIAGRAM 3V/5VPCU SYSTEM INFORMATION SB820 SMBUS Pin NO. SMBUS Function Define ONTARIO MEM & PCIE I/F(1/3) NBSWON# PCLK_SMB AD22 ONTATIO DISPLAY/CLK/MI(2/3) DDR / RFID DNBSWON# PDAT_SMB AE22 ONTARIO POWER & DECOUP(3/3) (+3V) S5_ON/S5 DDR3 SO-DIMM (STD=8) SB_SMBCLK1 not used SB_SMBDATA1...
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M_A_DQ[0..63] 6,7 +1.5V_SUS 5,6,7,22,30 VDD_10 5 U17E U17E M_A_A[15:0] M_A_A0 M_A_DQ0 M_ADD0 M_DATA0 ONTARIO (2.0) ONTARIO (2.0) M_A_A1 M_A_DQ1 M_ADD1 M_DATA1 PART 1 OF 5 PART 1 OF 5 M_A_A2 M_A_DQ2 This page is different AMD Nile M_ADD2 M_DATA2 M_A_A3 M_A_DQ3 M_ADD3 M_DATA3...
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4,5,6,7,10,11,12,13,14,16,18,19,22,23,24,26,27,28,29,30,31 SCL0/SDATA0 is 3V tolerance Clock gen/Robson/TV +3V_S5 8,10,11,12,15,21,22,26 AMD datasheet define it tuner /DDR3/DDR3 R125 R125 2.2K_4 2.2K_4 PCLK_SMB thermal/Accelerometer R131 R131 2.2K_4 2.2K_4 PDAT_SMB U18D U18D This page is different AMD Nile APU_MEMHOT# T144 T144 PCI_PME#/GEVENT4# USBCLK/14M_25M_48M_OSC T163 T163 RI#/GEVENT22# SPI_CS3#...
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AVDD_SATA 11 4,5,6,7,9,11,12,13,14,16,18,19,22,23,24,26,27,28,29,30,31 SATA PORT 0,1,2,3 +3V_S5 8,9,11,12,15,21,22,26 can support AHCI PLACE SATA AC COUPLING mode U18B U18B CAPS CLOSE TO Hudson M1 Hudson M1 Hudson M1 This page is different AMD Nile C592 C592 .01U/16V/X7R_4 .01U/16V/X7R_4 SATA_TXP0_C AH28 T123 T123 SATA_TXP0 SATA_TX0P...
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4,5,6,7,9,10,12,13,14,16,18,19,22,23,24,26,27,28,29,30,31 +1.1V 22,28,31 +3V_S5 8,9,10,12,15,21,22,26 +1.1V_S5 28 AVDD_SATA 10 VDDIO_AZ This page is different AMD Nile PLACE ALL THE DECOUPLING CAPS ON THIS SHEET CLOSE TO SB AS POSSIBLE. +1.1V 42mA U18E U18E U18C U18C 790mA 35mil viax2 Hudson M1 Hudson M1 Part 3 of 5 Part 3 of 5...
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VDDIO_AZ 11 4,5,6,7,9,10,11,13,14,16,18,19,22,23,24,26,27,28,29,30,31 +3V_S5 8,9,10,11,15,21,22,26 OVERLAP COMMON PADS WHERE intermal have pull Hi 10K , confirm AMD POSSIBLE FOR DUAL-OP RESISTORS. ward this pull Hi not need REQUIRED STRAPS VDDIO_AZ DEBUG STRAPS R430 R430 R431 R431 R427 R427 R413 R413 10K/F_4 10K/F_4 *10K/F_4...
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OPTION SIGNAL FROM NB to LVDS/CRT for UMA C560 C560 .22u/6.3V_4 .22u/6.3V_4 30V/ 1A 30V/ 0.5A CRT_GND_1 CRTVDD5_F CRTVDD5 B0520WS-7-F B0520WS-7-F CN12 CN12 SMD1206P100TF SMD1206P100TF INT_DDCCLK INT_DDCCLK INT_DDCDATA INT_CRT_RED BLM18BA470SN1_6 BLM18BA470SN1_6 CRT_R1 CRT_11 INT_DDCDATA INT_CRT_GRE BLM18BA470SN1_6 BLM18BA470SN1_6 CRT_G1 DDCDAT_1 INT_CRT_HSYNC INT_CRT_HSYNC INT_CRT_VSYNC INT_CRT_BLU...
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HDMI SDVO I2C Control HDMI HPD SENSE (HDM) UMA use +3V for the detect pin Dis use +3V_DELAY for the detect pin HDMI_DDCDATA HDMI_DDCDATA HDMI_DDCCLK HDMI_DDCCLK R216 R216 HDMI@10K_4 HDMI@10K_4 HDMI_DET_R HDMI_DET R215 R215 HDMI@200K/F_4 HDMI@200K/F_4 R217 R217 R214 R214 HDMI@10K_4 HDMI@10K_4 HDMI@2N7002K...
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LAN (LAN) <BOM note> * Why does Pin17 CLKREQn connect to Pin16(LED2) and Pin30(DVDDL)? If center tap power come from internal switch 76.1mA ; 30mil <Layout note> PU in CLK Gen. regulator Power Sequence: Close to Pin2 =>Stuff 52SWR@ (Default) +3V_S5 +3V_LAN If center tap power come from internal LDO...
Model ZQE/G M/B BOARD MODEL CHANGE LIST Page From ZQP/Q M/B First Release 01.P14: Add HDMI function 02.P22: Add EC53,EC54 for EMI 03.P20: Stuff C673/C675/C671/C672 for EMI 04.P15: Stuff ESD protector at R31/R32 for EMI 05.P10: GPIO 58 define to HDMI strap pin 06.P08: Add C606,C614,C619 for strong clock...
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