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Summary of Contents for Seiko Epson RTC-4553AC
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MQ342-01 Application Manua Real Time Clock Module RTC-4553AC Downloaded from Elcodis.com electronic components distributor...
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• Seiko Epson reserves the right to make changes to this material without notice. • Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as, medical products.
RTC – 4553AC 3. Terminal description 3.1. Terminal connections RTC - 4553 TPOUT SOP - 14 pin 3.2. Terminal functions Signal designation Input Pin No. Function / Output — Power supply negative pin. Connect to ground. Address and data are written at WR = "L". Counter data (second digit to year digit) are written using the incrementing method.
RTC – 4553AC 4. Absolute maximum ratings GND=0 V Item Symbol Condition (pin) Min. Max. Unit −GND −0.3 Power supply voltage +6.0 −0.3 Input voltage , SCK , WR , CS0 , CS1 +0.3 −0.3 Output voltage , TP +0.3 −55 Storage temperature Stored bare product after unpacking...
RTC – 4553AC 7. Electrical characteristics 7.1. DC, AC Characteristics 7.1.1. V = 5 V ( GND=0 V , Ta = −30 °C ∼ +70 °C ) (1) DC Characteristics = 5 V ± 10 % Item Symbol Condition Unit Min.
RTC – 4553AC 7.1.2. V = 3 V ( GND=0 V , Ta = −30 °C ∼ +70 °C ) (1) DC Characteristics = 3 V ±10 % Item Symbol Condition Unit Min. Typ. Max. Data retention — — voltage SCK = 300 kHz —...
RTC – 4553AC 8.1.2. Register Bit Functions Bit name Function Bit marked "0" Unused bit that cannot be written. Always read as "0". Second to year digit BCD code. Data are written using increment method. "1" indicates PM and "0" indicates AM. This bit can be read also when 24-hour format is PM/ AM selected (24/12=1).
RTC – 4553AC 8.2. Register Description 8.2.1. Time/Calendar Counter Registers · In normal mode (CNTR = "0"), the counter is incremented by a write operation. (1) Second digit counter Counts values from 0 to 59. The counter can be read and incremented. When the second digit counter is incremented, fractions below full seconds are reset.
RTC – 4553AC 8.2.2. Control Registers (1) Control register 1 Name Register contents CNT 1 30ADJ CNTR 24/12 Control register 1 Control register 1 performs 12-hour/24-hour display format switching, digit counter reset, 30 second adjustment, and timing pulse signal switching. The register allows data read and write. (a) TPS bit (D3) The TPS bit selects the timing pulse output waveform.
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RTC – 4553AC (2) Control register 2 Name Register contents ∗ CNT 2 BUSY PONC — Control register 2 Control register 2 provides flags for carry detect and power-on-clear detect. (a) BUSY bit (D3) The BUSY bit serves for time/calendar counter digit carry detection. BUSY bit Mode Meaning...
RTC – 4553AC 8.3. How to use 8.3.1. Data Read When CS0 is "L", the serial address data input at S is read at the leading edge of SCK . Next, when WR = "H" is taken in on the 8th pulse leading edge of SCK the counter control register or RAM address is selected.
RTC – 4553AC 8.3.5. Sample Operation Flow Charts (1) Time/calendar initialize example (Example for initialization through power-on-clear when battery was changed etc.) START SYSR ← 1 • Release PONC bit = "1" (1 → 0) • While BUSY = "1", a carry operation is in progress and the setting should not be carried out.
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RTC – 4553AC (3) Time/calendar modify example using (4) RAM write example counter reset (8:00 → 2:00) START START ="0", MS ="0" ←0 Set MODE 1 ←1 BUSY = 0? Write to RAM in MODE 1 CNTR ←1 ←1 Set MODE 2 ←1 ( 8 →...
RTC – 4553AC (7) Time/calendar read example using BUSY bit down transition START ←0 ←0 PONC=0? If PONC = "1", initialization was carried out and data must be set again BUSY = 1? PONC=0? Read time/calendar Time and calendar read interval is 996 ms. 8.3.6.
RTC – 4553AC 8.3.9. Power-On Reset When the system power is turned on, the power-on reset function operates automatically, performing a sequence identical to system reset. However, because the PONC bit remains at "1", a system reset must be performed to set the PONC bit to "0" before setting the time and calendar. The conditions for power-on reset and the conditions for data retention and normal IC operation during power fluctuation are shown below.
RTC – 4553AC 8.3.11. Processing of Non-Existent Data (1) If the month digit is incremented while the current setting is January 31, a non-existent setting will result (February 31). Carry from the hour digit will cause this setting to become March 1. Month digit Carry from hour digit incremented...
RTC – 4553AC 8.3.12. Timing Charts (1) Data readout example Don't care Don't care Don't care 1-second digit address Next address (0000) (10-second digit) (0001) D0 D1 D2 D3 : Undefined 1-second digit Previously accessed address and data 1-second digit data address (0000) ⋅...
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RTC – 4553AC (3) Time/calendar continuous write example (CNTR=0) Don't care Don't care Don't care Don't care Address Address Address Access 1 (1-second digit) Access 2 (10-second digit) Access 3 (1-minute digit) Address Data Address Data Address Data : Undefined Previously accessed address 1-second digit contents + 1 10-second digit contents + 1...
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RTC – 4553AC Additional information When CS0 is "L", the serial address data input at S are read at the leading edge of SCK . Next, when WR = "H" is taken in on the 8th pulse leading edge of SCK ., the counter control register or RAM address is selected, and data are written as shown below.
RTC – 4553AC 10. Reference Data (1) Frequency/temperature characteristics [Calculating the frequency stability] θ = +25 °C Typ. × 10 α = -0.035 × 10 Typ. 1. Frequency/temperature characteristics are approximated according to the following equation. ∆f = α (θ - θ...
RTC – 4553AC 11. Application notes 11.1. Notes on handling This module uses a C-MOS IC to realize low power consumption. Carefully note the following cautions when handling. (1) Static electricity While this module has built-in circuitry designed to protect it against electrostatic discharge, the chip could still be damaged by a large discharge of static electricity.
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