JVC XV-BP1B Service Manual page 102

PIN NO PIN NAME
44 LDD_SDIO
45 LDD_CLK
46 LDD_SEN
67 TRAYIN
68 TRAYOUT
69 EJECT
72 LIMIT
73 PLAY
120 RSTI
62 GIO12
63 GIO13
65 GIO0/MUTE1
66 GIO1/MUTE2
70 LED1/GIO3
87 GIO4
88 GIO5
89 GIO6
90 GIO7/MUTE3
91 GIO8
92 GIO9/SPOKE
RXD_A/
93
LED2/GIO10
94 TXD_A/GIO11
95 GIO2
103 GIO14
104 GIO19
105 GIO16
106 GIO17
107 GIO18
108 GIO15
60,61,112 DVDD33O
109,114 MVDDQ
111,113 MVSSQ
59,71,
DVDD12I
110,115
64 VSS
TYPE
LDD serial interface (3)
3.3V LVTTL I/O,
LDD serial interface data. The pin is spike-free at power-on stage.
5V-tolerance,
LDD serial interface CLK. The pin is spike-free at power-on stage.
2,4,6,8mA PDR,
LDD serial interface command enable.
75K pull-up The pin is spike-free at power-on stage.
Panel & sense key (5)
Tray_is_in Input, A Logical Low Indicates the Tray is IN.
Feedback Flag is from Tray Connector.
The pin is spike-free at power-on stage.
Tray_is_out Input. A Logical Low Indicates the Tray is OUT.
Feedback Flag is from Tray Connector.
The pin is spike-free at power-on stage.
3.3V LVTTL I/O,
Eject/stop key input, active low.
5V-tolerance,
The pin is spike-free at power-on stage.
12mA,75K pull-up
Sledge Inner Limit Input, Active Low.
The pin is spike-free at power-on stage.
Alternate function : 1. Internal monitored signal output
Play/pause key input, active low.
The pin is spike-free at power-on stage.
MISC & GIO function (21)
Analog Input Internal power on reset detection input.
3.3V LVTTL I/O,
5V-tolerance,
General IO
4,8,12,16mA PDR,
75K pull-up
General IO.
General IO
3.3V LVTTL I/O,
General IO
5V-tolerance,
LED Control Output. Initial 0 Output.
4,8,12,16mA PDR,
The pin is spike-free at power-on stage.
75K pull-down
Alternate function : General I/O
3.3V LVTTL I/O General IO.
3.3V LVTTL I/O General IO.
3.3V LVTTL I/O General IO.
General IO. The pin is spike-free at power-on stage.
General IO.
General IO.The pin is spike-free at power-on stage.
The pin is not allowed to pull-up in circuit layout.
Alternate function : Spoke input.
PC RS232 serial receive data.
The pin is spike-free at power-on stage.
Alternate function : 1. LED Control Output. Initial "0" Output
3.3V LVTTL I/O,
PC RS232 serial transmit data.
5V-tolerance,
The pin is spike-free at power-on stage.
4,8,12,16mA PDR,
Alternate function : 1. LED Control Output. Initial "0" Output
75K pull-down
General IO
General IO
General IO
General IO
General IO
General IO
General IO The pin is not allowed to pull-up in circuit layout.
Digital Power Pins (11)
Digital Power (3.3V) VDD for digital pad.
DRAM Power (3.3V) VDD for pad output buffer of DRAM die.
DRAM Ground VSS for pad output buffer of DRAM die.
Digital Power (1.2V) VDD for internal circuit.
Digital Ground VSS for digital pad
DESCRIPTION
2. General IO.
2. General IO.
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