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EN 4
2.
TPM8.3A LA
11 - Shield
12 - CLK-
13 - Easylink/CEC
14 - n.c.
15 - DDC_SCL
16 - DDC_SDA
17 - Ground
18 - +5V
19 - HPD
20 - Ground
7 - HDMI2: Digital Video, Digital Audio - In
See
6 - HDMI1: Digital Video, Digital Audio - In
8 - HDMI3: Digital Video, Digital Audio - In
See
6 - HDMI1: Digital Video, Digital Audio - In
2.3.2
Rear Connections
9 - Cinch: Video CVBS - Out
Ye - Video CVBS
10 - Cinch: S/PDIF - Out
Bk - Coaxial
11 - Cinch: Video YPbPr - In, Audio - In
Gn - Video - Y
Bu - Video - Pb
Rd - Video - Pr
Wh - Audio - L
Rd - Audio - R
2.4
Chassis Overview
Refer to
9. Block Diagrams
2011-Nov-11
Technical Specs, Diversity, and Connections
Gnd
Data channel
Control channel
DDC clock
DDC data
Gnd
Hot Plug Detect
Gnd
/ 75 Ω
1 V
PP
/ 75 Ω
0.4 - 0.6V
PP
/ 75 Ω
1 V
PP
/ 75 Ω
0.7 V
PP
/ 75 Ω
0.7 V
PP
0.5 V
/ 10 kΩ
RMS
0.5 V
/ 10 kΩ
RMS
for PWB/CBA locations.
H
12 - Service / UART
j
1
- Ground
jk
2
- UART_TX
3
- UART_RX
j
jk
13 - PC IN:VGA
H
j
j
H
1
- Video Red
2
- Video Green
3
- Video Blue
4
- n.c.
5
- Ground
6
- Ground Red
7
- Ground Green
kq
8
- Ground Blue
9
- +5V
10 - Ground Sync
11 - Ground Red
kq
12 - DDC_SDA
13 - H-sync
14 - V-sync
jq
15 - DDC_SCL
jq
jq
14 - Audio - In: Left / Right, VGA
jq
Gn - Audio L/R in
jq
Gnd
Transmit
Receive
1
5
10
6
11
15
10000_002_090121.eps
090127
Figure 2-4 VGA connector
/ 75 Ω
0.7 V
PP
/ 75 Ω
0.7 V
PP
/ 75 Ω
0.7 V
PP
Gnd
Gnd
Gnd
Gnd
+5 V
DC
Gnd
Gnd
DDC data
0 - 5 V
0 - 5 V
DDC clock
0.5 V
/ 10 kΩ
RMS
H
k
j
j
j
j
H
H
H
H
j
H
H
j
j
j
j
jq
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