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HW 86010 Integration Manual Document information HW 86010 Product: Type of document: Integration Manual 1.22 Version: 16.01.2002 Date of issue: Dr. Andreas Müller, Höft & Wessel AG Authors: Change history First pre-release version 0.20, 14.01.00 Internal release 0.80 For comments, missing protocol mode 0.90, 05.05.00...
Integration Manual Preface Dear customer. Thank you for selecting the HW 86010 DECT transceiver module. You have made a good choice, since HW 86010 is a powerful and very versatile product that easily adds DECT communication to your application. This document will help you in getting the optimum integration result. This covers mechanical, electrical and RF aspects.
Integration Manual HW 86010 Contact Höft & Wessel AG For immediate assistance please address yourself to the Höft & Wessel service line: Telephone: +49-1803-232829 Telefax: +49-511-6102-411 Email: info@hoeft-wessel.de If you have general questions concerning Höft & Wessel communication products you may directly contact the communications department:...
Switching between antennas is performed under software control. The DECT protocol stack has been implemented as firmware running on the µC of the HW 86010. Please consult your Firmware manual for a detailed description of the Firmware features. The ultra-compact and low-voltage design make the HW 86010 optimally suited for battery powered devices.
Integration Manual HW 86010 Architecture Figure 1: Architecture of DECT transceiver module HW 86010 Asynchronous serial interface, full duplex, selectable data rate up RS-232 to 115,2 kBd Isochronous serial interface, IOM-2 compatible, full duplex, maximum clock rate 4,096 MHz, data rate 256 kBd Isochronous serial interface used for control of on-board I²C...
Integration Manual HW 86010 Electrical characteristics 3.2.1 Supply voltage V3P3 min. max. Absolute maximum rating -0.5V +3.63V Operating +3.0V +3.6V Ripple +/-30mV Voltage V3P3 is used as power supply for the baseband section of HW 86010. It is the reference voltage for all digital I/Os.
Absolute maximum rating -0.5V +5.5V Operating +3.3V +4.7V Ripple +/-100 mV Voltage VBATP is used as power supply for the radio section of HW 86010. Mode average IBATP peak IBATP Sleep mode (PT only) 300mA Scan mode (PT only) 60mA...
Integration Manual HW 86010 Even in sleep mode a PT stays synchronised to the FT. In case synchronisation is lost, the PT scans all DECT channels until it finds a suitable FT. In scan mode the PT requires more power.
HW 86010 Integration Manual Radio specification Parameter Values Frequency range 1880.064MHz to 1898.208MHz Number of channels Channel spacing 1.728MHz Frequency offset ± 50kHz at extreme conditions Modulation Gaussian Frequency Shift Keying (GFSK: BxT=0.5 ; m= 288kHz) Multiplexing Time Division Multiple Access (TDMA)
Interface description 3.4.1 Connector specification The external interface of the HW 86010 is implemented as 50-pin connector. The connector on the module is compatible to Samtec part number CLP-125-02-G-D-BE. The recommended way to connect the HW 86010 is bottom-entry, i.e.
V.24 line driver, if you want to connect the RS-232 port to a standard V.24 device (PC, modem etc.). Connecting the module to a V.24 line without external line drivers may damage the module. 3.4.3.2 Interface parameters The HW 86010 is equipped with a fully featured UART. Parameter Value Parity None...
HW 86010 Integration Manual 3.4.4 Voice Interface 3.4.4.1 Interface signals The voice interface provides connections for microphone and loudspeaker. It uses the following interface signals Signal I/O Description VXON Analogue speaker output negative VXOP Analogue speaker output positive VXIN Analogue microphone input negative...
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Integration Manual HW 86010 3.4.4.3 Connection of microphone and speaker A typical full-differential connection of a microphone is shown in Figure 10. The values of the components must be chosen such that • The AC coupling capacitors C1 and C2 form together with the input...
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HW 86010 Integration Manual VXOP VXON R1=220Ω MICBP C1=30nF R3=500Ω VXIP C4=47µF VXIN C2=30nF R4=500Ω MICBN R2=220Ω Figure 10: Electrical connection of microphone and loudspeaker The connection of a loudspeaker is also shown in Figure 10. In power-down mode an impedance of 20kΩ between the differential outputs VXOP and VXON is kept.
The PWM output is a digital pulse-width modulated output. The output signal has a frequency of 6.75 kHz. An analogue signal is retrieved by low pass filtering outside the HW 86010. Please note that the reference voltage of the PWM output is V3P3. In order to reproduce exactly the analogue input voltage at ADC input, the PWM signal must be converted from V3P3 down to 2.5V prior to low pass filtering.
HW 86010 Integration Manual 3.4.6 Reset Interface The reset interface serves the purpose of resetting the HW 86010 and its external peripherals. 3.4.6.1 Signal description Signal I/O Description RSTBI Reset input, triggers on falling edge RSTNO Reset output, active low...
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Integration Manual HW 86010 3.4.6.3 Reset timing (external reset) In order to make sure that an external reset is detected correctly by the firmware, the host must pull RSTBI down sufficiently long time. The exact timing requirements are indicated in Figure 11.
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50ms Although it is triggered by the RSTBI signal the firmware of the HW 86010 treats a short reset as an internal reset. The host hardware may use this feature to emulate a power-up reset to the HW 86010.
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BOOT0 and BOOT1 are latched at the rising edge of RSTNO. The signals have internal 10 kΩ pull-ups. So they may be left unconnected, if not used. HW 86010 evaluates these signals on every reset (including internal resets). In order to avoid unwanted switches to firmware download mode, the host device shall take care that theses signals are driven low only together with RSTBI driven low.
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Please make sure that the following conditions are fulfilled during operation: V3P3 must not drop below 2,7V. This will trigger a low voltage reset. At power-up of the HW 86010 the RSTBI signal should be either high impedance (not connected) or logic HIGH. A logic LOW during power-up may be interpreted as external reset and may result in unwanted mode selection.
The HW 86010 can only be operated as master device but not as slave device. The general concept of the I²C bus allows multiple master devices on the same bus. This is not supported by HW 86010, i.e. it must be the only master device on the bus. 3.4.7.3...
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Slave transmits Figure 13 I²C interface signal timing Data transfer is initiated by the master (HW 86010) when the bus is not busy, i.e. both data and clock lines are logic High. The master generates a Start condition, i.e. a High-to-Low transition of SDA while SCL is High.
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Integration Manual HW 86010 acknowledge related clock pulse, set-up and hold times must be taken into account. A master receiver must signal an end of data to the transmitter by not generating an acknowledge after the last byte that has been clocked out of the slave.
HW 86010 Integration Manual 3.4.8 PCM Interface The PCM interface is used to link the HW 86010 with a variety of dedicated telecommunications controllers. An operating mode compatible with IOM-2 is supported. 3.4.8.1 Signal description Signal I/O Description PCMCLK I/O PCM clock signal...
Integration Manual HW 86010 3.4.9 General Purpose I/O HW 86010 provides 16 general purpose I/O pins GPIO1 to GPIO16. They are enabled by firmware. These signals are 3.3V CMOS. 3.4.9.1 Signal description Signal I/O Description GPIO1 I/O not multiplexed GPIO2...
HW 86010 Integration Manual 3.4.10 Bus Interface Purpose of the bus interface is to provide a means for easy access to custom-specific peripherals. 3.4.10.1 Signal description Signal I/O Description DATA(0-8) I/O 8-bit data bus ADR(0-5) 6-bit address bus BNK0, BNK1...
Firmware download mode This section describes, how firmware is downloaded in the HW 86010. In order to perform firmware download the HW 86010 must be switched into Download Mode. While in Download Mode the HW 86010 uses a simple download protocol for downloading the firmware via the RS-232 interface.
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Transmit byte 0x00 Acknowledgement token continue with pass two Any transmit must not pause more than 1 second. Otherwise the HW 86010 may timeout. If not otherwise noted, any receive must tolerate a pause of 2 seconds before the host timeouts.
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Start new firmware Through reset of module Any transmit must not pause more than 1 second. Otherwise the HW 86010 may timeout. If not otherwise noted, any receive must tolerate a pause of 2 seconds before the host timeouts.
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HW 86010 Integration Manual 3.5.3.3 Computation of CRC The following short piece of C-code describes the computation of a CRC for a block of bytes to be applied for firmware download: unsigned short CalculateCRC ( unsigned char *Block, /* array of bytes */...
HW 86010 has a type approval according the European CTR 6 standard. This is a mandatory requirement for DECT equipment. When you integrate HW 86010 in your product, there is no need for doing the complete CTR 6 test again. Although it is not mandatory, Höft & Wessel recommends that you have your product checked in a shortened CTR 6 spot check.
(max. 50mV). Note that all digital signals are 3.3V CMOS logic. In case you must interface to a 5V design take care: Inputs of HW 86010 are not 5V tolerant. The module will be damaged, if you connect its digital signals to 5V.
DECT equipment. The internal wire antennas of the HW 86010 are usually located inside the housing of a device. Please be aware of the space needed for the antennas, as indicated in Figure 4.
Integration Manual HW 86010 Abbreviations analogue digital conversion access rights identity bit error rate cyclic redundancy checksum data communication equipment DECT digital enhanced cordless telecommunications data link control layer DECT serial number data service profile data terminal equipment ETSI manufacturer code...
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HW 86010 Integration Manual radio frequency radio fixed part RFPI radio fixed part identity radio fixed part number SAPI service access point identity SARI secondary ARI serial clock serial data specification description language subscription key subscription master key TARI tertiary ARI...
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