Memory - LG Prada KE850 Service Manual

Hide thumbs Also See for Prada KE850:
Table of Contents

Advertisement

3. TECHNICAL BRIEF

3.6. Memory

1Gbit Flash & 128Mbit SDRAM employed on KE850 with 16 bit parallel data bus thru ADD(0) ~
ADD(24). The 256Mbit Sibley Wireless Flash memory with LPSDRAM stacked device family offers
multiple high-performance solutions. The Sibley flash die is manufactured on 90 nm process
technology.
It delivers 108 MHz synchronous burst and page-mode read rates with supports multi-partitioning with
Read-While-Write (RWW) or Read-While-Erase (RWE) dual operations. The LPSDRAM is a high-
performance volatile memory operating at speeds up to 104 MHz with configurable burst lengths.
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
1V8_SD
CS_Flash1n
C217
C218
C219
C220
0.1u
0.1u
0.1u
0.1u
Figure 11 Flash memory & SDRAM MCP circuit diagram
U202
PF38F5570MMY0B0
D1
A0
C1
A1
B1
A2
B2
A3
A2
A4
B3
A5
A3
A6
A4
A7
G8
A8
F8
A9
E8
A10
G9
A11
F9
A12
E9
A13
D9
A14
C9
A15
B9
A16
B4
A17
B5
A18
A5
A19
F7
A20
E7
A21
_F4_CE_A27
B7
A22
A6
A23
A7
A24
R211
0
A8
A25
B8
A26
J1
F_VPP
D4
F_VCC1
D6
F_VCC2
J4
F_VCC3
J6
F_VCC4
C5
D_VCC1
D3
D_VCC2
N_RY__BY
D7
D_VCC3
D2
S_VCC
J2
VCCQ1
J3
VCCQ2
J7
VCCQ3
J8
VCCQ4
D_DM0__S_LB
C2
VSS1
D_DM1__S_UB
C3
C221
C222
VSS2
C4
0.1u
0.1u
VSS3
C6
VSS4
C7
VSS5
C8
VSS6
K2
VSS7
K3
VSS8
K4
VSS9
K6
VSS10
K7
VSS11
K8
VSS12
M2
DQ0
L1
DQ1
K1
DQ2
L2
DQ3
M4
DQ4
L3
DQ5
L4
DQ6
L5
DQ7
M5
DQ8
L6
DQ9
M6
DQ10
L7
DQ11
L8
DQ12
K9
DQ13
L9
DQ14
M8
DQ15
R206
0
D5
_F_ADV
G3
R207
NA
_F1_CE
G2
R208
NA
_F2_CE
H3
_F3_CE
E6
R209
22
K5
F_CLK
J5
D_CLK
R210
22
H5
_D_CLK
H7
TP201
_OE
G7
_F_RST
J9
F_WAIT
E2
TP202
_WE
H6
_D_WE
E1
_F_WP1
F1
_F_WP2
B6
F_DPD
E5
N_CLE
D8
N_ALE
H1
G6
TP203
D_CKE
G4
TP204
D_BA0
H4
TP205
D_BA1
F4
TP206
_D_RAS
F3
TP207
_D_CAS
F2
_D1_CS
E3
_D2_CS
H9
H8
M7
D_UDQS
M3
D_LDQS
F6
_S_CS1
H2
S_CS2
A1
DU1
A9
DU2
M1
DU3
M9
DU4
G1
RFU
- 40 -
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
1G_CSn
ADVn
CS_Flash1n
CS_Flash2n
BFCLKI
BFCLKO
SDCLKO
SDCLKI
RDn
R212
RESETn
WAITn
15K
1V8_SD
WRn
R214
100K
F_DPD
CKE
A13
A14
RASn
CASn
CS_RAM1n
BC0n
BC1n

Advertisement

Table of Contents
loading

Table of Contents