Block Diagram - Panasonic TH-49CX700M Service Manual

9 Block Diagram

S3.3/S1.8
Tuner
TU-IIC1
F
On Board
EXT_IFAGC1
IF1
IFAGC1
Analog AV
Y
Pb
R
L Pr
L/R in x 2
OPT
Optical OUT
HDMI1
DDC* > STM
HPD* < STM
HDMI_5V_DET* > STM
HDMI2
DDC* > STM
HPD* < STM
HDMI_5V_DET* > STM
HDMI3
DDC* > STM
HPD* < STM
HDMI_5V_DET* > STM
S1.8 SOUND_VCC
S3.3
Lch:10W I2S AMP
I2S(MCLK/LRCLK/BCLK/SDAT[1:0])
XRST/#SOS/#AMP_MUTE
YDA176-QZ
(YAMAHA)
Rch:10W
DVB-T2
S3.3/ S1.2
< FE_XRST
EXT_IFAGC1
IF1 BE-IIC
DVB-T2/T/C
TU-IIC1
DVB-S/S2 TU_Serial_TS1
SAT_AGC1
DEMOD
(TU_Para_TS1)
I_1
1
Q_1
DiSEqC1 TU_Serial_TS1 / TU_Serial_TS1_JP
(TU_Para_TS1)
41MHz
FEAINP
Low-IF
SAW
FEAINN
IF0 ADC
FLT
IFAGC0 DVB-C
Decoder
DVB-T
Decoder
ATSC/QAM
Decoder
ATV
DMD
Decoder
Digital CVBS
ADC
TV Decoder
[0]
V-SW
YPbPr
ADC Analog Video
[3:1] Processor
VDAC
A-SW
ADC
(Thru)
DAC
ARC OUT
S3.3/ S1.1 Rx0
27MHz
HDMI1.4
I2S
R2R
< HDMI_XRST
< HDMI_IRQ
Rx1 HDMI
BE-IIC
HDMI1.4 Rx
Rx0
HDMI MUX
HDMI2.0
SW x4
Rx1
Rx2
MN864
HDMI2.0
778
Rx3
HDMI2.0
A-Chip
Wired OR S1.05
Internal CI
SPI-IF
controller
SUB
AV
Trans Port Demux
Decoder
MAIN
Dec video
Dec Audio
B2R
Digital SIF
Main
External Video(Analog)
Pre
MIB
Sub
(IPNR)
Processor
External Video(HDMI)
TVE
OSD
5
Audio
DSP
EASTER
SPDIF
SW
IIC
STM-IIC
Serial
ADx8
CLK STM-Serial0
GEN
P
24MHz
STB5V F15V
< TV_SOS
AMP/HP MUTE Analog
MONITOROUT MUTE
ASIC
OVP
Safety
SOS
Circuit
< MON_MUTE
< SP_HP_MUTE
PWMA
PWM_ENB >
PWMOUT
29
S3.3
S5/ S3.3
Debug eMMC
Connector 32Gbit
SCLK
SDI
MMCCLK
SDO
MMCCMD
CE#1
XERST
S1.0 S3.3 S1.5
MMCDAT0-7
DDR1.5
SPI-IF eMMC-IF
DDR3
DDR3
4Gbit
DDR3
4Gbit
DDR3
OSD DDR3 x80 DDR3 4Gbit
4Gbit
1,2,3 x16
Controller
cursor 4Gbit
DDR3 1866 4Gbx5
T-CON
12MHz
MJC VbyOne 8 Lane (Video)
Scaler
PQ (FRC,
3D)
LVDS-Tx/
VbyOne 4 Lane (OSD)
mini-LVDS-Tx
V-by-One
DISPEN
LOGO_ON,BL_ON
NT_XRST
3D_ON, BL_SOS
TV_SUB_ON
KEYSCAN/POWER-KEY
S3.3
24MHz
D-Chip
USB-HUB
USB2.0-IF
GL850G
USB2.0-IF
USB2.0
(Port 0)
HUB_XRST <
IIC Serial
BE_IIC0
Serial1
USB2.0
BE_IIC1 USB
(port1)
BE_IIC2
IF
x4
ARM
USB3.0
(Port 2)
Common-Reset
USB2.0
(Port3)
SD-IF ETHER-IF
Paragon
Reset
Circuit
STB3.3
S3.3/1.8
S5
REG S3.3
SD XC
UHS-I
/UHS-I
SDVOLC
SDCLK,SDCMD,
SDDAT[3:0],SDCD,SDWP
TH-49CX700M/S
NT1.5V
1G 4
DDR3
DDR3
DDR3
DDR3
NTK3.3V
16Mb
FR_GPA_0 (SPI_CS) SPI-FLASH
FR_GPA_1 (SPI_CLK)
FR_GPA_2 (SPI_DI)
FR_GPA_3 (SPI_DO)
NT_PANEL_VCC_ON
NT72324
GPIOx8
PNL 3D ON
Panel
NT_BL_PWM1-8 PNL TEST ON
(Tcon)
PCID_EN
LD
P
S3.3
BT Module
S5
USB*VBUS >
USB
< OVCUR*
Power SW USB-1
(Camera)
S5
USB*VBUS >
USB
< OVCUR*
Power SW
USB-2
S5
USB*VBUS >
HDD-USB
< OVCUR*
Power SW
USB-3
USB3.0-IF
(3.0 HDD)
S5
STB5.3
For Wake up On Wireless (Euro)
USB
Power SW
IEEE802.11n
Wireless UNIT
WOW_ON_IRQ <
< PHY_PWR_ON
> WOW_OVP
ETHER
10/100M
STB3.3
For uP
EEP < EEPROM_WP
16k
STB-IIC