Philips SD-4.00SA CH Service Manual page 55

Circuit Descriptions, List of Abbreviations and IC Data
Analogue video
The STi55xx is capable of 6-channel analogue video. Three
channels (pins 25, 26 and 27) are RGB or YUV format, while
the other three channels (pins 32, 33 and 34) are Y, C, and
CVBS.
A video output buffer (see diagram M7, e.g. item 7701 for R) is
implemented: an 8MHz/16MHz selectable filter stage and a
75Ω drive stage.
Clock Factory
One clock factory is implemented to support all clocks required
by the Furore 2. The various master clock, which depends on
whether SACD is present, is used for SD4.00_SA_CH. The
clock factory of SD4.00_SA_CH is showed in Figure 8-2.
16.9344 MHz
FURORE 2 (Optional)
DAC Clock 16.9344 MHz Clock 16.9344 MHz
16.9344 MHz Buffer
Figure 9-5 Block diagram clock factory
For the SACD player, the clock system is a DAC master clock
system. For non-SACD player, the clock system is a mono
board master clock system.
The Furore 2 supports clock 256*FS/384*FS/512*FS. The
most convenient value in the market is 16.9344 MHz (384*FS,
FS=44.1KHz). Therefore, the master clock on the
SD4.00_SA_CH mono board is the 384*FS coming from the A/
V board. The 384*FS (16.9344 MHz) from the DAC clock, must
always be present. It is buffered before it is sent to the Furore
2 and the rest of the clock factory. The IC S612G delivers a 27
MHz system clock.
The Furore 2 and Sti5580/Sti5588 (Video) use this clock. It is
used to derive the PCM audio clocks 256*FS by the
MK2703STR. This IC is also used to buffer the incoming 27
MHz clock.
The communication between the Sti55xx and the Furore 2 is
asynchronous.
To support non-SACD playback, an on-board 27MHz oscillator
delivers the master clock for SD4.00_SA_CH mono board.
Miscellaneous
Most general IO ports are connected directly to the module
interface. Compared with the SD3.0 module, some on-board
circuits are removed, as it made more sense (and more cost
effective) to implement these circuits externally.
SCART Status Signal
The SCART0 and SCART1 signals are directly available at the
module interface, where the 0_6_12V signal is generated. See
table below:
Table 9-1 0_6_12V SCART status truth table
Function PIO3_6
(SCART0)
TV display 1
TV display 0
16:9 aspect ratio 1
4:3 aspect ratio 0
Mute
The audio MUTE signal (active 'high') is directly available at the
module interface.
S1
27MHz P-SCAN
FURORE 2
4901
STi55XX
IC S612G MK2703STR
256
27MHz
SACD Clock PLL Audio Clock DAC FURORE 2
Audio Clock
Source (PLL) Synthesizer
256
PCM_CLK
27MHz
STi55XX
Oscillator
(Option)
CL 26532053_023.eps
PIO3_7 0_6_12V
(SCART1) (at SCART
connector)
1 0V
1 0V
0 +6V
0 +12V
Service
Out
1n5
In
FS
*
FS
*
6k8
160502
The service port (see diagram M5) is simplified to reduce cost.
The unused RTS and CTS lines are no longer connected. A
transistor buffer (item 7508) is used instead of the Schmitt
Trigger buffer (item 7501).
The overall loading and driving capability of the RS-232
emulator port is not greatly changed. However, as a
precaution, the Schmitt Trigger circuit remains in the layout as
an optional implementation.
This SD4.0SA_CH has the same ComPair connector as in
previous DVD generations. Flashing of the application-SW is
not possible with the ComPair cable, except with a CD-R disc.
For sets with Mask-ROM software, replace it with a
programmed Flash (available via your Philips Service
organisation).
Power Supply (diagram M7)
12V
5V
3.3V
Figure 9-7 Mono Board Power Supply Block Diagram
The main power supplies to the module are 3.3V, 5V, and 12V
(input via connector 1703).
SD-4.00SA_CH
5V
1k
100R
4k
3V3
10k
10k
10k
CL 16532163_049.eps
Figure 9-6 Service Port Buffer
Front-end
motor driver
Front-end
3.3V Front-end
regulator 3.3V
Furore 2
3.3V
3.3V
regulator
Back-end
2.5V / 1.8V
2.5V /1.8V Back-end
regulator 2.5V / 1.8V
1.8V Furore 2
regulator 1.8V
CL 26532053_020.eps
9. EN 55
4k
TXD_SER
RXD_SER
230102
5V
260402