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Toradex Colibri Design Manual

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Colibri Computer Module
Carrier Board Design Guide

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Summary of Contents for Toradex Colibri

  • Page 1 Colibri Computer Module Carrier Board Design Guide...
  • Page 2 Section 2.16.1: Correct pin numbers 05-Feb 2021 V1.6 Section 2.3.2.2: Update figure 4 Section 3.7: Add backfeeding recommendations Page | 2 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 3 Section 3: Clarify module power requirement for supply design Section 4.5: Add JTAG test pad description. Minor changes Page | 3 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 4: Table Of Contents

    SPI Signals ......................29 2.11.1 Unused SPI Signal Termination ................29 2.11.2 2.12 CAN ..........................29 Reference Schematics ..................29 2.12.1 Page | 4 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 5 Module Size ........................62 JTAG Test Pads ........................ 63 Appendix A – Physical Pin Definition and Location ............64 Page | 5 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 6: Introduction

    Colibri modules. These interfaces are described in the datasheet of each computer module. Some Colibri modules do not feature the complete set of standard interfaces. Therefore, it is strongly recommended to read the datasheets of the modules that are intended to be used with the carrier board.

  • Page 7: Abbreviations

    1.2.5 Pinout Designer This is an interactive and helpful tool for configuring the pin muxing of the Colibri and Apalis modules. It can be beneficial in custom carrier board development for Toradex modules and for checking the compatibility of existing carrier boards with our modules.
  • Page 8 System on a Chip - IC which integrates the main component of a computer on a single chip Small Outline Dual Inline Memory Module - form factor for mobile RAM modules, the Colibri module uses SO-DIMM the SO-DIMM (DDR, 2.5V variant) connector as the primary interface...

  • Page 9: Interfaces

    There is limited compatibility between their availability at different modules. For a design to be compatible with a wide range of Colibri modules, it is recommended to use the standard interfaces mainly. The various pins can be used for only one function simultaneously.

  • Page 10: Pin Numbering

    2.1.4 Pin Reset State The datasheets of the Colibri module provide information about the default reset status of the IO pins. Please be aware that the pin reset status is only guaranteed during the release of the reset signal. Some of the modules switch the IO bank voltages to follow the power-up sequence of the SoC.

  • Page 11: Ethernet

    0R resistors into the center tab lines. This ensures that the carrier board design is ready for any future Colibri module with voltage-mode PHY.

  • Page 12: Unused Ethernet Signals Termination

    2.3 USB The Colibri modules feature two USB interfaces. One of the two USB interfaces can be configured to be used as either the host or client. The other interface can only be used as a host. Some of the Colibri modules use the USB client port for debugging and recovery purposes.

  • Page 13: Reference Schematics

    The differential USB data signals require a common mode choke to be placed. Make sure that the selected choke is certified for USB 2.0 High Speed. The same is also required for the TVS diodes. The VBUS_DETECT signal is only 3.3V tolerant on the Colibri module. The simplest solution is to use a voltage divider.

  • Page 14: Unused Usb Signal Termination

    Consider using 18-bit color mapping with enabled dithering instead of 24-bit mapping. Carefully check which modules support color dithering. Page | 14 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 15: Parallel Rgb Lcd Signals

    The serial resistor value is a trade-off between electromagnetic radiation reduction and signal quality. A good starting value is 22Ω. Page | 15 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 16 DAC is capable of 24-bit. Figure 7: VGA DAC Reference Schematic Page | 16 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 17 LVDS1_A_TX1+/- LVDS1_B_TX1+/- LVDS1_A_TX2+/- VSYNC HSYNC LVDS1_B_TX2+/- Previous Cycle Current Cycle Next Cycle Figure 9: 18-bit LVDS Color Mapping Page | 17 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 18: Unused Parallel Rgb Interface Signal Termination

    Please be advised that HDMI and HDCP are required to be licensed. The HDMI/DVI signals are available on a dedicated FFC connector. Check carefully to confirm which modules provide the interface. Page | 18 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 19: Hdmi/Dvi Signals

    ESD protected by using diodes. The schematic example shows a discrete solution for the level shifting and protection. There are also integrated solutions available. Page | 19 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 20 The I C signals for the DDC and the hotplug detection (HPD) need to be shifted to/from the 5V logic level of the HDMI to the Colibri level of 3.3V. The HPD has a 100kΩ pull-down resistor already on the baseboard...

  • Page 21: Unused Hdmi/Dvi Signal Termination

    Add pull-up resistor or disable the I C function in the software Table 9: Unused HDMI/DVI Signals Termination Page | 21 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 22: Analog Vga

    Some Colibri modules feature a dedicated VGA interface on the HDMI FFC connector. For systems that need to be compatible with a wide range of Colibri modules, it is recommended to use a parallel RGB to VGA DAC instead of the dedicated VGA interface.

  • Page 23: Unused Vga Interface Signal Termination

    Master clock output for the camera. Some Camera might do not need CAM_1_MCLK CMOS 3.3V this clock since they use other clock sources Table 11: Parallel Camera Signals Page | 23 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 24: Unused Parallel Camera Interface Signal Termination

    GPIO capable interfaces, including the SD/MMC/SDIO, are defined for 3.3V. Some Colibri modules might be capable of switching the voltages of the SD card interface pins to a 1.8V, but it is not mandatory. Read the related datasheet of the Colibri module.

  • Page 25: Reference Schematics

    Any free GPIO capable signal could be used, but we recommend using the signal on Pin 43 (CTRL_WAKE_0) whenever possible. There is also no dedicated write protection signal available on the standard Colibri pinout. Any free GPIO capable signal can be used if the write protection function is required.

  • Page 26: C Signal Termination

    3.3V Clear to Send UART_C_RX CMOS 3.3V Received Data UART_C_TX CMOS 3.3V Transmitted Data Table 15: UART Signals Page | 26 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 27: Reference Schematics

    UARTC_RS 422_TXD- Colibri - UART 1734351-1 10 of 16 1473005 -1 ADM3491 ARZ Figure 18: RS422 Reference Schematic Page | 27 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 28: Unused Uart Signal Termination

    UART interface. The RTS signal is only available on the UART_A and UART_B as a Colibri standard interface. The schematic below inverts the RTS signal for the data enable input of the transceiver. Some modules allow inverting the signal in software. However, it is recommended to use the inverter circuit shown below to maintain compatibility with different modules and drivers provided by Toradex.

  • Page 29: Spi

    Table 17: SPI Modes 2.11.1 SPI Signals The SPI bus consists of one master and one or many slaves. In the Colibri standard, the module is the SPI master. Some modules might allow being also used as SPI slaves. Some modules may provide this function on different, non-standard pins.

  • Page 30: Pwm

    1473005 -1 Figure 22: PWM Example Schematic 2.13.3 Unused PWM Signal Termination Unused PWM signals can be left unconnected. Page | 30 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 31: Analog Audio

    3.5mm jack, while others need to be powered over the tip of the 3.5mm jack which is also used for the audio signals. The Colibri modules feature a special analog ground for the microphone. This is a switched ground. Using this ground instead of the regular analog ground allows switching off the phantom power when the microphone is not used.

  • Page 32: Unused Analog Audio Signal Termination

    3.3V power pins of the module (pin 10 and 12) still need to be powered. Alternatively, the analog power can be connected to the digital 3.3V power rail. Page | 32 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 33: Touch Panel Interface

    Unused touch panel signals can be left unconnected or pull down the signals individually with 10kΩ resistors. It is recommended to disable the corresponding drivers. Page | 33 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 34: Analog Inputs

    ADC block if not used. 2.17 Parallel Memory Bus (External Memory Bus) The Colibri form factor reserves several module edge pins as a parallel memory bus. This bus can be used for interfacing high-speed peripherals like FPGAs, DSPs, Ethernet controllers, CAN, and controllers.
  • Page 35 BUS_D29 CMOS 3.3V BUS_D30 CMOS 3.3V BUS_D31 CMOS 3.3V BUS_DQM0 CMOS 3.3V Byte Enable Mask, corresponds to D[7:0] Page | 35 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 36: Unused Memory Bus Signals Termination

    Theoretically, any unused interface pin that serves a GPIO function can be used. Since some interface pins do not provide GPIO functionality on certain Colibri modules, there is a list of preferred GPIO pins. For compatibility reasons, we recommend using the first pin on this list.

  • Page 37: Module Recovery

    USBC or UART_A interface available externally on the end-product. For most Colibri modules, the USBC port (USB OTG) is used in client mode for downloading software from a host computer. Some modules, like the Colibri VFxx, use the UART_A for downloading software in recovery mode.

  • Page 38: Power Management

    3.135V and 3.465V (absolute). This allows supplying the module from a 3.3V +/-5% power supply. The Colibri form factor is specified for a maximum sustained power consumption of up to 10W and a maximum peak power consumption of up to 15W for the SoMs.

  • Page 39: Power Block Diagram

    LDO from 5V rail CTRL_WAKE_0 Peripheral Devices on Carrier Board nRESET_OUT nRESET_EXT Figure 26: Power Block Diagram Page | 39 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 40 CTRL_WAKE_0 Peripheral Devices on Carrier Board nRESET_OUT nRESET_EXT Figure 27: Power Block Diagram (without RTC and analog interfaces) Page | 40 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 41: Power States

    Figure 28: Power State Diagram 3.5 Power-Up Sequence The Colibri module starts booting as soon as the main voltage rail is applied to the module. The main input voltage must rise monotonically. The RTC rail (VCC_BACKUP) needs to be applied before or together with the main voltage.

  • Page 42: Reference Schematics

    Place enough power supply bypass capacitors to the voltage inputs of the peripheral devices (see Toradex Layout Design Guide). Place a bypass capacitor to each power input pin of the Colibri module. Be aware of the total capacity on a voltage rail when switching the voltage. If the rails are switched on too fast, the current peaks for charging all the bypass capacitors can be very high.
  • Page 43 Colibri - Power Supply 10 V 1 of 16 1473005 -1 Figure 31: Simple Power Supply Reference Schematic Page | 43 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 44: Backfeeding

    Backfeeding is sometimes also called backflow. To understand what backfeeding is, we need to look at the internal circuit of an input pin. Most Colibri module pins (and also peripheral device input pins) feature ESD protection diodes. These protection diodes provide basic protection for electrostatic discharge.
  • Page 45 3.3V by the monitor. If an improper HDMI circuit is used, this can cause backfeeding. The DDC and the hotplug detection signal can cause further backfeeding in combination with an HDMI monitor. Page | 45 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 46: Potential Issues Caused By Backfeeding

    This could lead to a higher current draw on the backfeeding path, which could lower the voltage again. This could cause cyclical behavior in which devices are Page | 46 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 47: Identify Backfeeding Issues

    RS232 transceiver are not in the same power domain. The transceiver uses the 3.3V rail, which can still be enabled while on the Colibri module, the IO voltage rails are turned off. However, the behavior of the module IO voltage rail depends on the Colibri module.
  • Page 48 Otherwise, the module can back feed to the card. The signal states of the external devices like the RS232 signals of the host PC or the VGA display's sync signals are hard to control by the Colibri module and the carrier board. Therefore, it might be required to take other countermeasures for preventing the backfeeding of these interfaces.
  • Page 49 ( 2.3�� − 1.7�� ) ∙ 180Ω �� ≈ = 47Ω �� 2.3�� Page | 49 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 50: Backfeeding Prevention

    PCB real estate. Therefore, defining the right backfeeding prevention approach is challenging. The following list of potential solutions starts from the cheap and Page | 50 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 51 The best solution for preventing backfeeding is trying to avoid having different power domains. Try to use the same voltage for the IO rail and the peripheral devices. For some Colibri modules, the IO rail is identical to the module's main power supply (VCC). For such modules, it is advised to use the same power source also for the peripherals.
  • Page 52 An example of an interface with built-in backfeeding prevention is the USB interface of the Colibri module. The USB cable can be connected to a powered peripheral or host device, even if the Colibri module is powered off. In this situation, the USB 2.0 data signals could be pulled up to 3.3V on the attached device.
  • Page 53 IO rail and therefore are not backfeeding. IO Rail (off) Peripheral Rail (on) Open-Drain Peripheral Module Pin Figure 45: Using internal pull-up resistor Page | 53 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 54 3.3V High 3.3V Module Pin Peripheral Figure 47: Diode circuit for backfeeding prevention with an on-chip pull-up resistor Page | 54 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 55 IO Rail (off) Peripheral Rail (on) 3.3V High 1.6V DC Module Pin Peripheral Figure 49: Capacitive coupled signals Page | 55 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 56 Placing an additional buffer in the signal path can prevent backfeeding. The buffer needs to be powered from the same domain as the rail of the input. If the Colibri module is the signal input, using a power rail that is switched by a module GPIO as the buffer's power supply is advised.
  • Page 57 Peripheral Rail (on) 3.3V_SW (off) 3.3V VCC_B VCC_A High 3.3V Level Shifter Peripheral Figure 53: Level shifter for preventing backfeeding Page | 57 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 58 IO Rail (off) Peripheral Rail (on) 3.0V 3.3V High 3.3V 3.3V Module Pin Peripheral Figure 55: Reverse current protection diode Page | 58 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 59 IO Rail (on) Peripheral Rail (off) 3.3V High Module Pin Peripheral Figure 56: Additional load on peripheral rail Page | 59 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 60: Mechanical And Thermal Consideration

    Please note, inserting the Colibri module is critical. If done wrong, the Colibri can be damaged due to mechanical stress! More information, including a module inserting guide, can be found here: http://developer.toradex.com/products/colibri-fastener...
  • Page 61 Please contact the Toradex support team for more information. Figure 60: Thru-Hole Solder Pads for Fixation Page | 61 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

  • Page 62: Thermal Solution

    Colibri Carrier Board Design Guide 4.3 Thermal Solution The Colibri modules are designed to be used without an additional heat spreader or heat sink. Most of the Colibri modules feature a thermal throttling mechanism. The module measures the current temperature of the SoC. If it reaches a critical limit, it starts throttling down the CPU speed or shuts the system entirely down to prevent damages.

  • Page 63: Jtag Test Pads

    The JTAG interface is located on test points on the underside of the module. The location is the same for all modules in the Colibri family. There are a total of six test pads, of which five are used for the JTAG interface. The sixth test pad is used for module testing and should be left unconnected on the carrier board.

  • Page 64: Appendix A - Physical Pin Definition And Location

    LCD RGB VSYNC Camera Input VSYNC SPI CS Camera Input Data<8>, Keypad_Out<4> SPI CLK nReset Out SPI RXD SPI TXD Page | 64 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 65 SDCard DAT<0> Ethernet GND I2C SDA Ethernet RXI- I2C SCL Ethernet RXI+ Table 30: Physical Pin Definition and Location Page | 65 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...
  • Page 66 Brand and product names are trademarks or registered trademarks of their respective owners. Specifications are subject to change without notice. Page | 66 Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com info@toradex.com...

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