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HI‐8475 ARINC 429 Receiver
With parallel and serial outputs
Evaluation Board
Quick Start Guide
Nov 7, 2013
HOLT INTEGRATED CIRCUITS
1
23351 Madero,
Mission Viejo, CA
92691. USA.
Tel:
+ 1 949 859 8800
Fax:
+ 1 949 859 9643
Email: sales@holtic.com
Web:
www.holtic.com
11/7/13
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Summary of Contents for HOLT HI-8475 ARINC 429
- Page 1 23351 Madero, Mission Viejo, CA 92691. USA. Tel: + 1 949 859 8800 Fax: + 1 949 859 9643 Email: sales@holtic.com Web: www.holtic.com HI‐8475 ARINC 429 Receiver With parallel and serial outputs Evaluation Board Quick Start Guide Nov 7, 2013 QSG‐8475, Rev. New HOLT INTEGRATED CIRCUITS 11/7/13 1 Arrow.com. Downloaded from...
- Page 2 INTRODUCTION The Holt HI‐8475 Evaluation Board demonstrates features of the HI‐8475 ARINC 429 receiver IC. This device will decode 32 bit ARINC 429 words into parallel or serial format without the use of any software. The board and the HI‐8475 can be run from a single 3.3V+/‐ 5% supply voltage. The HI‐8475 and EVM (Evaluation Module) requires no software for control; all functions are set by hardware switches. Data can be filtered according to the label content of the ARINC word, using the LLA and FILT input setting and set with DIP switches. Other DIP switches configure the device speed, test modes etc. The EVM is shown in the picture below: Fig 1 – HI‐8475 Evaluation Board QSG‐8475, Rev. New HOLT INTEGRATED CIRCUITS 11/7/13 2 Arrow.com. Arrow.com. Downloaded from Downloaded from...
- Page 3 J7 - 32 Bit Outputs VLOGIC 8 Labels 32 ARINC 8xDIP SW 8 label inputs Bits Bit Outputs Bit [32:1] Out HOLT HI-8475 VLOGIC Control/Test 8xDIP SW SPD & CTRL bits Inputs 32 LEDs VLOGIC 8xDIP SW 8 filter inputs...
- Page 4 Use for external clock connection, disconnect link J3 and apply a VLOGIC level clock CLK TP2/TP5 GND Ground Test Point TP3/4 VSUPPLY/VLOGIC Connect 3.3 or 5V supply TP6 UPDATE Test point for Update signal indicates when ARINC word has been received J7 pins 1‐32 Received Data ARINC data bits 1‐32 respectively J7 pin 35 CLK 1 MHz Clock J7 pin 38 VLOGIC VLOGIC Supply J7 pin 39,40 GND Board Ground QSG‐8475, Rev. New HOLT INTEGRATED CIRCUITS 11/7/13 4 Arrow.com. Arrow.com. Arrow.com. Arrow.com. Downloaded from Downloaded from Downloaded from Downloaded from...
- Page 5 OFF = Enable Test Mode SW4/5 ENTSTOUT OFF ON = Enables Test Output OFF = Enable Test Mode SW4/6 SDE OFF ON = Enables SD bit checking OFF = Disables SD bit checking SW4/7 SD9 OFF ON = Check for SD9 bit = 1 OFF = Check for SD9 bit = 0 SW4/8 SD10 OFF ON = Check for SD10 bit = 1 OFF = Check for SD10 bit = 0 QSG‐8475, Rev. New HOLT INTEGRATED CIRCUITS 11/7/13 5 Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from...
- Page 6 RXA and RXB terminals respectively on J6. Set the source rate to High Speed 100kb/s; in the default state with all FILT bits set to ‘0’ the device will accept any label value. Transmit an FF FF FF FF pattern and verify all LEDs are lit, repeat with a 00 00 00 00 pattern, all LEDs should go out. With 55 55 55 55 pattern, alternate LEDs should be lit, with the exception of parity bit32. 5. To check the filter bit functions, set the FILT7:0 switches to all ‘1’s. Reset the device, then transmit the 55 55 55 55 pattern again; no data should be received. Now set the LBL switches to ‘0101 0101’ and transmit again; the alternates 1010 pattern should be indicated on the LEDs. 6. Filtering for the SD9 and SD10 ARINC bits can also be done in a similar manner. First put the SDE switch to ‘1’, then set SD9/10 bits as desired. 7. Access to all the ARINC data bits, update and clock is also available on J7, see table for connector pin numbers. QSG‐8475, Rev. New HOLT INTEGRATED CIRCUITS 11/7/13 6 Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from...
- Page 7 Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from...
- Page 8 Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from...
- Page 9 Appendix 1 Lightning Protection The ARINC 429 inputs (RXA‐R and RXB‐R) are protected to RTCA/DO‐160G, Section 22 Level 3 Pin Injection Test Waveform Set A (3 & 4), Set B (3 & 5A) and Set Z (3 & 5B) when used with the recommended 13kohm series input resistors. For more details please see the latest datasheet. The level of lightning protection can be increased by using external components, please see the Application Notes available on Holt’s website http://www.holtic.com. The layout of a HI‐8475 board should always have low conductivity paths from the device power/ground pin to the relevant power or ground origin. These paths should avoid proximity to sense or other signal traces; this applies to above and below as well as horizontally. It is good practice to have a power and ground ‘moat’ beneath the sense line to prevent disturbance on these lines during a ‘lightning’ event. QSG‐8475, Rev. New HOLT INTEGRATED CIRCUITS 11/7/13 9 Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from Downloaded from...
- Page 10 REVISION HISTORY Revision Date Description of Change QSG-8475, Rev. New 11-07-13 Initial Release QSG‐8475, Rev. New HOLT INTEGRATED CIRCUITS 11/7/13 10 Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Arrow.com. Downloaded from Downloaded from Downloaded from Downloaded from...