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Summary of Contents for PLX Technology PEX 8648
- Page 1 Using PEX 8648 SMA based (SI) Card White Paper Version 1.3 July 2010 Website: www.plxtech.com Technical Support: www.plxtech.com/support Copyright © 2008 by PLX Technology, Inc. All Rights Reserved – Version 1.3 July 20, 2010...
- Page 2 • PLX SDK (version 5.22 or higher) 2.1 Additional References • PLX PEX 8648 Quick Start Design Guide, www.plxtech.com/8648 Using PEX 8648 SMA Based (SI) Card White Paper – Version 1.3 © 2010 by PLX Technology, Inc. All Rights Reserved...
- Page 3 3 Configuration The PEX 8648 is a three station Gen 2 switch device with 48 maximum SerDes lanes. The SI RDK uses only stations 0 and 1. The first station – Station 0 – contains both the default upstream port (Port 0 –...
- Page 4 (range 250mV min – 1600mV max). Frequency value should be 100 MHz +/- 300ppm max. The reference clock feeding the chip is also made available for output via J24/25. Using PEX 8648 SMA Based (SI) Card White Paper – Version 1.3 © 2010 by PLX Technology, Inc. All Rights Reserved...
- Page 5 With this method of operation (using EEPROM to set values), the EEPROM is programmed or adjusted for the desired settings and the system is then reset to verify operation. Using PEX 8648 SMA Based (SI) Card White Paper – Version 1.3 © 2010 by PLX Technology, Inc. All Rights Reserved...
- Page 6 C for changing these registers. To confirm final setting, be sure to read back value after adjustment. Need to confirm against SDK SW revisions. Using PEX 8648 SMA Based (SI) Card White Paper – Version 1.3 © 2010 by PLX Technology, Inc. All Rights Reserved...
- Page 7 If connecting directly to a scope to observe and change the settings for the compliance pattern output, setting this bit is not required. Using PEX 8648 SMA Based (SI) Card White Paper – Version 1.3 © 2010 by PLX Technology, Inc. All Rights Reserved...
- Page 8 4) To the left of the screen, below “Device Selector”, locate pull-down selector and select item “PLX(I2C) Devices”. The PEX 8648 register and EEPROM menu are now visible on the left side of the page. Using PEX 8648 SMA Based (SI) Card White Paper – Version 1.3...
- Page 9 Port 3 as upstream. Here, drive is set to the PEX 8648 Data Book value of 600mV and resultant de-emphasis is set for ~ 10dB. Using PEX 8648 SMA Based (SI) Card White Paper – Version 1.3 © 2010 by PLX Technology, Inc. All Rights Reserved...
- Page 10 RefClk input configuration on the bottom SI Card unit. Examples for this configuration are discussed. Figure 5. Single PC connectivity Using PEX 8648 SMA Based (SI) Card White Paper – Version 1.3 © 2010 by PLX Technology, Inc. All Rights Reserved...
- Page 11 Reset bits 0x228[31], 0x254[19] and 0x230[12]. Reboot system Repeat test with backplane in path. Change SerDes settings and check for error counts. Using PEX 8648 SMA Based (SI) Card White Paper – Version 1.3 © 2010 by PLX Technology, Inc. All Rights Reserved...
- Page 12 If more than one lane is connected, select alternate SerDes and check corresponding lane errors per above. Figure 6. Error Register Using PEX 8648 SMA Based (SI) Card White Paper – Version 1.3 © 2010 by PLX Technology, Inc. All Rights Reserved...
- Page 13 9 Using Packet Generator in Two Card Set In this example, the PLX PEX 8648 Packet Generator and Monitor features are used to generate PCI Express heavy traffic across the link under test. • Step 1) Program Port 3 as upstream port on card # 2 as outlined in Loopback test.
- Page 14 Register 0234 – set Port 3 bits 27:24 for rate (8h) Register 0BE4 – set value bits 31:0 to (80024745) SerDes overrides Using PEX 8648 SMA Based (SI) Card White Paper – Version 1.3 © 2010 by PLX Technology, Inc. All Rights Reserved...
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Page 15: Revision History
11 Revision History Date Version Revision September 2008 Initial Release October 2008 Added Analog Slave Loopback for BERT operability. Using PEX 8648 SMA Based (SI) Card White Paper – Version 1.3 © 2010 by PLX Technology, Inc. All Rights Reserved...
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