ST M29W128GH User Manual

1

Introduction

This user manual describes the VHDL (VHSIC hardware description language) v1.1
behavioral model for the M29W128GH and M29W128GL Flash memory devices.
Organization of the VHDL model delivery package
The VHDL model delivery package is organized into a main directory, named
ST_M29W128G_V11.zip, containing six subdirectories with their related files (see
Figure 1).
code subdirectory: contains the code
lib subdirectory: contains library source files
sim subdirectory: contains the simulation initialization files
stim subdirectory: contains the stimuli files used for simulation
top subdirectory: contains the testbench file used for simulation
doc subdirectory: contains the application note for the model
Figure 1.
ST_M29W128G_V11.zip
readme.txt
run_ncsim
code
lib
doc
sim
Note: See the readme.txt file for the complete list of files contained in each folder.
November 2007
M29W128GH/L Flash memory VHDL model v1.1
Package architecture
m29w128g.vhd VHDL model
block_data.vhd
extended_memory.vhd
generic_data.vhd
protection_group.vhd
string_util.vhd
utility_pack.vhd
M29W128G_V1.1_UserManual.pdf
memory_file
CFImemory_file
NVMP_file
stim
top
Rev 2
UM0453
User manual
Autoselect.vhd
BlockErase.vhd
CFIAutoSelect.vhd
ChipErase.vhd
BufferProgram.vhd
EraseProgramSuspend.vhd
EraseSuspend.vhd
ExtendedBlock.vhd
Program.vhd
ProgramSuspend.vhd
ReadCFI.vhd
SpecialBusOp.vhd
UnlockBypass.vhd
V PP Bypass.vhd
TestBench.vhd tesbench file
Ai14413b
1/9
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