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Summary of Contents for Congatec SMARC conga-SA7
- Page 1 SMARC conga-SA7 ® SMARC 2.1 module based on Intel® Atom®, Pentium® and Celeron® Elkhart Lake SoC User’s Guide Revision 0.1 (Preliminary)
- Page 2 Revision History Revision Date (yyyy-mm-dd) Author Changes 2021-04-22 • Preliminary release Copyright © 2021 congatec GmbH SA70m01 2/65...
- Page 3 The information contained within this user’s guide, including but not limited to any product specification, is subject to change without notice. congatec GmbH provides no warranty with regard to this user’s guide or any other information contained herein and hereby expressly disclaims any implied warranties of merchantability or fitness for any particular purpose with regard to any of the foregoing.
- Page 4 Copyright © 2021, congatec GmbH. All rights reserved. All text, pictures and graphics are protected by copyrights. No copying is permitted without written permission from congatec GmbH. congatec GmbH has made every attempt to ensure that the information in this document is accurate yet the information contained within is supplied “as-is”.
- Page 5 (c) arising from course of performance, course of dealing, or usage of trade. congatec GmbH shall in no event be liable to the end user for collateral or consequential damages of any kind. congatec shall not otherwise be liable for loss, damage or expense directly or indirectly arising from the use of the product or from any other cause.
- Page 6 GmbH technicians and engineers are committed to providing the best possible technical support for our customers so that our products can be easily used and implemented. We request that you first visit our website at www.congatec.com for the latest documentation, utilities and drivers, which have been made available to assist you.
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Page 7: Table Of Contents
Mechanical Dimensions ............13 Optional Onboard Interfaces ........... 33 Standard Power ................ 14 Security Features ..............33 2.4.1 Supply Voltage ................. 14 congatec Board Controller (cBC) ..........33 2.4.2 Electrical Characteristics ............14 6.3.1 Board Information ..............33 2.4.3 Rise Time ................. 14 6.3.2... - Page 8 System Resources ..............63 I/O Address Assignment ............63 PCI Configuration Space Map ..........63 I²C Bus and SMBus ..............63 congatec System Sensors ............63 BIOS Setup Description ............64 10.1 Navigating the BIOS Setup Menu ........... 64 10.2 BIOS Versions................
- Page 9 Watchdog Signal Description ..........58 Table 31 GPIO Signal Description ............59 Table 32 Management Pins Signal Description ........60 Table 33 Boot Select Signal Description ..........61 Table 34 Power and GND Signal Descriptions ........62 Copyright © 2021 congatec GmbH SA70m01 9/65...
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Page 10: Introduction
Additionally, the conga-SA7 supports quad channel LPDDR4x memory with up 16 GB capacity and data rates up to 4267 MT/s, multiple I/O interfaces, up to three independent displays and various congatec embedded features. By offering most of the functional requirement for any SMARC application, the conga-SA7 provides manufacturers and developers with a platform to jump-start the development of systems and applications based on SMARC specification. -
Page 11: Options Information
32 GB 32 GB 32 GB Wifi/BT Module TPM (Discrete) Infineon SLB9670 Infineon SLB9670 Infineon SLB9670 SD Card 1x 4-bit 1x 4-bit 1x 4-bit Max. TDP 12 W Copyright © 2021 congatec GmbH SA70m01 11/65... -
Page 12: Specifications
BIOS AMI Aptio ® V UEFI 2.x firmware 32 MB serial SPI with congatec Embedded BIOS features congatec Board Multi-stage watchdog, non-volatile user data storage, manufacturing and board information, board statistics, hardware monitoring, fan control, I2C bus, Power loss control Controller Power Mgmt. -
Page 13: Supported Operating Systems
Top Side Component Carrier Connector Height depends on the SMARC Module PCB connector height used 1.2±10% Bottom Side Component Height depends on the connector height used Carrier Board PCB All dimensions are in millimeters Copyright © 2021 congatec GmbH SA70m01 13/65... -
Page 14: Standard Power
The input voltages shall rise from 10 percent of nominal to 90 percent of nominal at a minimum slope of 250 V/s. The smooth turn-on requires that, during the 10 percent to 90 percent portion of the rise time, the slope of the turn-on waveform must be positive. Copyright © 2021 congatec GmbH SA70m01... -
Page 15: Power Consumption
COM is powered by VCC_5V, while in Soft-Off state COM is powered by VCC_5V, while in enhanced Soft-Off state Note The peripherals did not influence the measured values because they were powered externally. Copyright © 2021 congatec GmbH SA70m01 15/65... -
Page 16: Supply Voltage Battery Power
3. Consider the self-discharge of the battery when calculating the lifetime of the CMOS battery. For more information, refer to application note AN9_RTC_Battery_Lifetime.pdf on congatec GmbH website at www.congatec.com/support/application-notes. 4. We recommend to always have a CMOS battery present when operating the conga-SA7 Copyright ©... -
Page 17: Environmental Specifications
Storage: 5% to 95% Caution The above operating temperatures must be strictly adhered to at all times. When using a congatec heatspreader, the maximum operating temperature refers to any measurable spot on the heatspreader’s surface. Humidity specifications are for non-condensing conditions. -
Page 18: Block Diagram
2x UART (SER0, 3) SM Bus eSPI UART congatec SM Bus I2C_PM I2C_GP Board GPIO GPIO Controller Power Control Power Control Generation LID/SLEEP/FAN LID# / SLEEP# / FAN Optional - Not available by default Copyright © 2021 congatec GmbH SA70m01 18/65... -
Page 19: Cooling Solutions
1. We recommend a maximum torque of 0.4 Nm for carrier board mounting screws and 0.5 Nm for module mounting screws. 2. The gap pad material used on congatec heatspreaders may contain silicon oil that can seep out over time depending on the environmental conditions it is subjected to. -
Page 20: Csp Dimensions
CSP Dimensions Lidded Variants (Industrial) 63.76 17.6 3.2 ±0.15 ø2.7 x 6 mm non-threaded standoff for borehole version Copyright © 2021 congatec GmbH SA70m01 20/65... -
Page 21: Csp Dimensions
CSP Dimensions Bare-die Variants (Commercial) 63.76 17.6 2.8 (2X) 1.15 ±0.15 Without phase changer 16.9 ø2.7 x 6 mm non-threaded standoff for borehole version 4.2 (4X) Copyright © 2021 congatec GmbH SA70m01 21/65... -
Page 22: Hsp Dimensions
HSP Dimensions Lidded Variants (Industrial) 63.76 17.6 3.2 ±0.15 A-A (2:1) 90° ø2.7 x 6 mm non-threaded standoff for borehole version M3x0.5p (4X) 0.4 (8X) Chamfer on both sides Copyright © 2021 congatec GmbH SA70m01 22/65... -
Page 23: Hsp Dimensions
HSP Dimensions Bare-die Variants (Commercial) 63.76 17.6 1.15 ±0.15 Without phase changer ø2.7 x 6 mm non-threaded standoff 1.15 ±0.15 for borehole version Without phase changer Copyright © 2021 congatec GmbH SA70m01 23/65... -
Page 24: Connector Rows
(2x1 + 1 x2) (1 x2 + 2 x1) (2 x2) (1 x4) PCIe_A PCIe_A_REFCK PCIe_A_REFCK PCIe_A_REFCK PCIe_A_REFCK PCIe_A_REFCK PCIe_B PCIe_B_REFCK PCIe_B_REFCK PCIe_C PCIe_C_REFCK PCIe_C_REFCK PCIe_B_REFCK PCIe_B_REFCK PCIe_D PCIe_C_REFCK via carrier buffer PCIe_C_REFCK Copyright © 2021 congatec GmbH SA70m01 24/65... -
Page 25: Display Interfaces
1. The resolutions in table 9 apply when multiple displays are connected. 2. If eDP is the only active display, the eDP resolution is 4096x2160 @ 60Hz 3. If MIPI-DSI is the only active display, the resolution with compression is 5120x3200 @ 60 Hz. Copyright © 2021 congatec GmbH SA70m01 25/65... -
Page 26: Lvds
• resolutions up to 4096x2160 @ 60 Hz Note 1. The HDMI interface supports an optional dual-mode DisplayPort interface (assembly option). 2. Variants with optional dual-mode DisplayPort do not support native HDMI voltage levels. Copyright © 2021 congatec GmbH SA70m01 26/65... -
Page 27: Sata
The conga-SA7 offers two Gigabit Ethernet interfaces via TI DP83867CS/IS Ethernet PHY. The interfaces support the following: • full- or half-duplex operation at 10/100/1000 Mb/s • precision clock synchronization • low jitter and latency • TSN compliancy • Wake-on-LAN Copyright © 2021 congatec GmbH SA70m01 27/65... -
Page 28: Usb
The conga-SA7 offers a High Definition Audio interface. The HDA_RST# pin which is multiplexed with GPIO4 is configured to support HD audio by default. Note The audio interface will not function if you configure the multiplexed pin for GPIO functionality. Copyright © 2021 congatec GmbH SA70m01 28/65... -
Page 29: Sd Card
The SD card interface supports only storage devices. UART The conga-SA7 provides four UART ports: • UART1 and UART2 via the SoC • UART0 and UART3 via the congatec board controller Note No support for legacy mode operation Driver is available on the congatec website at www.congatec.com GPIO The conga-SA7 offers up to 14 GPIOs—11 GPIOs by default and three GPIOs through multiplexed pins P112–P114. -
Page 30: Spi
• general purpose I2C • power management I2C These interfaces are implemented through the congatec board controller and accessed through the congatec CGOS driver and API. The controller provides a fast-mode multi-master I2C bus that has maximum I2C bandwidth. 5.12 Power Control The conga-SA7 operates only with 5 V input voltage. - Page 31 The POWER_BTN# (pin P128) is an active-low open drain power button input from the carrier board. This power button signal is used to wake up or shut down the system from S5 state (soft off). Copyright © 2021 congatec GmbH SA70m01...
- Page 32 You should therefore µ ensure the power supply and decoupling capacitors provide enough power to drive the module. Note For more information about power control event signals, refer to the SMARC specification. ® Copyright © 2021 congatec GmbH SA70m01 32/65...
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Page 33: Additional Features
I²C bus from the x86 core architecture, the microcontroller increases the performance and reliability of the BIOS features, even during low power mode. In addition, it ensures the congatec embedded feature set is compatible amongst all congatec modules. -
Page 34: Fan Control
Enhanced Soft-Off State The conga-SA7 supports an enhanced Soft-Off state (S5e)—a congatec proprietary low-power Soft-Off state. In this state, the CPU module switches off almost all the onboard logic in order to reduce the power consumption to absolute minimum (between 0.05 mA and 0.09 mA). -
Page 35: Oem Bios Customization
OEM POST Logo This feature allows system designers to replace the congatec POST logo displayed in the upper left corner of the screen during BIOS POST with their own BIOS POST logo. Use the congatec system utility CGUTIL 1.5.4 or later to replace/add the OEM POST logo. -
Page 36: Oem Dxe Driver
The architecture of the CGOS API driver provides the ability to write application software that runs unmodified on all congatec CPU modules. All the hardware related code is contained within the congatec embedded BIOS on the module. See section 1.1 of the CGOS API software developers guide, which is available on the congatec website. -
Page 37: Conga Tech Notes
(Intel ® VT-x) added hardware support in the processor to improve the virtualization performance and robustness. RTS Real-Time Hypervisor supports Intel VT and is verified on all current congatec x86 hardware. ® Note congatec supports RTS Hypervisor. Copyright © 2021 congatec GmbH... -
Page 38: Ahci
If passive cooling is activated and the processor temperature is above the trip point the processor clock is throttled. See section 12 of the ACPI Specification 2.0 C for more information about passive cooling. Copyright © 2021 congatec GmbH SA70m01... -
Page 39: Acpi Suspend Modes And Resume Events
“Power Management” tab and check “Allow this device to wake the computer’ RTC Alarm In the power setup menue, active and configure “Resume On RTC Alarm” Watchdog Power Button Event Wakes unconditionally from S3 Copyright © 2021 congatec GmbH SA70m01 39/65... -
Page 40: Usb Port Mapping
Port 5 USB 2.0 USB 2.0 USB 2.0 USB 2.0 USB 2.0 USB 2.0 Port 5 Port 0 Port 1 Port 2 Port 3 Port 4 (dual role) USB 3.1 USB 3.1 SMARC Connector Copyright © 2021 congatec GmbH SA70m01 40/65... -
Page 41: Signal Descriptions And Pinout Tables
USB SS LVDS signaling for SuperSpeed USB signals PCIE PCI Express differential pair signals. In compliance with the PCI Express Base Specification 2.0 USB VBUS 5V 5V tolerant input for USB VBUS detection Copyright © 2021 congatec GmbH SA70m01 41/65... -
Page 42: Table 13 Smarc Edge Finger Pinout
GBE1_MDI0- GBE1_LINK100# GBE0_MDI3- GBE1_MDI1+ GBE0_MDI3+ GBE1_MDI1- GBE0_LINK100# GBE1_LINK1000# GBE0_LINK1000# GBE1_MDI2+ GBE0_MDI2- GBE1_MDI2- GBE0_MDI2+ GBE0_LINK_ACT# GBE1_MDI3+ GBE0_MDI1- GBE1_MDI3- GBE0_MDI1+ GBE1_CTREF GBE0_CTREF PCIE_D_TX+ / SERDES_0_TX+ GBE0_MDI0- PCIE_D_TX- / SERDES_0_TX- GBE0_MDI0+ GBE1_LINK_ACT# SPI0_CS1# PCIE_D_RX+ / SERDES_0_RX+ Copyright © 2021 congatec GmbH SA70m01 42/65... - Page 43 ESPI_CS1# / SPI1_CS1# / QSPI_CS1# ESPI_IO_2 / QSPI_IO_2 ESPI_CK / SPI1_CK / QSPI_CK ESPI_IO_3 / QSPI_IO_3 ESPI_IO_1 / SPI1_DIN / QSPI_IO_1 ESPI_RESET# ESPI_IO_0 / SPI1_DO / QSPI_IO_0 USB5+ USB5- USB0+ USB0- USB3_SSTX+ USB0_EN_OC# USB3_SSTX- USB0_VBUS_DET USB0_OTG_ID USB3_SSRX+ Copyright © 2021 congatec GmbH SA70m01 43/65...
- Page 44 PCIE_C_REFCK+ PCIE_C_TX+ / SERDES_1_TX+ PCIE_C_REFCK- PCIE_C_TX- / SERDES_1_TX- PCIE_A_REFCK+ PCIE_B_REFCK+ PCIE_A_REFCK- PCIE_B_REFCK- PCIE_A_RX+ PCIE_B_RX+ PCIE_A_RX- PCIE_B_RX- PCIE_A_TX+ PCIE_B_TX+ PCIE_A_TX- PCIE_B_TX- HDMI_D2+ / DP1_LANE0+ DP0_LANE0+ HDMI_D2- / DP1_LANE0- DP0_LANE0- DP0_AUX_SEL HDMI_D1+ / DP1_LANE1+ DP0_LANE1+ Copyright © 2021 congatec GmbH SA70m01 44/65...
- Page 45 LVDS0_0+ / eDP0_TX0+ / DSI0_D0+ P125 BOOT_SEL2# S126 LVDS0_0- / eDP0_TX0- / DSI0_D0- P126 RESET_OUT# S127 LCD0_BKLT_EN P127 RESET_IN# S128 LVDS0_1+ / eDP0_TX1+ / DSI0_D1+ P128 POWER_BTN# S129 LVDS0_1- / eDP0_TX1- / DSI0_D1- Copyright © 2021 congatec GmbH SA70m01 45/65...
- Page 46 VDD_IN S151 CHARGING# P151 VDD_IN S152 CHARGER_PRSNT# P152 VDD_IN S153 CARRIER_STBY# P153 VDD_IN S154 CARRIER_PWR_ON P154 VDD_IN S155 FORCE_RECOV# P155 VDD_IN S156 BATLOW# P156 VDD_IN S157 TEST# S158 Note Not supported Not connected Copyright © 2021 congatec GmbH SA70m01 46/65...
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Page 47: Table 14 Lvds Signal Description
DDC data line for flat panel detection and control. Possible EDID EEPROM I/O OD PU 2k2 address conflicts may occur if multiple displays are implemented. 1.8V I2C_LCD_CK S139 DDC clock line for flat panel detection and control O OD PU 2k2 1.8V Copyright © 2021 congatec GmbH SA70m01 47/65... - Page 48 1.8V usually via the eDP auxiliary pair I2C_LCD_CK S139 I2C clock to read LCD display EDID EEPROMs O 1.8V PU 1k3 Optional - eDP panel information is usually via the eDP auxiliary pair Copyright © 2021 congatec GmbH SA70m01 48/65...
- Page 49 1.8V I2C_LCD_CK S139 DC clock line for flat panel detection and control O 1.8V PU 2k2 Note The MIPI-DSI interface is not supported by default (assembly option only). Copyright © 2021 congatec GmbH SA70m01 49/65...
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Page 50: Table 15 Hdmi Signal Descriptions
Pull to GND on carrier for DP operation in dual-mode (DP++) implementations. Drive to I 1.8V PD 1M 1.8V on carrier for HDMI operation. Terminated on module through 1M resistor to GND Note The conga-SA7 offers this interface as an assembly option. Copyright © 2021 congatec GmbH SA70m01 50/65... -
Page 51: Table 16 Displayport
I2C clock (serial camera support link for serial cameras). I/O OD 1.8V PU 2k2 CSI0_TX+ I2C_CAM0_DAT / I2C data (serial camera support link for serial cameras) I/O OD 1.8V PU 2k2 CSI0_TX- CSI1_RX0+ CSI1 differential data pair 0 I LVDS Not connected CSI1_RX0- D-PHY Copyright © 2021 congatec GmbH SA70m01 51/65... -
Page 52: Table 18 Sdio Signal Descriptions
SDIO Card Detect. This signal indicates when a SDIO/MMC I OD 3.3V PU 10k card is present SDIO_PWR_EN SDIO Power Enable. This signal is used to enable the power O 3.3V PD 100k being supplied to a SD/MMC card device Copyright © 2021 congatec GmbH SA70m01 52/65... -
Page 53: Table 19 Spi0 Signal Descriptions
This pin is optional for single master-single ESPI_ALERT1# PU 100k 1.8V slave configuration where I/O[1] can be used to signal the alert event Note The conga-SA7 supports only general purpose devices on the eSPI/SPI1 bus. Copyright © 2021 congatec GmbH SA70m01 53/65... -
Page 54: Table 21 I2S Signal Descriptions
HDA_RST# is default GPIO4 Table 23 I2C Signal Descriptions Signal Pin # Description PU/PD Comment I2C_GP_CK I2C General purpose clock signal I/O 1.8V PU 2k2 I2C_GP_DAT I2C General purpose data signal I/O 1.8V PU 2k2 Copyright © 2021 congatec GmbH SA70m01 54/65... -
Page 55: Table 24 Asynchronous Serial Port Signal Description
Pulled low by module to disable USB0 power. Pulled low by I/O OD 3.3V PU 10k USB1_EN_OC# carrier OD driver to indicate over-current situation. USB2_EN_OC# A pull-up to a 3.3V rail shall be present on the module USB3_EN_OC# USB4_EN_OC# USB5_EN_OC# Copyright © 2021 congatec GmbH SA70m01 55/65... -
Page 56: Table 26 Pcie Signal Description
Differential PCIe link C receive data pair I LVDS PCIe PCIE_C_RX- PCIE_D_RX+ Differential PCIe link D receive data pair I LVDS PCIe PCIE_D_RX- PCIE_A_REFCK+ Differential PCIe Link reference clock output DC coupled O LVDS PCIe PCIE_A_REFCK- Copyright © 2021 congatec GmbH SA70m01 56/65... -
Page 57: Table 27 Serdes Signal Description
Supports SATA specification, Revision 3.0 SATA_TX- SATA_RX+ SATA 0 receive differential data pair I SATA Supports SATA specification, Revision 3.0 SATA_RX- SATA_ACT# Active low SATA activity indicator O OD 3.3V Up to 24 mA LED current Copyright © 2021 congatec GmbH SA70m01 57/65... -
Page 58: Table 29 Gigabit Ethernet Signal Description
Ethernet controller. The SDP pins can be used for IEEE1588 auxiliary device connections and for other miscellaneous hardware or software-control purposes Table 30 Watchdog Signal Description Signal Name Description PU/PD Comment WDT_TIME_OUT# S145 Watchdog timer output O 1.8V PD 100k Driven only during runtime Copyright © 2021 congatec GmbH SA70m01 58/65... -
Page 59: Table 31 Gpio Signal Description
GPIO13 S123 Bidirectional general purpose input/output I/O 1.8V Note Pins P112-P114 support alternate use by default. For GPIO functionality, change the default configuration in the BIOS menu under Advanced -> GPIO Configuration submenu. Copyright © 2021 congatec GmbH SA70m01 59/65... -
Page 60: Table 32 Management Pins Signal Description
Held low by carrier to invoke module vendor specific test function(s). Pulled up on I OD 3.3V PU 100k module. Driven by OD part on carrier 3.3V SMB_ALERT_1V8# SM Bus Alert# (interrupt) signal I OD 1.8V PU 2k2 Copyright © 2021 congatec GmbH SA70m01 60/65... -
Page 61: Table 33 Boot Select Signal Description
Float Float Float Module SPI Note 1. The conga-SA7 supports only Carrier SPI boot source (GND, Float, Float) configuration. 2. For other boot source configurations, the conga-SA7 will boot from on-module SPI flash. Copyright © 2021 congatec GmbH SA70m01 61/65... -
Page 62: Table 34 Power And Gnd Signal Descriptions
This option requires a customized variant. Note External 3.3 V is required for RTC battery implementation with supercap. Default conga-SA7 configuration does not support supercap charging. The supercap charging is only possible with a BOM option. Copyright © 2021 congatec GmbH SA70m01 62/65... -
Page 63: System Resources
• voltage sensors – 5V standard voltage sensor • current sensor • fan monitor The sensors and monitors are accessible through CGOS interface, and also visible on the “Health Monitor”submenu in the BIOS Setup. Copyright © 2021 congatec GmbH SA70m01 63/65... -
Page 64: Bios Setup Description
Navigating the BIOS Setup Menu The BIOS setup menu shows the features and options supported in the congatec BIOS. To access and navigate the BIOS setup menu, press the <DEL> or <F2> key during POST. The right frame displays the key legend. Above the key legend is an area reserved for text messages. -
Page 65: Update From External Flash
10.3.1 Update from External Flash For instructions on how to update the BIOS from external flash, refer to the AN7_External_BIOS_Update.pdf application note on the congatec website at http://www.congatec.com. 10.4 Supported Flash Devices The conga-SA7 supports the following flash devices: • W25R256JWXIQ The flash device listed above can be used on the carrier board to support external BIOS.
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