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Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as, medical products.
S5U13781R00C100 reference board has host controller connector, LCD panel connector, clock generator, SPI flash memory (16Mbit), power regulation circuit for S1D13781 core and DC/DC converter for LED back light. This user manual is updated as appropriate. Please check the Seiko Epson Website at http://www.epson.jp/device/semicon_e/product/lcd_controllers/index.htm for the latest revision of this document before beginning any development.
Features Features The S5U13781R00C100 reference board includes the following features: • QFP 100pin S1D13781F00A100 Display Controller • 2.54mm pitch vias for host bus interface header • 2.54mm pitch vias for LCD panel header • Connection area with 2.54mm pitch vias for header and FPC (0.5mm pitch 55 electrode) connector to connect LCD panel.
The S1D13781 has three configuration inputs, CNF[2:0], which are used to configure the S1D13781 host interface type as described in Table 3-1, Signal Allocation for Host Interface. The S5U13781R00C100 reference board defaults to the SPI interface (the default setting for CNF[2:0] = 111).
Board Settings Jumper setting The S5U13781R00C100 reference board includes jumpers which control the functions described in Table 3-2, Jumper settings. For jumper locations on the reference board, see Figure 3-1, Jumper Pin Locations. Table 3-2 Jumper Settings Function Jumper Description...
Board Settings Power Supply The S5U13781R00C100 reference board is designed to supply VDDCORE (1.5V) and LED back light power (LED+/LED-) from the 2.7V to 5.5V input of J4-4 (VDD DCDC). The voltage output of 2.7V to 3.3V from J4-3 (VDDIO) is used for the U4 (S1D13781 Display Controller) power supply, D2 (LED indicator) and Y1(SG-310SCF 24MHz OSC).
Figure 4-1 Reference Board Connector Locations J4 Host Interface Connector The host interface pins of S1D13781 are connected to J4 of the S5U13781R00C100 reference board. See Figure 7-1, S5U13781R00C100 Schematic Diagram (1 of 2), and Figure 7-2, S5U13781R00C100 Schematic Diagram (2 of 2), for detailed pin allocation.
Connectors J8 ~ J9 Connectors for Panel Connection J8 through J10 on the S5U13781R00C100 reference board are standard connectors used to implement suitable connection for various LCD panels. J8 is a 0.5mm pitch FPC connector (FH28-55S, bottom electrode type). See Figure 7-1, S5U13781R00C100 Schematic Diagram (1 of 2), and Figure 7-2, S5U13781R00C100 Schematic Diagram (2 of 2), for detailed pin allocation.
Others Others Quartz-Crystal Resonator for CLKI S5U13781R00C100 reference board includes Y1 (SG-310SCF 24MHz oscillator) for the CLKI input of the S1D13781. The output of the oscillator is disabled by connecting J6 1-2 and enabled by disconnecting. SPI flash memory The S5U13781R00C100 reference board includes SPI NOR FLASH standard memory of 16Mbit capacity.
Sales and Technical Support 10 Sales and Technical Support For more information on Epson Display Controllers, visit the Epson Global website. https://global.epson.com/products_and_drivers/semicon/products/display_controllers/ For Sales and Technical Support, contact the Epson representative for your region. https://global.epson.com/products_and_drivers/semicon/information/support.html Seiko Epson Corporation S5U13781R00C100 Reference Board (Rev.1.1)
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