Yamaha RX-V681 Service Manual page 113

A B C
1
DIGITAL 3/7
t o 0 0 1 . s h t
H R X _ C L K , H R X _ Y [ 0 - 7 ] , H R X _ C [ 0 - 7 ] , H R X _ D E , H R X _ H S , H R X _ V S
to DIGITAL 1/7
( H D M I R x )
t o 0 0 2 . s h t V D E C _ C L K , V D E C _ Y C [ 0 - 7 ] , V D E C _ D E , V D E C _ H S , V D E C _ V S , V D E C _ C S
to DIGITAL 2/7
( V D e c )
2
D [ 0 - 1 5 ]
A [ 0 - 2 3 ]
t o 0 0 5 . s h t
M C B U S _ N _ R D
to DIGITAL 5/7
( u - C o m )
F P G A _ N _ W R
F P G A _ N _ C S
C B 5 1
n o _ u s e
1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8
+ 3 . 3 F P G
V +
3 5
3
V - D G N D
+ 3 . 3 D V
I C 5 2
D G N D n o _ u s e
2
F P G A _ S C K 4 1 0
1
J 5 0 0 R 5 0 0
F P G A _ M O S I
0 0
J 5 0 1
F P G A _ N _ C F G
0
t o 0 0 5 . s h t
J 5 0 3
to DIGITAL 5/7
( u - C o m )
0
J 5 0 4
0
J 5 0 2
4
I C 5 3 3
P a r t N o . V e n d e r
Y F 9 6 1 B 0 Z E N T E L A 3 V 5 6 S 4 0 G T P - 6 0
Y G 9 3 4 A 0 E S M T M 1 2 L 2 5 6 1 6 1 6 A - 6 T G 2 S
X 4 9 4 3 E 0 W I N B O N D W 9 8 2 5 G 6 K H - 6
5
+ 3 . 3 F P G
L 5 0 1
B K P 1 0 0 5 H S 6 8 0 - T
E 3 B 1 5
+ 3 . 3 D V V C C I O 1 G N D
G 3 I C 5 0 B 2
V C C I O 1 G N D
K 3 E P 4 C E 1 5 F 1 7 C 6 N C 1 2
V C C I O 2 G N D
M 3 C 5
V C C I O 2 G N D
P 4 D 1 0
V C C I O 3 G N D
FPGA
P 7 D 7
V C C I O 3 G N D
T 1 E 1 3
V C C I O 3 G N D
P 1 0 E 2
D G N D
V C C I O 4 G N D
P 1 3 E 4
V C C I O 4 G N D
T 1 6 G 1 3
V C C I O 4 G N D
K 1 4 G 4
V C C I O 5 G N D
M 1 4 No replacement H 1 0
V C C I O 5 G N D
E 1 4 H 1 5
V C C I O 6 part available. G N D
G 1 4 H 1 6
V C C I O 6 G N D
A 1 6 H 7
V C C I O 7 G N D
6
C 1 0 H 8
V C C I O 7 G N D
C 1 3 H 9
V C C I O 7 G N D
A 1 J 1 0
V C C I O 8 G N D
C 4 J 7
V C C I O 8 G N D
+ 1 . 2 F P G C 7 J 8
V C C I O 8 G N D
G 1 0 J 9
L 5 0 2 D G N D V C C I N T G N D
B L M 2 1 P G 6 0 0 S N 1 D
G 6 K 1 3
+ 1 . 2 D V V C C I N T G N D
G 7 K 4
V C C I N T G N D
G 8 M 1 3
V C C I N T G N D
G 9 M 4
V C C I N T G N D
H 1 1 N 1 0
V C C I N T G N D
H 6 N 7
V C C I N T G N D
K 7 P 1 2
V C C I N T G N D
+ 1 . 2 P L L P 5
G N D
N 4 R 1 5
L 5 1 2 V C C D _ P L L 1 G N D
B K P 1 0 0 5 H S 6 8 0 - T
D 1 3 R 2
+ 1 . 2 F P L L V C C D _ P L L 2 G N D
L 5 M 5
V C C A 1 G N D A 1
F 1 2 E 1 2
V C C A 2 G N D A 2
7
+ 2 . 5 F P G
L 5 0 3 D G N D
B K P 1 0 0 5 H S 6 8 0 - T
+ 2 . 5 F P G A
D G N D
1.191V
1.202V
+ 1 . 2 D V + 1 . 8 D + 1 . 2 F P L L + 1 . 8 D
8
R P 1 0 9 L 1 2 1 D - T R
R P 1 1 5 H 1 2 1 D - T 1 - F
V O U T V D D
C 5 9 7 I C 5 7
G N D C E
1 0 / 1 0
5 4
I C 4 5
1 2 3
D G N D
D G N D
9
N O T I C E R E S I S T O R
( m o d e l )
R E M A R K S P A R T S N A M E
J J A P A N
U U . S . A N O M A R K C A R B O N F I L M R E S I S T O R ( P = 5 )
C C A N A D A C A R B O N F I L M R E S I S T O R ( P = 1 0 )
M E T A L O X I D E F I L M R E S I S T O R
R G E N E R A L ★ All voltages are measured with a 10M Ω /V DC electronic voltmeter.
T C H I N A M E T A L F I L M R E S I S T O R
★ Components having special characteristics are marked ⚠ and must be replaced
K K O R E A M E T A L P L A T E R E S I S T O R
F I R E P R O O F C A R B O N F I L M R E S I S T O R with parts having specifications equal to those originally installed.
A A U S T R A L I A
B B R I T I S H C E M E N T M O L D E D R E S I S T O R ★ Schematic diagram is subject to change without notice.
G S T A N D A R D S E M I V A R I A B L E R E S I S T O R
C H I P R E S I S T O R
L S I N G A P O R E
E S O U T H E U R O P E
C A P A C I T O R
V T A I W A N
R E M A R K S P A R T S N A M E
F R U S S I A N
Details of colored lines
N O M A R K E L E C T R O L Y T I C C A P A C I T O R
P L A T I N A M E R I C A
T A N T A L U M C A P A C I T O R
S B R A Z I L
10 N O M A R K C E R A M I C C A P A C I T O R
H T H A I
C E R A M I C T U B U L A R C A P A C I T O R
P O L Y E S T E R F I L M C A P A C I T O R
P O L Y S T Y R E N E F I L M C A P A C I T O R
M I C A C A P A C I T O R
P P O L Y P R O P Y L E N E F I L M C A P A C I T O R
S E M I C O N D U C T I V E C E R A M I C C A P A C I T O R
P O L Y P H E N Y L E N E S U L F I D E F I L M
S
C A P A C I T O R
D E F
+ 2 . 5 F P G
S t a n d a r d
P S A S
M S E L 0 0 0
M S E L 1 0 1
M S E L 2 0 0
M S E L 3 0 0
R 5 1 1
1 K
R 5 1 2
R 5 2 4 1 K
1 K
D G N D
+ 3 . 3 F P G + 3 . 3 D V
1 K R 5 1 8
H 1 3 H 3
M S E L 0 T C K
R 5 2 0
H 1 2 I C 5 0 H 4
M S E L 1 T D I
G 1 2 E P 4 C E 1 5 F 1 7 C 6 N J 4 1 0 K
M S E L 2 T D O
FPGA R 5 2 1 + 2 . 5 F P G
J 5
T M S
N _ C O N F I G H 5 1 0 K
n C O N F I G
N _ S T A T U S F 4
n S T A T U S
No replacement F P G A _ 2 7 M H Z
N _ C E J 3 E 1
n C E C L K 1
C O N F _ D O N E H 1 4 part available. M 2
C O N F _ D O N E C L K 2
D C L K H 1 M 1
D C L K C L K 3
E 1 5
C L K 4
D A T A H 2 E 1 6 R 5 2 3
I O 1 / D A T A 0 C L K 5
4 7
A S D I C 1 M 1 5
I O 1 / D A T A 1 / A S D O C L K 6 L o o p 1
N _ C S D 2 M 1 6
I O 1 / F L A S H _ n C E / n C S O C L K 7
D G N D I C 5 0
D G N D
: R 5 5 2 , 5 5 6 R 5 3 1
D G N D
1 K
5 6 7 8
P a r t T y p e 1 2 3 4 1 2 3 4
+ 3 . 3 D V
4 3 1 2
7 6 8 5 7 6 8 5
C 5 7 8
1 0 / 1 0
C 5 7 9
0 . 1 / 1 0 ( B J )
C 5 8 0
0 . 1 / 1 0 ( B J )
C 5 8 1
0 . 1 / 1 0 ( B J )
5 4 5 3 5 2 5 1 5 0 4 9 4 8 4 7 4 6 4 5 4 4 4 3 4 2 4 1 4 0 3 9 3 8 3 7 3 6 3 5 3 4 3 3 3 2 3 1 3 0 2 9 2 8
C 5 8 2
I C 5 3 A 3 V 5 6 S 4 0 G T P - 6 0 Y F 9 6 1 B 0
0 . 1 / 1 0 ( B J )
1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7
C 5 8 3
0 . 1 / 1 0 ( B J )
C 5 8 4
0 . 1 / 1 0 ( B J )
C 5 8 5
0 . 1 / 1 0 ( B J )
D G N D
D G N D
5 6 7 8 5 6 7 8 5 6 7 8
1 2 3 4 1 2 3 4
4 3 1 2 4 3 1 4 2 3 1 2
7 6 8 5 7 6 8 5
R 5 2 8
: R 5 5 3 , 5 5 7 , 5 5 9 , 5 6 3 , 5 6 7 + 3 . 3 F P G
n o _ u s e
C 5 5 0
1 0 / 1 0
C 5 5 2
0 . 1 / 1 0 ( B J )
C 5 5 5
0 . 1 / 1 0 ( B J )
C 5 5 6
0 . 1 / 1 0 ( B J )
C 5 5 8 5 4 5 3 5 2 5 1 5 0 4 9 4 8 4 7 4 6 4 5 4 4 4 3 4 2 4 1 4 0 3 9 3 8 3 7 3 6 3 5 3 4 3 3 3 2 3 1 3 0 2 9 2 8
I C 5 4
0 . 1 / 1 0 ( B J ) 1 2 3 4 5 6 7 8 9 1 0 1 1 1 2 1 3 1 4 1 5 1 6 1 7 1 8 1 9 2 0 2 1 2 2 2 3 2 4 2 5 2 6 2 7
C 5 5 9
0 . 1 / 1 0 ( B J )
C 5 6 0
0 . 1 / 1 0 ( B J )
C 5 6 3
0 . 1 / 1 0 ( B J )
D G N D
D G N D
n o u s e
2.496V 3.283V
+ 3 . 3 D
+ 2 . 5 F P G A + 3 . 3 D + 3 . 3 D V
R P 1 0 9 L 2 5 1 D - T R
6 5 4
V O U T V D D
C 5 9 2
I C 5 5 Q 4 5 1
1 0 / 1 0 G N D C E
3 2
1 2 3
Q 4 5 0
R A L 0 3 5 P 0 1
1 D T A 0 4 4 E U B T L
D G N D
D G N D
to DIGITAL 5/7
D V _ P O N t o 0 0 5 . s h t
( u - C o m )
IC45: RP115H121D-T1-F
Low On Resistance/ Low Voltage 1ch 500mA/ 1.0A Alternative LDO
V
CE
Red / full line: Power supply (+)
Red /dashed line: Power supply (-)
Orange: Signal detect
Yellow: Clock
Green: Protection detect
Brown: Reset signal
Blue: Panel key input
G H
RX-V681 RX-A760
A _ S U D Q M J 1 B 1
I O 2 I O 1
A _ S C K E C 5 3 7 J 2 C 2 V D E C _ Y C [ 4 ]
I C 5 0
I O 2 I O 1
0 . 1 / 1 0 ( B J ) E P 4 C E 1 5 F 1 7 C 6 N
J 6 D 1 V D E C _ Y C [ 6 ]
+ 1 . 2 F P G V C C I N T I O 1
0 . 1 / 1 0 ( B J )
B _ S D Q [ 8 ] K 1 D 4
I O 2 V C C D _ P L L 3
+ 1 . 2 P L L
V D E C _ Y C [ 2 ] K 2 E 5
D G N D
I O 2 G N D A 3
C 5 6 4
A _ S A D [ 9 ] K 5 FPGA F 1 V D E C _ H S
I O 2 I O 1
A _ S A D [ 5 ] K 6 F 2 A _ S A D [ 1 4 ]
I O 2 I O 1
B _ S D Q [ 9 ] L 1 F 3 V D E C _ Y C [ 7 ]
I O 2 I O 1
0 . 1 / 1 0 ( B J )
B _ S D Q [ 1 0 ] L 2 F 5
I O 2 V C C A 3 + 2 . 5 F P G
V D E C _ V S L 3 G 1 C 5 2 4 V D E C _ D E
I O 2 I O 1
A _ S A D [ 1 1 ] L 4 G 2 A _ S D Q [ 3 ]
I O 2 I O 1
A _ S A D [ 6 ] L 6 G 5 A _ S A D [ 8 ]
I O 2 I O 1
No replacement
B _ S D Q [ 1 1 ] N 1
I O 2
B _ S D Q [ 1 2 ] N 2 part available.
I O 2 D G N D
B _ S D Q [ 1 3 ] P 1
I O 2
B _ S D Q [ 1 4 ] P 2
I O 2
B _ S D Q [ 1 5 ] R 1
I O 2
K 1 0
I O 4
K 8 K 9
D G N D G N D I O 4
A _ S A D [ 3 ] L 7 L 1 0
I O 3 I O 4
A _ S A D [ 2 ] L 8 L 1 1
I O 3 I O 4
A _ S A D [ 7 ] M 6 L 9
I O 3 I O 4
A _ S A D [ 4 ] M 7 M 1 0 A _ S n C S
I O 3 I O 4
A _ S A D [ 1 ] M 8 M 1 1 A _ S L D Q M
I O 3 I O 4
A _ S D Q [ 1 ] N 3 M 9
I O 3 I O 4
A _ S D Q [ 6 ] N 5 N 1 1 A _ S n W E
I O 3 I O 4
A _ S D Q [ 9 ] N 6 N 1 2
I O 3 I O 4
A _ S A D [ 0 ] N 8 N 9 A _ S D Q [ 1 0 ]
I O 3 I O 4
R 5 3 4
A _ S D Q [ 2 ] P 3 P 1 1
4 7 K R 5 3 5 I O 3 I O 4
P 6 P 1 4 B _ S D Q [ 6 ]
4 7 K I O 3 I O 4
A _ S D Q [ 1 5 ] P 8 P 9 A _ S A D [ 1 0 ]
I O 3 I O 4
D G N D
A _ S D Q [ 4 ] R 3 R 1 0 A _ S A D [ 1 2 ]
I O 3 I O 4
R 5 1 3 R 4 R 1 1 A _ S n R A S
I O 3 I O 4
3 3
A _ S D Q [ 7 ] R 5 R 1 2 B _ S D Q [ 1 ]
I O 3 I O 4
R 5 5 8 A _ S D Q [ 1 2 ] R 6 R 1 3 B _ S D Q [ 3 ]
I O 3 I O 4
n o _ u s e
A _ S D Q [ 1 3 ] R 7 R 1 4 B _ S D Q [ 5 ]
I O 3 I O 4
A [ 2 ] R 8 R 9
C L K 1 5 C L K 1 3
A _ S D Q [ 0 ] T 2 T 1 0 A _ S A D [ 1 3 ]
I O 3 I O 4
V D E C _ C S T 3 T 1 1 A _ S n C A S
I O 3 I O 4
A _ S D Q [ 5 ] T 4 T 1 2 B _ S D Q [ 0 ]
I O 3 I O 4
A _ S D Q [ 8 ] T 5 T 1 3 B _ S D Q [ 2 ]
I O 3 I O 4
A _ S D Q [ 1 1 ] T 6 T 1 4 B _ S D Q [ 4 ]
I O 3 I O 4
A _ S D Q [ 1 4 ] T 7 T 1 5 B _ S D Q [ 7 ]
I O 3 I O 4
A [ 1 ] T 8 T 9
C L K 1 4 C L K 1 2
O U T 1 _ Y [ 7 ] B 1 6 J 1 1
I O 6 G N D D G N D
O U T 1 _ Y [ 8 ] C 1 5 J 1 2
I C 5 0
I O 6 I O 5
E P 4 C E 1 5 F 1 7 C 6 N
O U T 1 _ Y [ 9 ] C 1 6 J 1 3
I O 6 I O 5
O U T 1 _ C [ 3 ] D 1 5 FPGA J 1 4
I O 6 I O 5
O U T 1 _ C [ 8 ] D 1 6 J 1 5
I O 6 I O 5 / D E V _ C L R n
F D [ 1 1 ] F 1 3 J 1 6 0 . 1 / 1 0 ( B J )
I O 6 I O 5 / D E V _ O E
F D [ 1 0 ] F 1 4 K 1 1 C 5 4 3
I O 6 V C C I N T
O U T 1 _ C [ 5 ] F 1 5 K 1 2 + 1 . 2 F P G
I O 6 / C L K U S R I O 5
O U T 1 _ C [ 6 ] F 1 6 K 1 5
I O 6 / n C E O I O 5
F D [ 0 ] G 1 1 K 1 6
I O 6 I O 5
0 . 1 / 1 0 ( B J )
O U T 1 _ C [ 4 ] G 1 5 L 1 2
I O 6 / C R C _ E R R O R V C C A 4
O U T 1 _ D E G 1 6 L 1 3 + 2 . 5 F P G
I O 6 / I N I T _ D O N E I O 5
C 5 5 7
L 1 4
I O 5
L 1 5
I O 5
L 1 6
I O 5
0 . 1 / 1 0 ( B J )
M 1 2
G N D A 4 D G N D
N 1 3
V C C D _ P L L 4
C 5 4 6
N 1 4 + 1 . 2 P L L
I O 5
No replacement N 1 5
I O 5
N 1 6
L o o p 1
part available. I O 5
P 1 5
I O 5
P 1 6
I O 5
R 1 6
I O 5
O U T 2 _ D [ 5 ] A 1 0 A 2
I O 7 I O 8
O U T 2 _ D [ 2 ] A 1 1 A 3
I O 7 I O 8
O U T 1 _ C [ 0 ] A 1 2 A 4
I O 7 I O 8
H R X _ Y [ 0 ] A 1 3 A 5
I O 7 I O 8 / D A T A 7
O U T 1 _ Y [ 5 ] A 1 4 A 6
I O 7 I O 8
O U T 1 _ Y [ 6 ] A 1 5 A 7
I O 7 I O 8
A [ 5 ] A 9 A 8
C L K 8 C L K 1 0
O U T 2 _ D [ 4 ] B 1 0 B 3
I O 7 I O 8
O U T 2 _ D [ 1 ] B 1 1 B 4
I O 7 I O 8
O U T 1 _ C [ 1 ] B 1 2 B 5
I O 7 I O 8
O U T 1 _ Y [ 3 ] B 1 3 B 6
I O 7 I O 8
O U T 1 _ C L K B 1 4 B 7
I O 7 I O 8 / D A T A 4
A [ 6 ] B 9 B 8
C L K 9 C L K 1 1
H R X _ C [ 6 ] C 1 1 C 3 V D E C _ Y C [ 3 ]
I O 7 I O 8
O U T 1 _ Y [ 4 ] C 1 4 C 6
I O 7 I O 8
O U T 2 _ D [ 7 ] C 9 C 8
I O 7 I O 8
O U T 1 _ Y [ 2 ] D 1 1 D 3 V D E C _ Y C [ 5 ]
I O 7 I O 8
O U T 1 _ Y [ 1 ] D 1 2 D 5
I O 7 I O 8
O U T 1 _ C [ 2 ] D 1 4 D 6
I O 7 I O 8
H R X _ C [ 5 ] D 9 D 8
I O 7 I O 8
O U T 2 _ D [ 6 ] E 1 0 E 6 V D E C _ Y C [ 1 ]
I O 7 I O 8 / D A T A 6
O U T 1 _ Y [ 0 ] E 1 1 E 7
I O 7 I O 8 / D A T A 5
O U T 2 _ D [ 3 ] E 9 E 8 0 . 1 / 1 0 ( B J )
I O 7 I O 8 / D A T A 2
0 . 1 / 1 0 ( B J )
F 1 0 F 6 + 1 . 2 F P G
D G N D
G N D G N D
F 1 1 F 7 D G N D
V C C I N T V C C I N T
H R X _ C [ 4 ] + 1 . 2 F P G C 5 3 3 F 9 F 8 C 5 2 1 V D E C _ Y C [ 0 ]
I O 7 I O 8 / D A T A 3
IC55: RP109L251D-TR
IC57: RP109L121D-TR
CMOS-based voltage regulator
V
DD 4 5 OUT
V 4
DD
1 V
FB
Vref
Current Limit
Reverse Detector
GND Vref
3 2
Current Limit
Pin No. Symbol Description
CE
1 V Input Pin 3
DD
2 GND Ground Pin
3 CE Chip Enable Pin ("H" Active)
4 ECO MODE Alternative Pin
5 V Output Pin
OUT
I J K
I C 5 0
H R X _ C [ 3 ]
A [ 3 ]
A [ 4 ]
H T X 1 _ C L K , H T X 1 _ Y [ 0 - 9 ] , H T X 1 _ C [ 0 - 9 ] , H T X 1 _ D E , H T X 1 _ H S , H T X 1 _ V S , H T X 2 _ C L K , H T X 2 _ D [ 0 - 7 ]
t o 0 0 1 . s h t
( H D M I R X T x )
F D [ 3 ]
F D [ 2 ]
O U T 1 _ H S
O U T 1 _ V S
F D [ 1 ]
O U T 2 _ C L K R 4 5 3 H T X 2 _ C L K
2 2
O U T 1 _ C [ 9 ] R 5 7 4
O U T 2 _ D [ 7 ] 2 2 X 4 H T X 2 _ D [ 7 ]
F D [ 9 ]
O U T 2 _ D [ 6 ] H T X 2 _ D [ 6 ]
F D [ 8 ]
O U T 2 _ D [ 5 ] H T X 2 _ D [ 5 ]
O U T 2 _ D [ 4 ] H T X 2 _ D [ 4 ]
O U T 1 _ C [ 7 ]
R 5 7 5
F D [ 6 ]
O U T 2 _ D [ 3 ] 2 2 X 4 H T X 2 _ D [ 3 ]
F D [ 4 ]
O U T 2 _ D [ 2 ] H T X 2 _ D [ 2 ]
F D [ 5 ]
O U T 2 _ D [ 1 ] H T X 2 _ D [ 1 ]
O U T 2 _ D [ 0 ] H T X 2 _ D [ 0 ]
R 5 7 6
2 2 X 4
F D [ 1 2 ] O U T 1 _ Y [ 9 ] H T X 1 _ Y [ 9 ]
F D [ 7 ] O U T 1 _ Y [ 8 ] H T X 1 _ Y [ 8 ]
O U T 1 _ Y [ 7 ] H T X 1 _ Y [ 7 ]
F D [ 1 4 ] O U T 1 _ Y [ 6 ] H T X 1 _ Y [ 6 ]
: R 5 7 6 , 5 7 7
F D [ 1 3 ] R 5 7 7
2 2 X 4
O U T 1 _ Y [ 5 ] H T X 1 _ Y [ 5 ]
F D [ 1 5 ]
O U T 1 _ Y [ 4 ] H T X 1 _ Y [ 4 ]
O U T 1 _ Y [ 3 ] H T X 1 _ Y [ 3 ]
O U T 1 _ Y [ 2 ] H T X 1 _ Y [ 2 ]
R 5 7 8
H R X _ C [ 2 ]
2 2 X 4
O U T 1 _ Y [ 0 ] H T X 1 _ Y [ 0 ]
H R X _ C [ 0 ]
O U T 1 _ Y [ 1 ] H T X 1 _ Y [ 1 ]
R 5 7 0
O U T 1 _ C [ 0 ] H T X 1 _ C [ 0 ]
H R X _ Y [ 5 ] 1 K
O U T 1 _ C [ 1 ] H T X 1 _ C [ 1 ]
H R X _ Y [ 2 ]
R 5 7 9
O U T 2 _ D [ 0 ] O U T 1 _ C [ 7 ] 2 2 X 4 H T X 1 _ C [ 7 ]
A [ 7 ] O U T 1 _ C [ 6 ] H T X 1 _ C [ 6 ]
H R X _ C [ 1 ] O U T 1 _ C [ 5 ] H T X 1 _ C [ 5 ]
R 5 7 1 O U T 1 _ C [ 4 ] H T X 1 _ C [ 4 ]
1 K
H R X _ Y [ 7 ] R 5 8 0
O U T 1 _ C [ 2 ] 2 2 X 4 H T X 1 _ C [ 2 ]
H R X _ Y [ 3 ]
D G N D O U T 1 _ C [ 3 ] H T X 1 _ C [ 3 ]
H R X _ Y [ 1 ]
O U T 1 _ C [ 8 ] H T X 1 _ C [ 8 ]
O U T 1 _ C [ 9 ] H T X 1 _ C [ 9 ]
R 5 3 7 2 2
H R X _ Y [ 4 ] O U T 1 _ C L K H T X 1 _ C L K
O U T 2 _ C L K O U T 1 _ V S R 5 3 8 2 2 H T X 1 _ V S
O U T 1 _ H S R 5 3 9 2 2 H T X 1 _ H S
R 5 4 0 2 2
H R X _ D E O U T 1 _ D E H T X 1 _ D E
H R X _ Y [ 6 ]
H R X _ C [ 7 ]
H R X _ V S DIGITAL (1)
H R X _ H S
S h e e t 3 : F P G A
I C / C B / X L : 4 5 - 5 9
S W : 4 5 - 5 9
O H T E R : 4 5 0 - 5 9 9
1 V
OUT
Pin No. Symbol Description
1 V Output Pin
OUT
2 GND Ground Pin
2 GND
3 CE Chip Enable Pin ("H" Active)
4 V Input Pin
DD
L M N
RX-V681/RX-A760
IC53: A3V56S40GTP
8-bit Synchronous DRAM
DQ0-7
I/O Buffer
Memory Array Memory Array Memory Array Memory Array
8192x 1024x8 8192x 1024x8 8192x 1024x8 8192x 1024x8
Cell Array Cell Array Cell Array Cell Array
Bank #0 Bank #1 Bank #2 Bank #3
Mode
Register
Control Circuitry
Address Buffer Control Signal Buffer
Clock Buffer
A0-12 BA0.1 CLK CKE /CS /RAS /CAS /WE DQM
to DIGITAL 1/7
113