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Segger J-Link-OB-STM32F072-128KB User Manual

Cortex-m, onboard debug probe based on stm32f072cx mcu
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J-Link-OB-
STM32F072-128KB
(Cortex-M)
User guide of the onboard debug
probe based on STM32F072Cx MCU
Document: UM08029
Revision: 1
Date: January 18, 2018
A product of SEGGER Microcontroller GmbH
www.segger.com

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Summary of Contents for Segger J-Link-OB-STM32F072-128KB

  • Page 1 J-Link-OB- STM32F072-128KB (Cortex-M) User guide of the onboard debug probe based on STM32F072Cx MCU Document: UM08029 Revision: 1 Date: January 18, 2018 A product of SEGGER Microcontroller GmbH www.segger.com...
  • Page 2 While the information herein is assumed to be accurate, SEGGER Microcontroller GmbH (SEG- GER) assumes no responsibility for any errors or omissions. SEGGER makes and you receive no warranties or conditions, express, implied, statutory or in any communication with you. SEGGER specifically disclaims any implied warranty of merchantability or fitness for a particular purpose.
  • Page 3 Contact us for further information on topics that are not yet documented. Print date: January 18, 2018 Manual Revision Date Description version Initial Version 0.00 171012 J-Link-OB-STM32F072-128KB-Cortex-M User Guide © 2004-2017 SEGGER Microcontroller GmbH (UM08029)
  • Page 4 J-Link-OB-STM32F072-128KB-Cortex-M User Guide © 2004-2017 SEGGER Microcontroller GmbH (UM08029)
  • Page 5 Sample Comments in program examples. Sample comment Reference to chapters, sections, tables and figures or other doc- Reference uments. GUIElement Buttons, dialog boxes, menu names, menu commands. Emphasis Very important sections. J-Link-OB-STM32F072-128KB-Cortex-M User Guide © 2004-2017 SEGGER Microcontroller GmbH (UM08029)
  • Page 6 J-Link-OB-STM32F072-128KB-Cortex-M User Guide © 2004-2017 SEGGER Microcontroller GmbH (UM08029)

  • Page 7: Table Of Contents

    Supported target CPU cores ..................9 Supported target interfaces ..................10 Target interface pins ..................11 Target interface SWD ..................12 Target interface VCOM .................. 13 Compatible MCUs as J-Link OB host .................14 Schematics ........................15 Glossary ........................16 J-Link-OB-STM32F072-128KB-Cortex-M User Guide © 2004-2017 SEGGER Microcontroller GmbH (UM08029)

  • Page 8: Why J-Link Ob

    J-Links and can be used with the same utilities (as far as the feature set of the J-Link OB supports this) Note It is not allowed to use J-Link-OB-STM32F072-128KB (Cortex-M) for stand-alone em- ulators. J-Link-OB-STM32F072-128KB-Cortex-M User Guide ©...

  • Page 9: Supported Target Cpu Cores

    Chapter 2 Supported target CPU cores For a list of cores supported by this J-Link OB model, please refer to here: J-Link OB Model overview J-Link-OB-STM32F072-128KB-Cortex-M User Guide © 2004-2017 SEGGER Microcontroller GmbH (UM08029)

  • Page 10: Supported Target Interfaces

    Chapter 3 Supported target interfaces The J-Link-OB-STM32F072-128KB (Cortex-M) supports the following target interfaces: • SWD (+ SWO) It may only be used with Cortex-M target CPUs. J-Link-OB-STM32F072-128KB-Cortex-M User Guide © 2004-2017 SEGGER Microcontroller GmbH (UM08029)

  • Page 11: Target Interface Pins

    CHAPTER 3 Target interface pins Target interface pins The J-Link-OB-STM32F072-128KB (Cortex-M) provides the following target interface sig- nals: • #RESET (PA1 / Pin 11) • SWCLK (PA2 / Pin 12) • SWO (PA3 / Pin 13) • SWDIO (PA4 / Pin 14) •...

  • Page 12: Target Interface Swd

    SWDIO (PA4 / Pin 14) If SWO support is not required (e.g. when the target CPU is Cortex-M0/M0+ based, which does not provide SWO support), the SWO signal can be left open. J-Link-OB-STM32F072-128KB-Cortex-M User Guide © 2004-2017 SEGGER Microcontroller GmbH (UM08029)

  • Page 13: Target Interface Vcom

    RXD (PA10 / Pin 31) • CTS (PA7 / Pin 17) • RTS (PA6 / Pin 16) If hardware flow control support is not required, the CTS and RTS signal can be left open. J-Link-OB-STM32F072-128KB-Cortex-M User Guide © 2004-2017 SEGGER Microcontroller GmbH (UM08029)

  • Page 14: Compatible Mcus As J-Link Ob Host

    Chapter 4 Compatible MCUs as J-Link OB host The J-Link-OB-STM32F072-128KB (Cortex-M) is based on the ST STM32 F072C 48 MHz, 128 KB flash, 16 KB RAM series MCUs. The following microcontrollers are compatible to this J-Link OB model: • ST STM32F072CB LQFP 48 •...

  • Page 15: Schematics

    PF0/OSC_IN PC13 J-Link OB Programming Pads PF1/OSC_OUT OSC32_IN/PC14 OSC32_OUT/PC15 For programming of OB no connector is required. Programming is performed using BOOT0 the "J-Link 6 Pin Adapter" from SEGGER. #RESET_OB NRST History / Changes SWDIO_OB VCC3V3 VTref SWDIO VCC3V3 VBAT Rev.

  • Page 16: Glossary

    Chapter 6 Glossary This chapter describes important terms used throughout this manual. J-Link-OB-STM32F072-128KB-Cortex-M User Guide © 2004-2017 SEGGER Microcontroller GmbH (UM08029)
  • Page 17 The electronic signal which times data on the SWDIO data line used in serial wire debug mode. The SWCLK pin is typically the TCK pin used as JTAG clock input, when JTAG is also supported by the device. J-Link-OB-STM32F072-128KB-Cortex-M User Guide © 2004-2017 SEGGER Microcontroller GmbH (UM08029)
  • Page 18 OB-STM32F072-128KB (Cortex-M) is able to receive the data in asynchronous mode when SWO of the target CPU is connected to the SWOin signal of J-Link-OB-STM32F072-128KB (Cortex-M). Normally the SWO output signal of a Cortex-M CPU is directed via the TDO signal pin, but may be separated on some devices.

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