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PADAUK PDK3S-I-002 User Manual

Multi-core emulator
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PDK3S-I-002/003
Multi-Core Emulator
User Manual
Version 0.02 – Nov. 13, 2018
Copyright
2018 by PADAUK Technology Co., Ltd., all rights reserved.
6F-6, No.1, Sec. 3, Gongdao 5th Rd., Hsinchu City 30069, Taiwan, R.O.C.
TEL: 886-3-572-8688  www.padauk.com.tw

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Summary of Contents for PADAUK PDK3S-I-002

  • Page 1 PDK3S-I-002/003 Multi-Core Emulator User Manual Version 0.02 – Nov. 13, 2018  Copyright 2018 by PADAUK Technology Co., Ltd., all rights reserved. 6F-6, No.1, Sec. 3, Gongdao 5th Rd., Hsinchu City 30069, Taiwan, R.O.C. TEL: 886-3-572-8688  www.padauk.com.tw...
  • Page 2 User Manual IMPORTANT NOTICE PADAUK Technology reserves the right to make changes to its products or to terminate production of its products at any time without notice. Customers are strongly recommended to contact PADAUK Technology for the latest information and verify whether the information is correct and complete before placing orders.

  • Page 3: Table Of Contents

    1.6. PDK3S-I-00x simulation power setting ....................8 1.7. Simulation compatibility......................... 9 1.8. Simulator troubleshooting ........................10 2. PDK3S-I-002 Standard multi-core emulator ..............11 2.1. Introduction of PDK3S-I-002 emulator ....................11 2.2. Appearance of PDK3S-I-002 ......................11 2.3. Description for PDK3S-I-002 appearance ..................12 3.
  • Page 4 2. Amend section 1.3 3. Amend section 1.5 0.02 2018/11/13 4. Amend section 1.7 5. Amend section 2.3 6. Amend section 3.1 7. Amend section 3.3 ©Copyright 2018, PADAUK Technology Co. Ltd PDK-UM-3S-I-002/003_EN_V002 –Nov. 13, 2018 Page 4 of 25...

  • Page 5: Pdk3S-I-00X Emulator

    PDK3S-I-002/003 User Manual 1. PDK3S-I-00x emulator 1.1. Foreword PADAUK Technology launch the simulation tools of PDK3S-I-00x emulator to support multi-core parallel processing IC simulation. PDK3S-I-00x emulator should be combined with IDE software which is also produced by PADAUK Technology for normal simulation.

  • Page 6: Downloading And Using Fppa Ide Software

     P ower adapter * 1 Fig.2: Accessories in PDK3S-I-003 1.4. Downloading and using FPPA IDE software The PDK3S-I-00x application software FPPA IDE can be downloaded from the following PADAUK Technology website: http://www.padauk.com.tw/tw/technical/index.aspx?kind=13 When the PDK3S-I-00x application software FPPA IDE has been downloaded, Please unzip it and install it in the computer.

  • Page 7: Notes For Using Pdk3S-I-00X

    ICE calculation. Therefore, the value of checksum is subject to the actual IC, and the checksum data calculated by the emulator is only for reference. ©Copyright 2018, PADAUK Technology Co. Ltd PDK-UM-3S-I-002/003_EN_V002 –Nov. 13, 2018 Page 7 of 25...

  • Page 8: Pdk3S-I-00X Simulation Power Setting

    When the IDE detects a new ICE connection, the ICE power switch can be controlled in the way of the following picture shows: Fig.4: ICE simulation power setup menu ©Copyright 2018, PADAUK Technology Co. Ltd PDK-UM-3S-I-002/003_EN_V002 –Nov. 13, 2018 Page 8 of 25...

  • Page 9: Simulation Compatibility

    // IHRC/64 + En_ILRC; STOPSYS / STOPEXE; In addition, STOPxxx will have no function when ICE executes to the STOPSYS/STOPEXE instruction in a single step mode. ©Copyright 2018, PADAUK Technology Co. Ltd PDK-UM-3S-I-002/003_EN_V002 –Nov. 13, 2018 Page 9 of 25...

  • Page 10: Simulator Troubleshooting

    Whether the operating power of ICE is too low but SYSCLK is too fast. Whether the IO pin has negative voltage or higher than VDD voltage input. ©Copyright 2018, PADAUK Technology Co. Ltd PDK-UM-3S-I-002/003_EN_V002 –Nov. 13, 2018 Page 10 of 25...

  • Page 11: Pdk3S-I-002 Standard Multi-Core Emulator

    ICE internal damage due to abnormal external connection. The PDK3S-I-002 must be powered through a DC9V power adapter and connected to computer via a USB cable for simulation.

  • Page 12: Description For Pdk3S-I-002 Appearance

    PDK3S-I-002/003 User Manual 2.3. Description for PDK3S-I-002 appearance Fig.6: Connection instructions of PDK3S-I-002 parts ©Copyright 2018, PADAUK Technology Co. Ltd PDK-UM-3S-I-002/003_EN_V002 –Nov. 13, 2018 Page 12 of 25...
  • Page 13 When the external crystal oscillator is used in the simulation Chip, the external capacitances are connected to this two interface (C5 & C6). Fig.7: External Crystal, capacitor: Y2, C5 & C6 ©Copyright 2018, PADAUK Technology Co. Ltd PDK-UM-3S-I-002/003_EN_V002 –Nov. 13, 2018 Page 13 of 25...
  • Page 14 CN2 is a common connection pin of 3Pin, which is powered by ICE (0V) output interface (external common ground interface). The text is marked as GND. Fig.10: CN2 schematic diagram ©Copyright 2018, PADAUK Technology Co. Ltd PDK-UM-3S-I-002/003_EN_V002 –Nov. 13, 2018 Page 14 of 25...
  • Page 15 Schematic diagram of CN7 (13) Simulation IO output flat cable interface (CN8) : CN8 is P232CS14/CD14 simulation IO output flat cable interface. Fig.12: Schematic diagram of CN8 ©Copyright 2018, PADAUK Technology Co. Ltd PDK-UM-3S-I-002/003_EN_V002 –Nov. 13, 2018 Page 15 of 25...
  • Page 16 Schematic diagram of CN9 (15) IO output flat cable interface (CN10) : CN9 is P234CS24/CK24, P234CS20/CSS20/CD20, and P234CS18/CD18 simulation IO output flat cable interface. Fig.14: Schematic diagram of CN10 ©Copyright 2018, PADAUK Technology Co. Ltd PDK-UM-3S-I-002/003_EN_V002 –Nov. 13, 2018 Page 16 of 25...
  • Page 17 Simulation IO output flat cable interface (CN17) : CN17 82C15, 82C12/82C16, 22C12A/P211CS16, P211CS14/CD14, PMC271(SOP8), PMC271(SOP16/SSOP16), PMC271(SOP14) simulation IO output flat cable interface. Fig.16: Schematic diagram of CN17 ©Copyright 2018, PADAUK Technology Co. Ltd PDK-UM-3S-I-002/003_EN_V002 –Nov. 13, 2018 Page 17 of 25...

  • Page 18: Pdk3S-I-003 Standard Multi-Core Emulator

    3. PDK3S-I-003 Standard multi-core emulator 3.1. Introduction of PDK3S-I-003 emulator PDK3S-I-003 is the third generation standard multi-core emulator produced by PADAUK Technology. As the standard multi-core emulator, PDK3S-I-003 is built with a variety of protective circuits (output ver-current detection, negative voltage detection, over-voltage detection, output voltage abnormality detection and circuit disconnection protection) to detect ICE internal damage due to abnormal external connection.

  • Page 19: Description For Pdk3S-I-003 Appearance

    PDK3S-I-002/003 User Manual 3.3. Description for PDK3S-I-003 appearance Connection instructions of parts Fig.18: PDK3S-I-003 ©Copyright 2018, PADAUK Technology Co. Ltd PDK-UM-3S-I-002/003_EN_V002 –Nov. 13, 2018 Page 19 of 25...
  • Page 20 When the dropout voltage between ICE internal output power and external input power is too large, this LED will be on. Please check the external signal. ©Copyright 2018, PADAUK Technology Co. Ltd PDK-UM-3S-I-002/003_EN_V002 –Nov. 13, 2018 Page 20 of 25...
  • Page 21 There is a built-in test button (SW1) on the PDK3S-I-003 board, which is convenient for users to do simple test verification. SW1 connects to PA0. Fig.20: schematic diagram of SW1 ©Copyright 2018, PADAUK Technology Co. Ltd PDK-UM-3S-I-002/003_EN_V002 –Nov. 13, 2018 Page 21 of 25...
  • Page 22 CN6 and CN7 are 6Pin and 3Pin common connection pin, which are powered by ICE (0V) output interface (external common ground interface). The text is marked as EGND. Fig.22: schematic diagram of CN6, CN7 ©Copyright 2018, PADAUK Technology Co. Ltd PDK-UM-3S-I-002/003_EN_V002 –Nov. 13, 2018 Page 22 of 25...
  • Page 23 J2 and J5 are PA IO output interfaces in simulation, including PA0~PA7 interfaces. J2 is the connection pin, and J5 is reserved for user to perform signal measurement. Fig.24: schematic diagram of J2, J5 ©Copyright 2018, PADAUK Technology Co. Ltd PDK-UM-3S-I-002/003_EN_V002 –Nov. 13, 2018 Page 23 of 25...
  • Page 24 J4 and J7 are PC IO output interfaces in simulation, including PC0~PC7 interfaces. J4 is the connection pin, and J7 is reserved for user to perform signal measurement. Fig.26: schematic diagram of J4, J7 ©Copyright 2018, PADAUK Technology Co. Ltd PDK-UM-3S-I-002/003_EN_V002 –Nov. 13, 2018 Page 24 of 25...
  • Page 25 J9 and J11 are PE IO output interfaces in simulation, including PE0~PE7 interfaces. J9 is the connection pin, and J11 is reserved for user to perform signal measurement. Fig.28: schematic diagram of J9, J11 ©Copyright 2018, PADAUK Technology Co. Ltd PDK-UM-3S-I-002/003_EN_V002 –Nov. 13, 2018 Page 25 of 25...

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