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TS-7558
R24
3.3V
POR
226 1%
U5
R39
2
WD_RESET#
VCC
510
1
RESET#
C72
3
.1 uF
GND
ST1001S-2.9V
OD Out put
R26
680K
FPGA_25MHZ
U9
6
1
5
2
VCC
GND
3.3V
4
3
SD_POWER#
DUAL04
C44
SN74LVC2G04DCKR
.1 uF
USB_HOST0_DP
USB_HOST0_DM
USB_HOST1_DP
USB_HOST1_DM
R38
510
R45
12.0K
CPU_UART_TXD
CPU_UART_RXD
GPIO_A28
GPIO_A29
SPI_CLK
SPI_MOSI
SPI_MISO
SCL
SDA
INT28
GPIO_A0
GPIO_A1
JTAG_CLK
GPIO_A3
GPIO_A15
GPIO_A16
GPIO_A17
GPIO_A22
GPIO_A23
JTAG_DOUT
CONTROL_25
Re s e t
La t ch
C43
1.2V
.1 uF
3.3V
32KHZ
U3
3
5
CPU_CLKOUT
D
VCC
1
4
CLK
Q
UN-RESET
6
2
CLR#
GND
CPU_TCK
74LVC1G175
LOW_VOLT#
JTAG_TMS
JTAG_DIN
R76
1.00K
R27
680K
C103
Y2
10 nF
XTAL-HC49
25MHz
C37
C38
15 pF
15 pF
EN_SD_POWER
U6
2
VDD_33
11
39
USB0_DP
VDD_33
12
103
USB0_DM
VDD_33
19
USB1_DP
128
VCCA_U2O_33
18
USB1_DM
123
DEV_AN_33
33
VDD_AN_POW_33
16
13
HOST_USB_RES
VDD_HOST_AN33
23
VDD_AN_ETH33
29
VDD_AN_ETH33
127
DEV_USB_DP
64
VDD_RAM_25
126
DEV_USB_DM
75
VDD_RAM_25
15
HOST_PLL_18
125
DEV_USB_RES
38
SYS_PLL_18
20
VDD_CORE_18
32
107
VDD_CORE_18
UART_TXD0
47
VDD_CORE_18
108
UART_RXD0
Re s . PU
82
VDD_CORE_18
98
VDD_CORE_18
109
118
VDD_CORE_18
SPI_CS0#
GPIO_A28
121
VDD_CORE_18
119
SPI_CS1#
GPIO_A29
117
SPI_CLK
GPIO_A27
27
RX+
116
SPI_MOSI
28
RX-
115
SPI_MISO
GPIO_A26
24
TX+
25
TX-
7
SCL/ GPIO_A14
R33
6
22
SDA/ GPIO_A13
REF_RES
11.5K
5
INT28/ USB_INT
74
DATA_00
RAM_D0
111
73
DATA_01
INT29/ GPIO_A0
RAM_D1
72
112
RAM_D2
DATA_02
INT30/ GPIO_A1
71
DATA_03
RAM_D3
70
DATA_04
113
RAM_D4
UART0/ GPIO_A2
69
DATA_05
RAM_D5
68
DATA_06
114
RAM_D6
I2SDR/ GPIO_A3
67
DATA_07
RAM_D7
8
I2SSD/ GPIO_A15
63
DATA_08
9
RAM_D8
I2SWS/ GPIO_A16
62
DATA_09
RAM_D9
10
I2SCK/ GPIO_A17
61
DATA_10
RAM_D10
60
DATA_11
RAM_D11
59
43
DATA_12
RAM_D12
LED0/ GPIO_A22
58
DATA_13
RAM_D13
44
LED1/ GPIO_A23
57
DATA_14
RAM_D14
45
56
DATA_15
LED2/ GPIO_A24
RAM_D15
95
ADD_00
RAM_ADD0
35
94
V25_CONTROL
ADD_01
RAM_ADD1
36
93
ADD_02
V18_CONTROL
RAM_ADD2
92
ADD_03
RAM_ADD3
34
91
ADD_04
V125_CONTROL
RAM_ADD4
90
ADD_05
66
RAM_ADD5
REF_IN_1.25V
89
ADD_06
RAM_ADD6
88
ADD_07
RAM_ADD7
87
ADD_08
RAM_ADD8
31
CLK_32768KHZ
86
ADD_09
RAM_ADD9
85
ADD_10
RAM_ADD10
120
CLK_OUT
84
ADD_11
RAM_ADD11
83
ADD_12
RAM_ADD12
106
SYS_RESET#
80
RAM_WR#
RAM_WR#
104
JTAG_TCK
78
RAM_RAS#
RAM_RAS#
101
JTAG_TMS
79
RAM_CAS#
RAM_CAS#
105
JTAG_DIN
50
RAM_CS#
RAM_CS#
100
JTAG_DO
51
RAM_CKE
RAM_CKE
99
JTAG_RST#
52
RAM_CLK#
RAM_CLK#
53
RAM_CLK
RAM_CLK
41
77
RAM_BA0
XTAL_25_OUT
RAM_BA0
76
RAM_BA1
RAM_BA1
42
XTAL_25_IN
55
RAM_DM0
RAM_DM0
30
54
NC
RAM_DM1
RAM_DM1
122
VFS_PGM
49
STAR_8132
RAM_QS0
RAM_QS0
4
48
TEST_MODE_EN
RAM_QS1
RAM_QS1
3.3V
FB8
3.3V
C77
C78
.1 uF
.1 uF
ETH_3.3V
C75
C76
2.5V
.1 uF
.1 uF
1.8V
10/ 100 Et he rne t
R105
100
R104
100
ETH_LEFT_LED#
226 1%
DATA_[00: 15]
ETH_RIGHT_LED#
Le ft LED
Link / Act ivit y
ADD_[00: 12]
Te chnologic Sys t e ms
Tit le :
TS-7558
Re v:
A
ETH
4
RX+
5
RX-
C97
6
RX_CT
17
ALIGN
.1 uF
18
ALIGN
C105
3
TX_CT
7
POE_RX
POE_RX
10 nF
8
POE_TX
POE_TX
1
TX+
2
TX-
9
POE_45
POE_45
10
POE_78
POE_78
11
LLED+
R20
Gre e n
12
LLED-
15
SHD
16
SHD
13
RLED+
3.3V
Ye llow
14
RLED-
R19
RJ_POE_4602
226 1%
EC-MJKF4602-PA08
R81
0.0
(Gre e n)
FRAME
R85
0.0
Ma y 20, 2011
Da t e
CPU, Et he rne t , POR
De s igne r
She e t
1
of
12

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Summary of Contents for Technologic Systems TS-7558

  • Page 1 3.3V TS-7558 VDD_33 3.3V USB_HOST0_DP USB0_DP VDD_33 USB_HOST0_DM USB0_DM VDD_33 .1 uF .1 uF USB_HOST1_DP USB1_DP VCCA_U2O_33 USB1_DM USB_HOST1_DM DEV_AN_33 VDD_AN_POW_33 HOST_USB_RES VDD_HOST_AN33 VDD_AN_ETH33 ETH_3.3V VDD_AN_ETH33 DEV_USB_DP VDD_RAM_25 2.5V .1 uF .1 uF DEV_USB_DM VDD_RAM_25 HOST_PLL_18 DEV_USB_RES SYS_PLL_18 12.0K 1.8V...
  • Page 2 TS-7552 Gre e n Re d JTAG_TMS JTAG_TMS TS-7553 DUAL_RTA_LED TS-7554 TS-7558 226 1% TS-4500 7552 a nd 7553 FPGA pin 93 = MISO 226 1% RN2-A Se t CONFIG_MODE t o NONE 4.7K Pa ge 37 of Da t a She e t (Hot Socke t ing)
  • Page 3 XOUT M41T00S 12 pF XTAL_SMT_8X3 1.00K Te chnologic Sys t e ms Da t e Ma y 20, 2011 Tit le : TS-7558 RAM, RTC, Fla s h, SD ca rd Re v: De s igne r She e t...
  • Page 4 10 nF AGND 10 uF FAN2002 DFN pa cka ge 11.0K Te chnologic Sys t e ms Ma y 20, 2011 Da t e Tit le : TS-7558 Powe r Supplie s Re v: De s igne r She e t...
  • Page 5 10 uF LM25085MY 3.3 nF 6.3V 6.3V C157 .1 uF 3.24K Te chnologic Sys t e ms Da t e : Ma y 20, 2011 Tit le : TS-7558 5V Powe r Re v: De s igne r She e t...
  • Page 6 3.24K 3.24K 26V cla mp NUP2105L C104 10 nF Te chnologic Sys t e ms Da t e Ma y 20, 2011 TS-7558 COM port , CAN, RS-485 Tit le : Re v: De s igne r She e t...
  • Page 7 U24 is not popula t e d Te chnologic Sys t e ms Da t e Ma y 20, 2011 FRAME 3.3V Tit le : TS-7558 USB, Te mp Se ns or Re v: De s igne r She e t...
  • Page 8 OUT_N2 SINK_4# OUT_N4 Te chnologic Sys t e ms Da t e Ma y 20, 2011 TS-7558 Is ola t e d Digit a l Out put s Tit le : Re v: De s igne r She e t...
  • Page 9 R157 IN_N3 IN_N6 Te chnologic Sys t e ms Da t e : Ma y 20, 2011 Tit le : TS-7558 Is ola t e d Digit a l Input s Re v: De s igne r She e t...
  • Page 10 3.24K 3.24K CL_CH1_EN CL_CH3_EN ADC_CLK ADC_CS# CL_CH2_EN CL_CH4_EN 4.75K 4.75K DUAL_NCHAN DUAL_NCHAN Te chnologic Sys t e ms Da t e : Ma y 20, 2011 TS-7558 ADC Tit le : Re v: De s igne r She e t...
  • Page 11: Bot T Om Row

    OUT_P1 OUT_N3 OUT_N1 OUT_P4 OUT_P2 Right Right OUT_N4 OUT_N2 Te chnologic Sys t e ms Da t e Ma y 20, 2011 Tit le : TS-7558 Scre w Te rmina ls Re v: De s igne r She e t...
  • Page 12 Re ct ifie rs Nomina l 48VDC IN POE_RX POE_TX RECT_FW1A POE_+ POE_45 POE_- Te chnologic Sys t e ms POE_78 Da t e Ma y 20, 2011 RECT_FW1A Tit le : TS-7558 Re v: De s igne r She e t...