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Data Translation DT9840 Series User Manual

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UM-19197-T
DT9840 Series
User's Manual

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Summary of Contents for Data Translation DT9840 Series

  • Page 1 Title Page UM-19197-T DT9840 Series User’s Manual...
  • Page 2 Information furnished by Data Translation, Inc. is believed to be accurate and reliable; however, no responsibility is assumed by Data Translation, Inc. for its use; nor for any infringements of patents or other rights of third parties which may result from its use.
  • Page 3 Changes or modifications to this equipment not expressly approved by Data Translation could void your authority to operate the equipment under Part 15 of the FCC Rules.

  • Page 5: Table Of Contents

    Table of Contents Table of Contents About this Manual ............9 Intended Audience.
  • Page 6 Contents Analog Output Features ............26 Analog Output Channels .
  • Page 7 Contents Counter/Timer Subsystem ........... . . 62 Counter/Timer Operation Modes .
  • Page 8 Contents DT9841E Module ............109 Connector J1 Pin Assignments .

  • Page 9: About This Manual

    This manual describes the hardware features of the DT9840 Series modules. Intended Audience This document is intended for engineers, scientists, technicians, or others responsible for using and/or programming the DT9840 Series modules for data acquisition operations in the ® ®...

  • Page 10: Related Information

    • DT9840 Series DSP Library User’s Manual (UM-19591). This manual, included on the DT9840 Series Software CD, describes how to write a DSP program for the DT9840 Series modules. • DT9840 Series Host Communication Library User’s Manual (UM-19593). This manual,...

  • Page 11: Chapter 1: Principles Of Operation

    Principles of Operation System Features ............. . Analog Input Features .
  • Page 12 Texas Instruments, including Code Composer Studio. Data Translation provides a library of DSP functions that you can use within a standard Code Composer program to access the functionality of the DT9840 Series modules, as well a library of communication functions that you can use to communicate between a DT9840 Series module and a Windows-based host program.
  • Page 13 The DT9841E features 2, 24-bit A/Ds and 2, 24-bit DACs. on the DT9842/2 and DT9842/8. The DT9842/2 features 8, 16-bit A/Ds and 2, 16-bit DACs. The DT9842/8 features 8, 16-bit A/Ds and 8, 16-bit DACs. Figure 1: Block Diagram of the DT9840 Series Modules...

  • Page 14: System Features

    DSP program to run automatically each time the DT9840 Series module is powered on, autonomously from the PC. If desired, you can also copy a user data fie into flash memory using the DT9840 Series Flash Download Utility. By copying a user data into flash, you can ensure that valuable information, such as configuration information or collected data, persists across power cycles, even if the DT9840 Series module loses power or is turned off.

  • Page 15: Internal Clock

    20 kHz signal, specify a sampling frequency of at least 40 kHz to avoid aliasing. The actual frequency that the module can achieve may be slightly different than the frequency you specified due to the accuracy of the clock (0.01% for the DT9840 Series). You can determine the actual clock frequency using software.

  • Page 16: External Clock

    External Clock An external clock is useful when you want to pace acquisitions at rates not available with the internal sample clock or when you want to synchronize a DT9840 Series module with other devices in your system. For the DT9841E module, connect the external clock to pin 23 of connector J1. For all other modules, connect the external clock to the Ext Clk BNC input on the module.

  • Page 17: Operation Modes

    16-bits of this 32-bit value correspond to the digital inputs of port 0 and port 1. On all other DT9840 Series modules, the least significant 24-bits of this 32-bit value correspond to the digital inputs of port 0, port 1 and port 2.

  • Page 18: Multiple-Scan Input Operations

    Use software to perform a multiple-scan input operation. When it detects a trigger event, the DT9840 Series module acquires a specified number of input scan records, and then stops. An input scan record is acquired on each pulse of the sample clock.; refer to...

  • Page 19: Scan Loop Operations

    Principles of Operation Block and list loop operations are very similar in operation. The main difference is that block loop uses only two block buffers, which are automatically allocated and managed, while list loop uses a linked list of as many buffers as you want, but your program must allocate and free each buffer appropriately.

  • Page 20: Triggers

    Refer to page 21 for more information on using the Scalable Bus. When the DT9840 Series module detects the specified trigger event, the input and/or output operation starts at the clock frequency of the specified clock source. Figure 2 illustrates acquisition using an external trigger source. In this example, an input scan record is acquired on each pulse of the selected clock source when the external trigger event occurs.

  • Page 21: Scalable Bus

    The modules connect together using EP342 cables and the 50-pin Scalable Bus connectors (J12 and J13). Refer to the DT9840 Series Getting Started Manual for more information on connecting modules using the Scalable Bus connectors.

  • Page 22: Leds

    • Transfer data and messages from the master to the slave LEDs LED CR6 on the DT9841E module and LED CR1 on the back of all other DT9840 Series modules is a two-color device that indicates the state of the DT9840 Series module. Refer to the DT9840 Series Getting Started Manual for the location of this LED.

  • Page 23: Analog Input Features

    The DT9841E modules support two analog input channels (numbered 0 and 1). All other DT9840 Series modules support eight analog input channels (numbered 0 to 7). All analog input channels are simultaneously clocked. On the DT9841 and DT9841E, these channels are configured as differential inputs;...

  • Page 24: Input Resolution

    DT9842/2 and DT9842/8 modules is fixed at 16-bits. Input Range and Gain All DT9840 Series modules provide an input range of ±10 V and a fixed gain of 1. Data Format The analog input data encoding used by the DT9841, DT9841E, and DT9841-VIB modules is floating point.

  • Page 25: Data Transfer

    FIFO before the next A/D conversion is done. Error Conditions DT9840 Series modules report an overrun error if the data from the previous A/D conversion is not read by the DSP or host computer before a new A/D conversion occurs. The DSP or host computer must clear this error.

  • Page 26: Analog Output Features

    Both DACs power up to a value of 0 V ±10 mV. Resetting the module does not clear the values in the DACs. Refer to the DT9840 Series Getting Started Manual for information on how to wire analog output signals to the module.

  • Page 27: Output Filters

    Principles of Operation Output Filters Note: Output filters are supported on the DT9841, DT9841E, and DT9841-VIB modules only. Each analog output channel on the DT9841, DT9841E, or DT9841-VIB supports a software-selectable four-pole 5 kHz filter or a four-pole 20 kHz filter. Both are Bessel filters and are useful if you want to smooth the analog output values.

  • Page 28: Error Conditions

    Chapter 1 Error Conditions DT9840 Series modules report an analog output underflow error to the host computer if the analog output data is not transferred fast enough (within 10 μs of the fastest clock rate) from the host computer to the module. The host computer must clear this error.

  • Page 29: Digital I/O Features

    +5 V. Interrupt On Change If port 0 is configured for digital input, the DT9840 Series module can generate an interrupt when any of the lines of port 0 changes state. This feature is useful when you want to monitor critical signals or when you want to signal the host computer to transfer data to or from the module.

  • Page 30: Counter/Timer Features

    36 C/T Channels All DT9840 Series modules provide three 32-bit counter/timer channels. The counters are numbered 0, 1, and 2. You select the counter/timer channel to configure using software. Each counter accepts a clock input signal and gate input signal and outputs a clock output...

  • Page 31: External C/T Clock

    Table 2 lists the pin assignments of connector J17 on the module that correspond to the external C/T clock input signals. Table 2: External C/T Clock Signals on the DT9840 Series Modules Counter/Timer Signal J17 Pin Number User Clock Input 0...

  • Page 32: Gate Types

    Table 3 lists the pin assignments of connector J17 on the module that correspond to the external gate input signals. Table 3: External Gate Input Signals on the DT9840 Series Modules Counter/Timer Gate Signal J17 Pin Number External Gate 0...

  • Page 33: Edge Types

    In continuous measure mode, the counter increments from the specified start edge to the next start edge. DT9840 Series modules provide the following edge types: • Rising-edge external gate input – In measure mode, starts or stops the measurement when the signal connected to the external gate input pin goes from low to high (rising edge).

  • Page 34: Pulse Output Parameters

    DT9840 Series modules can output pulses from each counter/timer. Table 4 lists the pin assignments of connector J17 on the module that correspond to the pulse output signals. Table 4: Pulse Output Signals on the DT9840 Series Modules Counter/Timer Pulse Output Signal J17 Pin Number Counter Output 0...

  • Page 35: Period Count

    Principles of Operation Period Count By specifying the period count, you can determine the frequency of the pulse output signal. Note: You can also use the period count in event counting operations to determine the value at which the counter/timer starts counting. The period count defines the initial value that is loaded into the specified counter/timer.

  • Page 36: Counter/Timer Operation Modes

    For example, if the output pulse width is 222.2 ns and the output pulse period is 333.3 ns, then the output duty cycle is .66 (66%). Counter/Timer Operation Modes DT9840 Series modules support the following counter/timer operation modes: • Standard counting (this includes event counting and rate generation) • Measure •...
  • Page 37 Principles of Operation High level enables operation External Low level Gate Input disables operation Signal External C/T Clock Input Signal 3 events are counted while the operation is enabled on the rising edge of the external clock signal Event counting Event counting operation stops operation starts...

  • Page 38: Measure

    Chapter 1 High level enables operation External Low level Gate Input disables operation Signal 18 MHz frequency Internal C/T . . . Clock Input Signal 6.0 MHz frequency 66% duty cycle Pulse Output Rate Generation Rate Generation Signal Operation Starts Operation Stops Figure 6: Example of Rate Generation Mode Measure...

  • Page 39: Continuous Measure

    Principles of Operation Figure 7 shows an example of how to measure the pulse width of a signal. Ensure that the signals are wired appropriately. Refer to the DT9840 Series Getting Started Manual for wiring examples. Falling edge of gate stops...
  • Page 40 0. Figure 7 shows an example of how to measure the frequency of a signal. Ensure that the signals are wired appropriately. Refer to the DT9840 Series Getting Started Manual for wiring examples. Rising edge of gate stops...

  • Page 41: Up/Down Counting

    Figure 5 shows an example of an up/down counting operation. Ensure that the signals are wired appropriately. Refer to the DT9840 Series Getting Started Manual for wiring examples. High level; counter increments Low level;...

  • Page 42: One-Shot

    Chapter 1 One-Shot Use one-shot mode to generate a single pulse output signal from the counter when the operation is enabled by a either an external normal or inverted gate type. Refer to page 32 more information on gate types. You can use this pulse output signal as an external digital (TTL) trigger to start other operations, such as an analog input operation.

  • Page 43: Repetitive One-Shot

    Principles of Operation Repetitive One-Shot Use repetitive one-shot mode to clean up a poor clock input signal by changing its pulse width, and then outputting it. If you specify an external normal or inverted gate type, a single pulse is output each time the gate signal is active.
  • Page 44 Chapter 1...

  • Page 45: Chapter 2: Register Description

    Register Description USB Bus/DSP Hardware Interface ..........Calibration and Setup .
  • Page 46 Chapter 2 This section describes the registers that are used to program the DT9840 Series modules. Note that the following designations are used for the register types: • R = Read • W = Write • R/W = Read and Write...

  • Page 47: Usb Bus/Dsp Hardware Interface

    Communication between the USB and DSP through the isolation barrier uses the 16-bit host port interface of the Texas Instruments TMS320C6713 DSP processor. (Note that a 100 ns delay is required to pass data through the isolators.) Refer to the DT9840 Series DSP Library Reference Manual for more information on programming the DSP.
  • Page 48 Chapter 2 Table 5: Hardware Control and Status Register (Address 0xB0000000) (cont.) Register Description Value Type Indicates whether EXT_INT4 is enabled 1 = Enables EXT_INT4 if counter/timer 1 overflows/ if counter/timer 1 overflows/underflows. underflows. 0 = Disables EXT_INT4 if counter/timer 1 overflows/ underflows.
  • Page 49 Register Description Table 5: Hardware Control and Status Register (Address 0xB0000000) (cont.) Register Description Value Type For the DT9841, DT9841E, and Bit 23 Bit 22 DT9841-VIB, indicates whether D/A 0 = Switches ON the 4-pole, 5 kHz filters for filters or 0 V outputs are used. both D/A outputs 1 = Switches ON the 4-pole, 20 kHz filters for For the DT9842/2 and DT9842/8, these...
  • Page 50 Chapter 2 Table 5: Hardware Control and Status Register (Address 0xB0000000) (cont.) Register Description Value Type Indicates where the clock and trigger 1 = The module receives all A/D and D/A clocks and signals come from. This bit is controlled triggers from the Scalable Bus.

  • Page 51: Calibration And Setup

    Register Description Calibration and Setup The Calibration and Setup register, described in Table 6, is located at address 0xB0000004. Address 0xB0000001 is the control register for the Xicor potentiometers, bias return resistors, and Scalable Bus termination resistors. The register select is CE3, described in Table 15 on page 70, and requires a clock divider of four (40 ns).

  • Page 52: Setting Up The Xicor Potentiometers

    Chapter 2 Table 6: Calibration and Setup Register (Address 0xB0000004) (cont.) Register Description Type Ω Serial clock for the chip that controls the 1 k termination resistors on the A/D inputs (see bits 20 and 26). Data bit for the programmable clock chip (CY data). Clocks the serial port of the CY clock (address 69h).
  • Page 53 Register Description Note: ACK (Acknowledge) and Read Back are not be available on the DT9841, DT9841E, and DT9841-VIB module. To calibrate the module, the potentiometer must be reset by writing the lowest value, and then incrementing it until the correct value is set. After each byte of data is transferred, an ACK low-going signal can be read on the SDA line on the 9th high-going, low SCL signal.

  • Page 54: Calibrating The Analog Input Subsystem

    Chapter 2 Table 8 describes the instruction set for the Xicor potentiometers. Table 8: Xicor Potentiometer Instruction Set Instruction Format Instruction Operation Read WCR Read the contents of the wiper counter register pointed to by P1-P0. Write WCR Write new value to the wiper counter register pointed to by P1-P0.

  • Page 55: Calibrating The Analog Output Subsystem

    Register Description 2. Set the full-scale range by applying +9.37500 V on each channel and adjust the potentiometer on each A/D channel for a code of 2013265664 or 77FFFF00h. To calibrate the A/D converters on the DT9842/2 and DT9842/8, do the following: 1.

  • Page 56: Analog Input Subsystem

    Analog Input Subsystem On the DT9841E, the A/D subsystem consists of two A/D converters that are simultaneously clocked. On all other DT9840 Series modules, the A/D subsystem consists of eight A/D converters that are simultaneously clocked. On the DT9841, DT9841E and DT9841-VIB, the major components of this subsystem are the Delta-Sigma A/D converters and the sample clock oscillator.
  • Page 57 Register Description On the DT9841, DT9841E, and DT9841-VIB, once the A/Ds are started, the serial data is packed as 32 bits in the Spartan chip. The data is left-hand justified (the right 8 bits are filled with zeros) and the data encoding is twos complement. On the DT9842/2 and DT9842/8, once the A/Ds are started, the data is packed as 32 bits in the Spartan chip and the data is left-hand justified (the right 16 bits are filled with zeros, the data encoding is twos complement).
  • Page 58 Chapter 2 Table 10 describes the flags at address 0xB0004020. Table 10: Flags at Address 0xB0004020 Register Description 1 = A D/A trigger occurred. 0 = A D/A trigger did not occur. 1 = An A/D trigger error occurred. 0 = An A/D trigger error did not occur. 1 = An A/D trigger occurred.

  • Page 59: Analog Output Subsystem

    Register Description Analog Output Subsystem The DT9841, DT9841E, and DT9841-VIB support two 24-bit analog output channels. The major components of the analog output subsystem are the DACs, parallel to serial shifter, and the 20 kHz and 5 kHz output filters. The DT9842/2 supports two 16-bit analog output channels and the DT9842/8 supports eight 16-bit analog output channels.
  • Page 60 Chapter 2 Bit 25 of the Hardware and Control Status register described in Table 5 on page 47, is set if the data in the input latch has not been updated on the next D/A clock. This will be 10 μs at the fastest clock rate.

  • Page 61: Digital I/O Subsystem

    51 for more information. All other DT9840 Series modules provide 24 digital I/O signals (ports 0, 1, and 2). You can program each port for input or output using bits 17, 18, and 19 of the Hardware Control and...

  • Page 62: Counter/Timer Subsystem

    Chapter 2 Counter/Timer Subsystem User counter/timers 0, 1, and 2 provide software-selectable clocks, gates, operation modes, and output parameters described in more detail from the register perspective in the following sections. This provides the capability to generate rates, generate one-shots, count events, and determine the signal pulse width, signal period, and the time between two signals.
  • Page 63 Register Description Table 13: User Control Registers (Addresses 0xB000C020, 0xB000C024, 0xB000C028) Register Description Value Type User Clock Select [1:0] Bit 1 Bit 0 These bits specify the clock for the user 0 = Internal 18 MHz Clock counter/timer. These bits resets to 00 on 1 = External Clock power up or Counter/Timer reset.
  • Page 64 Chapter 2 Table 13: User Control Registers (Addresses 0xB000C020, 0xB000C024, 0xB000C028) (cont.) Register Description Value Type Continuous Measure Mode 1 = Enables continuous measure mode. The normal measure mode must also be 0 = Disables continuous measure mode selected to use this feature. A starting edge must be selected for this mode.

  • Page 65: Counter/Timer Operation Modes

    Register Description Table 14: User Status Register (Address 0xB000C030) (cont.) Register Description Value Type User Counter 0 Measure Enable Flag 0 = Measure Disabled This signal indicates whether user counter/timer 0 1 = Measure Enabled is enabled to perform a measurement. This bit This bit is set when the host writes 1 to the resets to 0 on power up or counter/timer reset.
  • Page 66 Chapter 2 • Non-retriggerable one-shot – Non-retriggerable one-shot mode is the same as retriggerable one-shot mode with the following exception: when the counter reaches the terminal count, the module clears the one-shot trigger enable bit. The module ignores subsequent gate signals until the host sets the one-shot trigger enable bit. •...

  • Page 67: Count Sequence

    Register Description Count Sequence The period register contains the initial count for the counter. When the host writes to the period register, the value written is immediately loaded into the counter. When the user counter counts, the counter increments from the initial count to the terminal count. When it reaches the terminal count, the counter is reloaded with the initial count.

  • Page 68: Output Pulse Width And Duty Cycle Equations

    Chapter 2 Output Pulse Width and Duty Cycle Equations The following equations relate to the output pulse width and duty cycle: #clks per output pulse = FFFFFFFFh + 1 – pulse_reg For example, if pulse_reg = FFFFFFFEh, two clocks occur for each output pulse. In this example, the output is active for counts FFFFFFFFh and 0.
  • Page 69 Register Description 5. Select the desired gate in the User Control registers, described in Table 13 on page 6. Issue a one-shot trigger enable command using the User Control registers, described in Table 13 on page The user counter/timer waits for an active gate (trigger) to begin counting. To initialize a counter/timer subsystem for a software triggered one-shot operation, do the following: 1.

  • Page 70: Memory

    Chapter 2 Memory All modules have 128 MBytes of SDRAM starting at address 0x80000000 through 0x81F40000 on the TMS230C6713. Additionally, 2 MB of flash memory starts at 0x90000000 (1 M x 16). This setup information is in the chip support library of Code Composer Studio. Table 15 describes the memory space address map.
  • Page 71 CE2 (20 ns; ECLKIN/2) a. Refer to the DT9840 Series DSP Library User’s Manual for more information on the CDB file. b. For the DT9841-VIB module, bit 0 of digital port 2 is used as the SCL clock, and bit 1 of digital port 2 is used as the SDA data output;...

  • Page 72: Scalable Bus

    Note: The Scalable Bus is not supported by DT9841E modules. Two 50-pin connectors (J12 and J13) on the DT9840 Series module provide a Scalable Bus for connecting modules together. By plugging EP342 cables from one module to another, you can connect up to three "slave"...
  • Page 73 Register Description Table 16: SB Control Register (Address 0xB0014000) (cont.) Register Name Register Description Type FIFO Not Empty 1 = The FIFO on the Scalable Bus is not empty. After the transfer is completed, this bit must be checked to ensure that all the data has been read.
  • Page 74 Chapter 2 Table 17: SB Transfer Control Register (Address 0xB0014004) (cont.) Register Name Register Description Type 27 - Slave Message Address 1 = (Valid only on the master module.) Address of the slave module (0 to 3) to which to send a message. 0 = Send message to all slaves (broadcast).
  • Page 75 Register Description Table 19: SB Write Data Address and Read Data Address Registers Address Register Name Register Description Type 0xA0000000 Write Data Address Bits 0 to 15 contain the data locations for the Scalable Bus. The master module writes to address 0xA000A000 on the selected slave with a 40.0 ns delay between writes (ECLKIN divided by 2 + 2 setup).
  • Page 76 Chapter 2...

  • Page 77: Chapter 3: Calibration

    Calibration Using the DT9841 Calibration Utility ..........Calibrating the Analog Input Subsystem .
  • Page 78 Chapter 3 Use the DT9841 Calibration Utility to calibrate the analog input and analog output circuitry on the DT9841, DT9841E, and DT9841-VIB modules. Note: The DT9841 Calibration Utility is not supported by DT9842/2 and DT9842/8 modules. This chapter describes how to calibrate the analog input and output subsystems of a DT9841, DT9841E, or DT9841-VIB module using the DT9841 Calibration Utility.

  • Page 79: Using The Dt9841 Calibration Utility

    Calibration Using the DT9841 Calibration Utility Note: Ensure that you installed the DT9840 Series software prior to using the DT9841 Calibration Utility. Refer to the DT9840 Series Getting Started Manual for more information on installing the software. Start the DT9841 Calibration Utility as follows: 1.

  • Page 80: Calibrating The Analog Input Subsystem

    Chapter 3 Calibrating the Analog Input Subsystem This section describes how to use the DT9841 Calibration Utility to calibrate the analog input subsystem of a DT9841, DT9841E, or DT9841-VIB module. Connecting a Precision Voltage Source To calibrate the analog input circuitry, you need to connect an external +9.3750 V precision voltage source to the analog input channels of a DT9841, DT9841E, or DT9841-VIB module.

  • Page 81: Using The Manual Calibration Procedure

    Calibration Note: At any time, you can click Restore Factory Settings to reset the A/D calibration values of the selected channels only to their original factory settings. This process will undo any auto or manual calibration settings. Using the Manual Calibration Procedure If you want to manually calibrate the analog input circuitry instead of auto-calibrating it, do the following: 1.

  • Page 82: Calibrating The Analog Output Subsystem

    Chapter 3 Calibrating the Analog Output Subsystem This section describes how to use the DT9841 Calibration Utility to calibrate the analog output subsystem of a DT9841, DT9841E, or DT9841-VIB module. To calibrate the analog output circuitry, you need to connect an external precision voltmeter to the analog output channels of the DT9841, DT9841E, or DT9841-VIB module.

  • Page 83: Appendix A: Specifications

    Specifications Analog Input Specifications ........... . Analog Output Specifications.

  • Page 84: Analog Input Specifications

    Appendix A Analog Input Specifications Table 20 lists the specifications for the analog input subsystem. Table 20: Analog Input Subsystem Specifications DT9841, DT9841E, and DT9841-VIB DT9842/2 and DT9842/8 Feature Specifications Specifications Number of analog inputs 8 single-ended, simultaneously For DT9841: 8 differential, simultaneously sampled and held sampled and held (SSH) (SSH)
  • Page 85 Specifications Table 20: Analog Input Subsystem Specifications (cont.) DT9841, DT9841E, and DT9841-VIB DT9842/2 and DT9842/8 Feature Specifications Specifications Input bias current ±10 nA ±10 nA Common mode voltage ±11 V maximum (operational) ±11 V maximum (operational) Maximum input voltage ±25 V maximum (protection DC) For DT9841 and DT9841E: ±25 V maximum (protection DC) For DT9841-VIB:...
  • Page 86 Appendix A Table 20: Analog Input Subsystem Specifications (cont.) DT9841, DT9841E, and DT9841-VIB DT9842/2 and DT9842/8 Feature Specifications Specifications IEPE Compliance Voltage 24 V – (DT9841-VIB) IEPE Current Source ±1.0% – Accuracy (DT9841-VIB) IEPE Filter (DT9841-VIB) 2-pole, Butterworth 10 kHz (–3 dB) –...

  • Page 87: Analog Output Specifications

    Specifications Analog Output Specifications Table 21 lists the specifications for the analog output subsystem. Table 21: Analog Output Subsystem Specifications DT9841, DT9841E, and DT9841-VIB Feature Specifications DT9842 Specifications Number of analog output channels 2 for DT9842/2 8 for DT9842/8 Resolution 24 bits 16 bits Data encoding...

  • Page 88: Digital Input Specifications

    Appendix A Digital Input Specifications Table 22 lists the specifications for the digital input subsystem. Table 22: Digital Input Subsystem Specifications Feature Specifications Number of lines For DT9841 and DT9841E: Ports 0, 1, and 2 each consisting of 8 programmable digital I/O lines) For DT9841-VIB: Ports 0 and 1 each consisting of 8 programmable...

  • Page 89: Digital Output Specifications

    Specifications Number of lines For DT9841-VIB: Ports 0 and 1 each consisting of 8 programmable digital I/O lines) For all other DT9840 Series modules: Ports 0, 1, and 2 each consisting of 8 programmable digital I/O lines Ω Ω Termination...

  • Page 90: Counter/Timer Specifications

    Appendix A Counter/Timer Specifications Table 24 lists the specifications for the C/T subsystems. Table 24: C/T Subsystem Specifications Feature Specifications Number of counter/timer channels Clock Inputs Ω Input type: HCT with 22 k pull-up to 3.3 V High-level input voltage: 2.4 V minimum Low-level input voltage: 0.8 V maximum...

  • Page 91: External Clock Specifications

    Specifications External Clock Specifications Table 25 lists the specifications for the external clock signal to the DT9840 Series modules. Table 25: External Clock Specifications Feature Specifications Ω Input type HCT Rising-Edge Sensitive with 22 k pull-up resistor High-level input voltage 2.4 V minimum...

  • Page 92: External Trigger Specifications

    Appendix A External Trigger Specifications Table 26 lists the specifications for the external trigger signal to the DT9840 Series modules. Table 26: External Trigger Specifications Feature Specifications Ω Input type HCT Rising-Edge Sensitive with 22 k pull-up resistor High-level input voltage 2.4 V minimum...

  • Page 93: Power, Physical, And Environmental Specifications

    Specifications Power, Physical, and Environmental Specifications Table 27 lists the power, physical, and environmental specifications for the DT9840 Series modules. Table 27: Power, Physical, and Environmental Specifications Feature Specifications Power DT9841-VIB: 4 A maximum (3.3 A typical); (300 mA maximum for IEPE +5 V ±0.25 V:...

  • Page 94: Regulatory Specifications

    Appendix A Regulatory Specifications Table 28 lists the regulatory specifications for the DT9840 Series modules. Table 28: Regulatory Specifications Feature Specifications FCC part 15, class A EN 55022:1994 (based on CISPR-22:1993) EN 50082-1:1998 IEC 801-2:1984: 8 KV air/4 KV contact...

  • Page 95: Connector Specifications

    Specifications Connector Specifications Table 29 lists the specifications for the connectors on the DT9840 Series modules, Sleek Box, EP358E, and EP342 and EP344 cables. Table 29: DT9840 Series Connector Specifications Connector Part Mating Connector Product Connector Number Part Number Sleek Box...
  • Page 96 EP335 cable EP335 cable a. The following fan is recommended for use with connector J2: Sunon model number KDE0505PFB3-8 or Data Translation part number 19372. b. The following power supply is recommended: Total Power International model number TPES49-05060KPP-4P or Data Translation part number 19481 (EP348).

  • Page 97: External Power Supply Specifications

    Specifications External Power Supply Specifications Table 30 lists the specifications for the EP348 +5 V external power supply that is used with the DT9840 Series modules. Table 30: External Power Supply (EP348) Specifications Feature Specifications Type Total Power medical power supply (TPES49-05060KPP-4P)
  • Page 98 Appendix A...

  • Page 99: Appendix B: Connector Pin Assignments

    Connector Pin Assignments DT9841, DT9842/2, and DT9842/8 Modules ........DT9841E Module .

  • Page 100: Dt9841, Dt9842/2, And Dt9842/8 Modules

    • Connector J4 – a 9-pin, D-shell connector provided for attaching an RS-232-compliant device for debugging purposes using the EP354 serial adapter and EP335 cable. Refer to the DT9840 Series Getting Started Manual for connection information and to the DT9840 Series DSP Library User’s Manual for information about the serial debugging functions.

  • Page 101: Connector J2 Pin Assignments

    DT9840 ° Series module exceeds 45 C. If the module exceeds ° C, an interrupt is generated. The following fan is recommended: Sunon model number KDE0505PFB3-8GN or Data Translation part number 19372.

  • Page 102: Connector J3 Pin Assignments

    If you want to access this port for debugging purposes, it is recommended that you use the EP354 serial adapter and EP335 serial cable; refer to the DT9840 Series Getting Started Manual for connection information and to the DT9840 Series DSP Library User’s Manual for information on the serial debugging functions.

  • Page 103: Connector J6 Pin Assignments

    Connector Pin Assignments Connector J6 Pin Assignments Table 34 lists the pin assignments of the USB connector, J6. Table 34: USB Connector (J6) Pin Assignments Signal Name Cable Wire +5V_USB − USB_D White USB_D+ Green AGND1 Black a. This signal is not used; USB connector is type B. Connector J11 Pin Assignments Table 35 lists the pin assignments of the power input connector, J11.

  • Page 104: Connector J12 And J13 Pin Assignments

    Appendix B Connector J12 and J13 Pin Assignments Table 36 lists the pin assignments of the Scalable Bus connectors, J12 and J13. Table 36: Scalable Bus Connectors (J12 and J13) Pin Assignments Signal Description Signal Description SB0_Return SB1_Return SB2_Return SB3_Return SB4_Return SB5_Return SB6_Return...

  • Page 105: Connector J17 Pin Assignments

    Connector Pin Assignments d. These signals are driven soley by the slave module. e. These signals must be low true. Ω f. These signals are pulled up to 10 k on the master module. g. On completion, this signal is driven high before it is tri-stated. Connector J17 Pin Assignments Table 37 lists the pin assignments of the analog output, digital I/O, and counter/timer...

  • Page 106: Connector J18 Pin Assignments

    Appendix B Table 37: Analog Output, Digital I/O, and Counter/Timer Connector (J17) Pin Assignments (cont.) Signal Description Signal Description Digital Input/Output 2, Port 2/Encoder 2 Clr Digital Input/Output 6, Port 2 Digital Input/Output 1, Port 2/Encoder 1 Clr Digital Input/Output 5, Port 2 Digital Input/Output 0, Port 2/Encoder 0 Clr Digital Input/Output 4, Port 2 User Clock Input 0/Encoder A0...

  • Page 107: Connector J19 Pin Assignments

    Connector Pin Assignments Table 38: Analog Input Connector (J18) Pin Assignments (cont.) Signal Description Signal Description Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved...

  • Page 108: Screw Terminal Block Tb1 Assignments

    Appendix B Screw Terminal Block TB1 Assignments Table 40 lists the assignments of the power output screw terminal block, TB1. Table 40: Power Output Screw Terminal Block (TB1) Signal Description +5 V Output @ 1 A Isolated Power Ground a. Fused at 1 A with a poly fuse.

  • Page 109: Dt9841E Module

    EP368 cable, EP354 serial adapter, and EP335 cable. Refer to the DT9840 Series Getting Started Manual for connection information and to the DT9840 Series DSP Library User’s Manual for information about the serial debugging functions.

  • Page 110: Connector J1 Pin Assignments

    DT9841E module exceeds 45° C. If the module exceeds 60° C, an interrupt is generated. The following fan is recommended: Sunon model number KDE0505PFB3-8GN or Data Translation part number 19372. Refer to Table 48 on page 115 for more information on this screw terminal block.

  • Page 111: Connector J2 Pin Assignments

    Connector Pin Assignments Table 41: Analog Output, Digital I/O, Counter/Timer, Ext Trig, Ext Clock Connector (J1) Pin Assignments on the DT9841E (cont.) Signal Description Signal Description Digital Input/Output 0, Port 1 Digital Input/Output 4, Port 1 Digital Input/Output 3, Port 2/TINP1 Digital Input/Output 7, Port 2 Digital Input/Output 2, Port 2/Encoder 2 Clr Digital Input/Output 6, Port 2...
  • Page 112 Appendix B Table 42: Analog Input Connector (J2) Pin Assignments on the DT9841E (cont.) Signal Description Signal Description Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved...

  • Page 113: Connector J3 Pin Assignments

    If you want to access this port for debugging purposes, it is recommended that you use the EP354 serial adapter and EP335 serial cable; refer to the DT9840 Series Getting Started Manual for connection information and to the DT9840 Series DSP Library User’s Manual for information on the serial debugging functions.

  • Page 114: Connector J6 Pin Assignments

    Appendix B Connector J6 Pin Assignments Table 45 lists the pin assignments of the USB connector, J6. Table 45: USB Connector (J6) Pin Assignments on the DT9841E Signal Name Cable Wire +5V_USB − USB_D White USB_D+ Green AGND1 Black a. This signal is not used; USB connector is type B. Connector J11 Pin Assignments Table 46 lists the pin assignments of the power input connector, J11.

  • Page 115: Screw Terminal Block Tb3 Assignments

    These signals are provided for attaching an external +5 VDC, 100 mA fan output signal. The fan will turn on with an onboard ° temperature sensor if the DT9840 Series module exceeds 45 C. If ° the module exceeds 60 C, an interrupt is generated.

  • Page 116: Sleek Box Front Panel

    Appendix B Sleek Box Front Panel The following connectors are provided on the front panel of the Sleek Box: • BNC connectors – BNCs labelled AD Ch0 to AD Ch7 are provided for attaching eight analog input signals. The BNCs are wired on the box to reflect the channel configuration (single-ended or differential) of your module.

  • Page 117: Connector J1 Pin Assignments

    Connector Pin Assignments Connector J1 Pin Assignments Table 49 lists the pin assignments of the analog input/output connector, J1. Table 49: Analog In/Out Connector (J1) Pin Assignments on the Sleek Box J1 Pin J1 Pin Assignment Signal Description Assignment Signal Description Analog Input 00 Analog Input 01 Analog Input 02...

  • Page 118: Connector J2 Pin Assignments

    Appendix B Connector J2 Pin Assignments Table 50 lists the pin assignments of the digital input/output connector, J2. Table 50: Digital In/Out Connector (J2) Pin Assignments on the Sleek Box J2 Pin J2 Pin Assignment Signal Description Assignment Signal Description Digital In/Out 3, Port 0 Digital In/Out 2, Port 0 Digital In/Out 1, Port 0...

  • Page 119: Connector J19 Pin Assignments

    Connector Pin Assignments Connector J19 Pin Assignments Table 51 lists the pin assignments of the counter/timer connector, J19. Table 51: Counter/Timer Connector (J19) Pin Assignments on the Sleek Box J13 Pin J13 Pin Assignment Signal Description Assignment Signal Description User Counter Output 2 User Clock Input 2/Encoder A2 User Counter Output 1 User Clock Input 1/Encoder A1...

  • Page 120: Ep358E Accessory Panel

    Appendix B EP358E Accessory Panel The EP358E accessory panel is provided for DT9841E modules. The following connectors are provided on the front of the EP358E accessory panel: • BNC connectors − BNCs labelled CH0 and CH1 are provided for attaching two differential analog input signals.
  • Page 121 Connector Pin Assignments Table 52: Pin Assignments for Connector J202 on the EP358E Accessory Panel (cont.) Signal Description Signal Description Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Analog Input 01 Analog Input 00 Isolated Power Ground Analog Common Reserved Reserved Reserved...

  • Page 122: Connector J201 Pin Assignments

    Appendix B Connector J201 Pin Assignments Table 53 lists the pin assignments of connector J201. Table 53: Pin Assignments for Connector J201 on the EP358E Accessory Panel Signal Description Signal Description User Counter Output 2 User Clock Input 2/Encoder A2 User Counter Output 1 User Clock Input 1/Encoder A1 User Counter Output 0...
  • Page 123 Connector Pin Assignments Table 53: Pin Assignments for Connector J201 on the EP358E Accessory Panel Signal Description Signal Description Isolated Digital Ground Isolated Digital Ground Reserved Reserved Reserved Reserved Reserved Reserved Analog Output 01 Return Analog Output 00 Return a. Currently, not implemented.
  • Page 124 Appendix B...

  • Page 125: Index

    Index Index address flags back panel of Sleek Box address LEDs BNC connectors addresses analog input aliasing analog output analog I/O connector external clock Sleek Box external trigger analog input BNC connector analog input connector DT9841 calibrating the module DT9841E analog input subsystem DT9842/2 analog output subsystem...
  • Page 126 Index connector J17 pin assignments registers DT9841 specifications DT9842/2 units DT9842/8 counting events connector J18 pin assignments CR1 LED DT9841 CR10 LED DT9842/2 CR11 LED DT9842/8 CR12 LED connector J19 pin assignments CR13 LED connector J2 pin assignments CR14 LED DT9841 CR15 LED DT9841E...
  • Page 127 Index edge-to-edge measurements logic-high level encoding data on (software) analog input analog output environmental specifications Hardware Control and Status register EP358E high-to-low pulse output J201 connector J202 connector equations event counting IEPE features output period/frequency input range output pulse width and duty cycle internal clock errors cascaded counter/timer...
  • Page 128 Index J201 connector pin assignments measuring period J202 connector pin assignments measuring pulse width J3 connector pin assignments memory DT9841 Memory Space Address Map DT9841E module addresses DT9842/2 module specifications DT9842/8 multiple scan operation mode J4 connector pin assignments DT9841 DT9841E Nyquist Theorem DT9842/2...
  • Page 129 Index power input connector resolution DT9841 analog input DT9841E analog output DT9842/2 rising-edge clock input DT9842/8 rising-edge gate type power output connector DT9842/2 DT9842/8 sample clock power output terminal block sample rate DT9841 SB Control register DT9842/2 SB Transfer Control register DT9842/8 SB Transfer Status register power specifications...
  • Page 130 Index environmental external power supply Xicor potentiometers physical addresses and functions power instruction set regulatory setting up subsystem descriptions analog input analog output counter/timer digital I/O system features memory operation modes sample clock Scalable Bus connections triggers TB2 screw terminal block, DT9841E TB3 screw terminal block, DT9841E transferring data analog input...

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