1. Manuals
  2. Brands
  3. Variscite Manuals
  4. Single board computers
  5. VAR-320SBC
  6. Reference manual

Variscite VAR-320SBC Reference Manual

Marvell monahans-p (pxa320) based single-board-computer
Hide thumbs
Table of Contents

Advertisement

Quick Links

Download this manual
V
A
R
-
3
2
V
A
R
-
3
2
M
a
r
v
e
l
l
M
o
n
a
h
a
M
a
r
v
e
l
l
M
o
n
a
h
0
S
B
C
0
S
B
C
n
s
-
P
(
P
X
A
3
2
0
a
n
s
-
P
(
P
X
A
3
2
0
)
b
a
s
e
d
S
i
n
g
l
e
-
)
b
a
s
e
d
S
i
n
g
l
e
-
B
o
a
r
d
-
C
o
m
p
u
t
B
o
a
r
d
-
C
o
m
p
u
t
e
r
e
r

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the VAR-320SBC and is the answer not in the manual?

Questions and answers

Subscribe to Our Youtube Channel

Related Manuals for Variscite VAR-320SBC

Summary of Contents for Variscite VAR-320SBC

  • Page 2: Table Of Contents

                              VAR-320SBC Reference Guide  Table of Contents   1.  Revision History ..............................  4   2.  Overview  .................................  5   2.1.  Basic  ................................  5   2.2.  Features Summary  ............................  6   2.3.  Block Diagram  ...............................  8   3.  Components ................................  9  ...
  • Page 3                           VAR-320SBC Reference Guide  4.9.  Camera Interface ............................21  4.10.  PWM  ................................23  4.11.  Ethernet port ............................23  4.12.  USB ................................24  4.12.1.  USB 1.1 Full speed OTG and Client Controller ..............24  4.12.2.  Universal Serial Bus Host Controller  ..................24  Static Memory interface (Compact Flash, Nand flash, host-bus, SRAM, VLIO) ........25 ...

  • Page 4: Revision History

                              VAR-320SBC Reference Guide  1. Revision History Revision No. Draft Date Remarks 31/Aug/2007 Initial draft 20/Sept/2007 Ethernet controller revised Mechanical change. Smaller form 11/Feb/2008 factor, 6x4cm Copyright © 2008 Variscite  4    ...

  • Page 5: Overview

    The VAR-320SBC serves as a building block and easily integrates into any embedded solution. It includes all vital peripherals/interfaces and is ready to run any embedded operating system such as Linux, WinCE ™...

  • Page 6: Features Summary

                              VAR-320SBC Reference Guide  2.2. Features Summary • Marvell Monahans-P (PXA320) CPU Up to 806 MHZ - 2-D graphic accelerator - 32kb/32kb Inst/ Data L1 cache - 256KB L2 cache - Internal 768kb SRAM • 64-256MB 266MHZ DDR SDRAM • 128Mbytes - 1Gbytes Flash Disk •...
  • Page 7                           VAR-320SBC Reference Guide  • 3 UART ports to interfaces GSM/GPRS modem, Bluetooth, IRDA, Debug port • 10/ 100 Mbit Ethernet controller • General purpose I/O lines. • Audio - HI - FI stereo decoder - Voice CODEC - Mono output for Speaker...

  • Page 8: Block Diagram

                              VAR-320SBC Reference Guide  2.3. Block Diagram Copyright © 2008 Variscite  8    ...

  • Page 9: Components

                              VAR-320SBC Reference Guide  3. Components 3.1. MONAHANS-P CPU 3.1.1. Overview The PXA320 processor is an integrated system-on-a-chip microprocessor for high-performance, low-power portable handheld and handset devices. It incorporates the Intel XScale® micro architecture with on-the-fly voltage and frequency scaling and sophisticated power management to provide industry leading MIPS/mW performance across its wide range of operating frequencies.

  • Page 10: Monahans-P Block Diagram

                              VAR-320SBC Reference Guide  3.1.2. Monahans-P Block Diagram Copyright © 2008 Variscite  10    ...

  • Page 11: Multimedia Co-Processor

                              VAR-320SBC Reference Guide  3.1.3. Multimedia co-processor The core integrates a Multimedia coprocessor to accelerate multimedia applications and 2-D graphics operations. This coprocessor provides a 64-bit single-instruction multiple-data (SIMD) architecture and compatibility with the integer functionality of the Intel® Wireless MMX™ 2 technology and streaming SIMD extensions (SSE) instruction sets.

  • Page 12: Memory

                              VAR-320SBC Reference Guide  3.2. Memory 3.2.1. 266MHZ 32bit DDR SDRAM The VAR-320SBC supports up to 128MB of DDR SDRAM with clock rate of 266 MHz. The DDR SDRAM uses a double-data-rate architecture to achieve high-speed operation. 3.2.2. NAND flash The VAR-320SBC supports NAND flashes up to the size of 8Gbit.

  • Page 13: Connectors To Base Board

                              VAR-320SBC Reference Guide  3.6. Connectors to base board The VAR-320SBC connects to a base board using 2 140 pin Board-to-Board connectors Connector on VAR-320SBC: Manufacturer: Tyco Electronics P/N: 1-353190-0 Description: 0.6mm pitch Board-to-Board connector. 140 pin. Free height type. Mating part to be used on base board:...
  • Page 14                           VAR-320SBC Reference Guide  • Compatible with 4-wire resistive Touch Screens • Power is supplied by a dedicated LDO • Pen-detection and nIRQ generation • Supports several schemes of measurement averaging to filter noise • Maximum X & Y sample rate (without averaging): 5 kHz...

  • Page 15: Ssp Interface

                              VAR-320SBC Reference Guide  4.2. SSP Interface The VAR-320SBC outputs one SSP interface. The SSP controllers support these protocols: Programmable serial protocol (PSP) with programmable frame sync and programmable start and stop delays Texas Instruments Synchronous Serial Protocol* (SSP) Motorola Serial Peripheral Interface* (SPI) protocol Inter-IC Sound (I2S) protocol •...

  • Page 16: Uart Ports

                              VAR-320SBC Reference Guide  4.3. UART Ports The VAR-320SBC outputs 3 UARTs • Full function UART (FFUART) • Bluetooth UART (BTUART) • Standard UART (STUART) Each serial port contains a UART and a slow serial infrared transmit encoder and receive decoder that conform to the IrDA serial infrared specification.1...

  • Page 17: Sd/Mmc Ports

    P1-44 ST UART RXD 4.4. SD/MMC Ports The VAR-320SBC outputs 2 SD/MMC ports. The MultiMediaCard (MMC) and Secure Digital (SD/SDIO) controller (MMC/SD/SDIO controller) provide a software-accessible hardware link between the PXA320 and the MMC stack (a set of memory cards). The MMC/SD/SDIO controller supports Multimedia Card, Secure Digital, and Secure Digital I/O communication protocols.
  • Page 18                           VAR-320SBC Reference Guide  The LCD controller supports these key features: • Support for active or passive single-panel displays of 8, 16, or 18 bpp • Support for LCD panels with internal frame buffer; up to 24 bpp is supported • Support display sizes up to 800x600 pixels.

  • Page 19: Jtag Port

                              VAR-320SBC Reference Guide  4.6. JTAG Port JTAG provides a way of driving and sampling the external pins of the device regardless of the core state, as well as a mechanism for device debug. JTAG logic includes a test-access port (TAP) controller, TAP pins, an instruction register, and Test Data registers (TDRs). The JTAG interface is controlled through five dedicated TAP pins that interface to the TAP controller: TDI, TMS, TCK, nTRST, and TDO.

  • Page 20: 1-Wire

                              VAR-320SBC Reference Guide  4.7. 1-Wire The 1-Wire bus master interface controller is designed to receive and transmit 1-Wire bus data and provides complete control of the 1-Wire bus through eight-bit commands. The 1-Wire bus serial operation uses an open-drain, wired-AND bus structure that allows multiple devices to drive the bus lines and to communicate status on events such as arbitration, wait states, and error conditions.

  • Page 21: Camera Interface

                              VAR-320SBC Reference Guide  4.8. Camera Interface The Quick Capture Interface is intended for use in a PDA or mobile phone product that requires image-capture capability. The PXA320 processor supports a variety of operating modes, data widths, formats, and clocking schemes.
  • Page 22                           VAR-320SBC Reference Guide  – Performs statistics on 8- or 10-bit data – Incrementer saturates to avoid rollovers – Supports up to 64 K pixels, (216) per data value – Can perform statistics on 8-bit or 10-bit data stream with 32-bit result •...

  • Page 23: Pwm

                              VAR-320SBC Reference Guide  4.9. PWM The VAR-320SBC outputs 2 of the 4 PXA320 processor’s pulse-width modulator (PWM) pins. Each can be configured to generate periodic output signals. Configuration of the PWMs is accomplished through software and is described in detail in Marvell® PXA320 Processor Serial Controller Configuration Developers Manual, Vol.

  • Page 24: Usb

                              VAR-320SBC Reference Guide  4.11. 4.11.1. USB 1.1 Full speed OTG and Client Controller The UDC supports 24 endpoints (Endpoint 0 plus 23 programmable endpoints). The UDC is a USB revision 1.1 compliant, full-speed device that operates half-duplex at a baud rate of 12 Mbps (as a slave only, not a host or hub controller).

  • Page 25: Static Memory Interface (Compact Flash, Nand Flash, Host-Bus, Sram, Vlio)

                              VAR-320SBC Reference Guide  Static Memory interface (Compact Flash, Nand flash, host-bus, SRAM, VLIO) Features: • Connection to the DFI. • Interface to SRAM-like devices, Variable Latency I/O (VLIO) devices, various types of XIP flash (including synchronous and asynchronous), and Compact Flash.
  • Page 26                           VAR-320SBC Reference Guide  Data byte enable. BE1_N P2-80 BE1_N corresponds to DF_IO<8:15> LLA_N P2-69 DFIO Lower address latch LUA_N P2-71 DFIO Upper address latch Compact Flash specific: Signal Pin number Type Description GPIO CF_nPIOR P2-83 Card interface I/O space output enable...

  • Page 27: Power

    On switch activates the LP3972 PMIC. EXT_WAKEUP1 P2-40 Wake-up signal from Deep-Sleep VDD_DDR_EXT P1-34,36 DDR 1.8V supply for Deep-sleep BACKUP P2-46,48 Backup battery charger output BATTERY VAR-320SBC single DC-IN supply voltage. 7,19,31,43,55,6 Voltage range: 3.3v – 4.8v 7,79,91,103,11 5,127,139. V_BATT 7,19,31,43,55,6 7,79,91,103,11 5,127. 8,14,26,38,50,6 2,74,86,98,110,...

  • Page 28: Audio

                              VAR-320SBC Reference Guide  4.13. Audio The VAR-320SBC uses the Wolfson WM9705 Audio codec Audio signals: Signal Pin number Type Description CODEC_MONO_OUT P1-47 Loudspeaker mono output for Ext. Amp HP_LOUT P2-82 Headphones, Right. HP_ROUT P2-84 Headphones, Left. CODEC_LINEOUTL P2-32 Codec audio line out L...

  • Page 29: I2C Bus

    The Power I2C interface cannot be used as a general- purpose I2C interface. The Power I2C is used internally by the VAR-320SBC and cannot be used by the user. The standard I2C has a standard bus speed of 100 kbps and a fast-mode operation of 400 kbps.

  • Page 30: Power Supply And Management

    5. Power supply and management 5.1. Power Supply The VAR-320SBC can operate from a single 3.3v - 4.8v DC supply. Voltage supply can be connected directly to a Lio-ion battery, or external regulated DC supply. The single DC supply must be connected to all V_BATT net pins: V_BATT pins: P1 :7,19,31,43,55,67,79,91,103,115,127,139.

  • Page 31: Connectors

                              VAR-320SBC Reference Guide  6. Connectors 6.1. P1 Signal Description Type GPIO TPI_P Ethernet Twisted Pair Receive Positive TPO_P Ethernet Twisted Pair Transmit Positive TPI_N Ethernet Twisted Pair Receive Negative TPO_N Ethernet Twisted Pair Transmit Negative nSPD_100 LED, Activity Indicator nLINK_ACK...
  • Page 32                           VAR-320SBC Reference Guide  V_BATT STD_RXD ST UART RXD FFRI FFUART RI GPIO126 General purpose IO pin CODEC MONO OUT Loudspeaker mono output for external Amplifier GPIO127 General purpose IO pin N.C. N.C. PWR_EN Active-high output, Enables low-voltage core and internal SRAM power supplies.
  • Page 33                           VAR-320SBC Reference Guide  CIF_LV Quick Capture Line Synchronization Signal GPIO105 General purpose IO pin CIF_FV Quick Capture Frame Synchronization Signal GPIO106 General purpose IO pin CIF_DD9 Quick Capture Data Signal GPIO113 General purpose IO pin GPIO114 General purpose IO pin...
  • Page 34                           VAR-320SBC Reference Guide  6.2. P2 Signal Description GPIO Type L_PCLK LCD Pixel clock 16_2 L_FCLK LCD Frame clock 14_2 PWM_0 Pulse-width modulation output signal L_LCLK LCD Line clock 15_2 N.C. V_BATT N.C. L_BIAS LCD AC bias/Data enable 17_2 N.C. L_DD_0 LCD Data line N.C.
  • Page 35                           VAR-320SBC Reference Guide  N.C. V_BATT N.C. L_DD_14 LCD Data line BACKUP BATTERY Backup battery charger output L_DD_15 LCD Data line BACKUP BATTERY Backup battery charger output nXCVREN External transceiver enable, Data flash interface. DF_CLE_NOE Output enable for static memory, muxed with DF CLE.
  • Page 36                           VAR-320SBC Reference Guide  TSMY TSI interface Y Minus V_BATT TSMX TSI interface X Minus DF_IO_0 DFI Data bus TSPY TSI interface Y Plus DF_IO_1 DFI Data bus WL_ACTIVE WLAN activity Bluetooth co-existence output line. DF_IO_2 DFI Data bus nCS_2 Chip select for static memory on the data flash interface.
  • Page 37                           VAR-320SBC Reference Guide  JTAG Test Clock AUD_GND Audio low noise output GND for MIC V_RTC Permanent 2.9v output voltage Copyright © 2008 Variscite  37    ...

  • Page 38: Operational Characteristics

                              VAR-320SBC Reference Guide  7. Operational Characteristics Condition Supply Voltage, V_BATT -0.3V 5.5V Commercial operating temperature range -0°C +65°C Extended operating temperature range -20Ẁ°C +85°C 8. Absolute maximum Characteristics Supply Voltage, V_BATT -0.3V 5.5V Storage temperature range -45°C +165°C Copyright © 2008 Variscite  38  ...

  • Page 39: Mechanical Drawing

                              VAR-320SBC Reference Guide  9. Mechanical drawing • SBC Height including BaseBoard connectors: 9mm Copyright © 2008 Variscite  39    ...

  • Page 40: Legal Notice

    The customer is solely responsible for its selection and use of Variscite products. Variscite is not liable for such selection or use nor for use of any circuitry other than circuitry entirely embodied in a Variscite product.
  • Page 41 Variscite guarantees hardware products against defects in workmanship and material for a period of one (1) year from the date of shipment. Your sole remedy and Variscite’s sole liability shall be for Variscite, at its sole discretion, to either repair or replace the defective hardware product at no charge or to refund the purchase price.

  • Page 42: Contact Information

                              VAR-320SBC Reference Guide  12. Contact information Headquarters Variscite LTD 20 Galgalei Haplada st. Hertzelia Israel Tel: +972 (9) 9562910 Fax: +972 (9) 9562912 Sales: sales@variscite.com Technical support: support@variscite.com Website: www.variscite.com Copyright © 2008 Variscite  42    ...

Table of Contents