Kinetic Technologies RD2-4020 User Manual

Displayport to quad-lvds output for stdp4020-rd2

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Reference Design Eval Kit
STDP4020-RD2
RD2-4020
DisplayPort to Quad-LVDS Output
Kinetic Technologies cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in
a Kinetic Technologies product. No intellectual property or circuit patent licenses are implied. Kinetic
Technologies reserves the right to change the circuitry and specifications without notice at any time.
March 2020 – Revision 03a (Rev. B)
Page 1 of 16
Company Confidential

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Summary of Contents for Kinetic Technologies RD2-4020

  • Page 1 RD2-4020 DisplayPort to Quad-LVDS Output Kinetic Technologies cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Kinetic Technologies product. No intellectual property or circuit patent licenses are implied. Kinetic Technologies reserves the right to change the circuitry and specifications without notice at any time.
  • Page 2: Table Of Contents

    Reference Design Eval Kit STDP4020-RD2 Contents Purpose and scope ............................4 Description .................................4 2.1. Set Up Instructions .............................4 2.1.1. I2C Host Port ............................6 2.1.2. In-System Programming (ISP) ......................6 2.1.3. Diagnosis ............................6 Board Description ..............................7 3.1. Principal Components and Functions ......................9 3.2. Connector descriptions ..........................
  • Page 3 Reference Design Eval Kit STDP4020-RD2 List of Tables Table 3.1-1. Principal Components and Functions.................... 9 List of Figures Figure 1. Connection Diagram: PC DP Signal to LVDS Stream ............... 5 Figure 2. Block Diagram ............................ 7 Figure 3. Board Picture ............................8 March 2020 –...
  • Page 4: Purpose And Scope

    SPI interface, I2C Slave (Host Interface), I2C Master Interface, UART (GProbe) interface, and general-purpose IO pins. The RD2-4020 is a low cost compact four layer board that includes necessary interfaces and features to fully demonstrate the STDP4020 receiver functionalities. This reference design...
  • Page 5: Figure 1. Connection Diagram: Pc Dp Signal To Lvds Stream

    STDP4020 register setting changes are required in order to transmit audio on I2S output. This can be done through I2C host configuration or through firmware changes. The RD2-4020 supports video resolution from 640 x 480 up to 2560 x 1600 and audio up to 8 Ch. March 2020 – Revision 03a (Rev. B)
  • Page 6: I2C Host Port

    Refer to the STDP4020 datasheet for further details. 2.1.2. In-System Programming (ISP) RD2-4020 uses SPI Flash to store the firmware. In case of a new firmware upgrade, one of the following methods can be used. ISP through DisplayPort connector: Allows programming the SPI Flash through DisplayPort input connector.
  • Page 7: Board Description

    Reference Design Eval Kit STDP4020-RD2 3. Board Description gProbe Crystal Audio Conn STDP4020 QLVDS GPIOs SPI flash EDID Switch regulator supply Figure 2. Block Diagram March 2020 – Revision 03a (Rev. B) Page 7 of 16 Company Confidential...
  • Page 8: Figure 3. Board Picture

    Reference Design Eval Kit STDP4020-RD2 Figure 3. Board Picture March 2020 – Revision 03a (Rev. B) Page 8 of 16 Company Confidential...
  • Page 9: Principal Components And Functions

    The board includes an SPI Flash of 2 MB to hold the firmware. The SPI Flash can be U702 programmed (ISP) through DP AUX Channel or through UART interface. Dual/Quad The RD2-4020 features two LVDS output connectors for Quad or Dual LVDS outputs. CN901 LVDS Output Connector1: 902 (51 pin), Connector2: 901 (41 pin)
  • Page 10: Connector Descriptions

    Reference Design Eval Kit STDP4020-RD2 3.2. Connector descriptions The RD2-4020 has the following connectors. CN301 – +12V DC 4A Power Input Jack CN403 – GProbe Interface (4x1 pin keyed header) connects to the UART port of the STDP4020. Use Kinetic GProbe board and interface cable for connecting the board to an external PC that has GProbe software running.
  • Page 11 Reference Design Eval Kit STDP4020-RD2 CN402 – I2S Digital Audio Output (52 pin) connector. Pin A1 Pin A2 & A3 Pin A4 through A6 Pin A7 Pin A8 & A9 Pin A10 I2S_3 Pin A11 I2S_2 Pin A12 I2S_1 Pin A13 Pin A14 I2S_0 Pin A15...
  • Page 12 Reference Design Eval Kit STDP4020-RD2 CN404 – S/PDIF Output Pin 1 Pin 2 I2S_0 Pin 3 CN501 – DisplayPort Receiver MOLEX 47272-0002 connector and pin out details. Pin 1 ML_L3N Pin 2 Pin 3 ML_L3P Pin 4 ML_L2N Pin 5 Pin 6 ML_L2P Pin 7...
  • Page 13 Reference Design Eval Kit STDP4020-RD2 CN901 & CN902 – Quad/Dual LVDS output (refer to the schematics for complete pin out details) CN901 [LVDS Connector2] Pin 1 Pin 2 Pin 3 LVDS_45P Pin 4 LVDS_45N Pin 5 LVDS_44P Pin 6 LVDS_44N Pin 7 Pin 8 LVDS_CLK4P...
  • Page 14 Reference Design Eval Kit STDP4020-RD2 CN902 [LVDS Connector1] Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Pin 6 Pin 7 Pin 8 Pin 9 Pin 10 Pin 11 LVDS_25P Pin 12 LVDS_25N Pin 13 LVDS_24P Pin 14 LVDS_24N Pin 15 Pin 16 LVDS_CLK2P...
  • Page 15 Reference Design Eval Kit STDP4020-RD2 LVDS output configuration table Quad LVDS output CN901 CN902 Dual LVDS Output CN901 CN903 – Backlight Control Pin 1 +12V Pin 2 +12V Pin 3 +12V Pin 4 Pin 5 Pin 6 Pin 7 Pin 8 Pin 9 Pin 10 Pin 11...
  • Page 16: Switches

    Reference Design Eval Kit STDP4020-RD2 3.3. Switches Host Interface Switch: (SW401): This switch selects the use of GProbe connector or Host Interface connector. SW401 – Host Interface Pin 1 HOST_TX Pin 2 UART_TX Pin 3 GPROBE_TX Pin 4 HOST_RX Pin 5 UART_RX Pin 6 GPROBE_RX...

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