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Inrevium TB-FMCL-MIPI Hardware User Manual

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TB-FMCL-MIPI Hardware User Manual
TB-FMCL-MIPI
Hardware User Manual
Rev.3.01
1
Rev.3.01

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Summary of Contents for Inrevium TB-FMCL-MIPI

  • Page 1 TB-FMCL-MIPI Hardware User Manual TB-FMCL-MIPI Hardware User Manual Rev.3.01 Rev.3.01...
  • Page 2 TB-FMCL-MIPI Hardware User Manual Revision History Version Date Description Publisher Rev.1.00 5/22/2015 Initial release Rev.1.10 5/25/2015 Reviewed and updated. General Release Rev.1.99 8/26/2015 Reviewed. Updated for PA-10087-0x Rev2.0. Submitted for review. Rev. 2.00 9/14/2015 Updated. Released. Rev. 3.00 11/30/2015 Updated with new connector information Rev.

  • Page 3: Table Of Contents

    TB-FMCL-MIPI Hardware User Manual Table of Contents Related Documents and Accessories ..................8 Overview ............................8 Features ............................9 Block Diagram ........................... 10 External View of the Board ......................11 Board Specification ........................13 Board Power System ......................... 14 7.1.
  • Page 4 Figure 3-1 FMC LPC Connector Pinout per VITA 57.1 ..............9 Figure 4-1 TB-FMCL-MIPI Block Diagram ..................10 Figure 5-1 Photo of TB-FMCL-MIPI (Side 1) ..................11 Figure 5-2 Photo of TB-FMCL-MIPI (Side 2) ..................12 Figure 6-1 TB-FMCL-MIPI Board Dimensions (mm) ................ 13 Figure 7-1 TB-FMCL-MIPI Power Structure ..................14 Figure 7-2 VUSER Jumper Select Positions ..................
  • Page 5 TB-FMCL-MIPI Hardware User Manual Introduction Thank you for purchasing the TB-FMCL-MIPI board. Before using the product, be sure to carefully read this user manual and fully understand how to correctly use the product. First read through this manual, and then always keep it handy.
  • Page 6 TB-FMCL-MIPI Hardware User Manual Warning In the event of a failure, disconnect the power supply. If the product is used as is, a fire or electric shock may occur. Disconnect the power supply immediately and contact our sales personnel for repair.
  • Page 7 TB-FMCL-MIPI Hardware User Manual Caution Do not use or place the product in the following locations.  Humid and dusty locations  Airless locations such as closet or bookshelf  Locations which receive oily smoke or steam  Locations exposed to direct sunlight ...

  • Page 8: Related Documents And Accessories

    1 Gbit/s per lane. The TB-FMCL-MIPI does not utilize any of the high-speed serial DPx data links and GBTCLKs provided in the FMC standard, so present data speed is limited to the capabilities of HR and HP SelectIO of Xilinx FPGAs.

  • Page 9: Features

    An excerpt from ANSI/VITA 57.1 of the FMC LPC connector physical pin layout is provided below. The TB-FMCL-MIPI implements only the LPC sub-portion as defined for rows C, D, G, and H. All other rows apply to the FMC HPC implementation and are left open-circuit when the TB-FMCL-MIPI is installed in an FMC HPC receptacle.

  • Page 10: Block Diagram

    TB-FMCL-MIPI Hardware User Manual 4. Block Diagram Figure 4-1 shows the TB-FMCL-MIPI block diagram. 3P3VAUX M24C02 12.0V VUSER 1.2V 2.5V MAX. 800mA Max. Draw 30mA Max. Draw 60mA EEPROM TPS62150 TPS74701 LDO TPS74701 LDO SWITCHER EXPANDER VUSER jumper selectable for 1.5V, 1.8V, 2.5V, or 3.3V...

  • Page 11: External View Of The Board

    MIPI PORTA MIPI PORTA GPIO DEBUG CSI CONNECTOR J5 I2C VOLTAGE HDR J15 MIPI PORTA VUSER VOLTAGE SELECTOR J6 MIPI AUX IO VOLTAGE SELECTOR J9 SELECTOR J12 MIPI PORTB I2C VOLTAGE SELECTOR J17 Figure 5-1 Photo of TB-FMCL-MIPI (Side 1) Rev.3.01...

  • Page 12: Figure 5-2 Photo Of Tb-Fmcl-Mipi (Side 2)

    TB-FMCL-MIPI Hardware User Manual Figure 5-2 Photo of TB-FMCL-MIPI (Side 2) Rev.3.01...

  • Page 13: Board Specification

    TB-FMCL-MIPI Hardware User Manual 6. Board Specification The following shows the TB-FMCL-MIPI board physical specifications. 76.50 mm L x 69.00 mm W – Dimensions/features per VITA57.1 External Dimensions Number of Layers 10 layers Board Thickness 1.6 mm Material Megtron 4...

  • Page 14: Board Power System

    7.1. Power System Overview Figure 7-1 shows the TB-FMCL-MIPI power supply structure. The card uses the 12 Volt, the 3.3 Volt, the 3.3V AUX, and the VADJ rails supplied on the FMC connector from the carrier card. There is one 1.2V LDO regulator to generate the PHY core voltage (MC20901/MC20902), one 2.5V LDO regulator for the...

  • Page 15: Ldo Regulators

    TB-FMCL-MIPI Hardware User Manual 7.3. LDO regulators There are two Texas Instruments TPS74701 LDO regulators that are used to support the MIPI PHY devices. The 1.2V regulator will need to supply up to 30mA to two PHY devices core supply in full operation, and the 2.5V regulator will supply up to 60mA to two PHY devices IO supply in full operation.

  • Page 16: Lp Mode Interface

    **Floating HS Pin polarity swap each lane at the LVDS HS port * BTA on Channel A / MIPI lane 4 is not supported on the TB-FMCL-MIPI card. These settings should not be used. ** This option is available by removing the appropriate shorting jumper from J3: pins 1-2 for CSI, pins 3-4 for DSI.

  • Page 17: Mipi Io Signals

    TB-FMCL-MIPI Hardware User Manual 9. MIPI IO Signals 9.1. MIPI D-PHY Lanes Each MIPI connector, whether input (CSI-2) or output (DSI), provides five differential pairs that are designed to interface to 100-ohm differential wiring to the MIPI peripheral. The differential pairs are assigned per Samtec’s recommendations for the LSHM series where each pair occupies adjacent pins...

  • Page 18: Figure 9-2 Mipi Gpio Voltage Select Options

    TB-FMCL-MIPI Hardware User Manual shown: 3.3V 2.5V VADJ VUSER Figure 9-2 MIPI GPIO Voltage Select Options Each GPIO group has a header for voltage selection; MIPI PORT A (CSI-2) MIPI_AUXIO_(1-4) uses header J12, and MIPI PORT B (DSI) MIPI_AUXIO_(5-8) uses header J19.

  • Page 19: Mipi I2C Bus

    I2C port is not expected to operate. Connectors There are three main connectors on the TB-FMCL-MIPI card. One LPC FMC connector (J1) provides the FMC host carrier interconnection, and the other two connectors (J5 and J16) are two right-angle MIPI port sockets facing off the front edge (I/O window) of the FMC module.

  • Page 20: Table 10-1 Lpc Fmc Host Board Connector Pin Assignment

    CLK1_M2C_P CLK1_M2C_P Optional MIPI DSI PHY LVDS CLK1_M2C_N CLK1_M2C_N Channel A ** inrevium strap option: route HS4 pairs to alternate clock FMC CLKx_M2C pins instead of LAxx_CC pins MIPI LP Signals M2C_CMOS_BTA_LP0_P LA16_P LVCMOS MIPI CSI PHY LP M2C/C2M M2C_CMOS_BTA_LP0_N...
  • Page 21 TB-FMCL-MIPI Hardware User Manual Schematic Signal VITA 57.1 Pin Direction Type Description Name Name C2M_CMOS_LP1_P LA26_P LVCMOS MIPI DSI PHY LP (VADJ) Channel D C2M_CMOS_LP1_N LA26_N C2M_CMOS_LP2_P LA28_P LVCMOS MIPI DSI PHY LP C2M_CMOS_LP2_N LA28_N (VADJ) Channel C C2M_CMOS_LP3_P LA25_P...
  • Page 22 TB-FMCL-MIPI Hardware User Manual Schematic Signal VITA 57.1 Pin Direction Type Description Name Name (VADJ) LVCMOS MIPI_AUXIO_LPC5 LA30_P MIPI_AUX_DI MIPI Port B GPIO 1 (VADJ) LVCMOS MIPI_AUXIO_LPC6 LA30_N MIPI_AUX_DI MIPI Port B GPIO 2 (VADJ) LVCMOS MIPI_AUXIO_LPC7 LA32_P MIPI_AUX_DI MIPI Port B GPIO 3...

  • Page 23: Figure 10-1 Resistor For Connection To Tb-7V-2000T-Lsi

    TB-FMCL-MIPI Hardware User Manual Note: If this FMC is to be connected to the inrevium TB-7V-2000T-LSI then populate R180 and R181 and depopulate R178 and R179, populate R184 and R185 and depopulate R182 and R183. Figure 10-1 Resistor for connection to TB-7V-2000T-LSI...

  • Page 24: Mipi Front Edge (I/O Window) Receptacles

    TB-FMCL-MIPI Hardware User Manual 10.2. MIPI Front Edge (I/O Window) Receptacles ™ The TB-FMCL-MIPI card utilizes Samtec Razor Beam LSHM series connectors for access to the MIPI ports. These 0.5mm pitch receptacles provide 40 connections in mixed differential and single-ended signals, in a format that is compact enough to fit two receptacles across a single-width FMC form-factor.

  • Page 25: Table 10-2 Mipi D-Phy Port A J5 (Csi)

    TB-FMCL-MIPI Hardware User Manual The pinouts are provided in the following table: Table 10-2 MIPI D-PHY PORT A J5 (CSI) Connector J5 CSI (PORT A) Signal Signal (TEST POINT TP3) MIPI_SLVS_IN4_N (TEST POINT TP2) MIPI_SLVS_IN4_P LOOP_N MIPI_SLVS_IN3_N LOOP_P MIPI_SLVS_IN3_P MIPI_AUXIO_4...

  • Page 26: Mipi Gpio And I2C Debug Headers

    J15 provides access to the CSI port, and J18 provides access to the DSI port. Both headers face out from opposite sides of the TB-FMCL-MIPI card and are accessible while the card is installed on a carrier provided there is nothing obstructing side access. The following figure...

  • Page 27: Fmc Facility I2C Bus

    TB-FMCL-MIPI Hardware User Manual Table 10-4 MIPI GPIO Debug Headers J15 and J18 Header Header Signal Signal J15 Pin J18 Pin MIPI_AUXIO_1 MIPI_AUXIO_5 12V0 12V0 MIPI_AUXIO_2 MIPI_AUXIO_6 VUSER VUSER MIPI_AUXIO_3 MIPI_AUXIO_7 CLK_I2C_SCL_MIPI_CSI_O CLK_I2C_SCL_MIPI_DSI_O MIPI_AUXIO_4 MIPI_AUXIO_8 I2C_SDA_MIPI_CSI_OD I2C_SDA_MIPI_DSI_OD Ground Ground Ground...

  • Page 28: Appendix A: Fmc I2C Eeprom

    TB-FMCL-MIPI Hardware User Manual Appendix A: FMC I2C EEPROM The following table describes the contents of the FMC I2C EEPROM as programmed at the factory. Table 14-1 FMC I2C EEPROM Contents Board Information Field Size Data Language Code Date / Time of Manufacture <Variable>...
  • Page 29 TB-FMCL-MIPI Hardware User Manual DC Load Record – VADJ Field Size Data Description Output Information 0x00 Bit map containing output number, etc. (VADJ) Nominal Voltage 0x00B4 In units of 10mV (1.8V) Minimum Voltage 0x00A5 In units of 10mV (1.65V) Maximum Voltage 0x014A In units of 10mV (3.3V)
  • Page 30 TB-FMCL-MIPI Hardware User Manual DC Output Record – VREF_A_M2C (NOT CONNECTED) Field Size Data Description Output Information 0x04 Bit map containing output number, etc. Nominal Voltage 0x0000 In units of 10mV Minimum Voltage 0x0000 In units of 10mV Maximum Voltage...

  • Page 31: Appendix B: Headers, Factory Default, And Orientation

    TB-FMCL-MIPI Hardware User Manual Appendix B: Headers, Factory Default, and Orientation The following depicts the factory default header jumper positions and clarifies the pin numbering and orientation of the headers. Default strap selected functions are as follows: Table 15-1 Default Header Explanation...
  • Page 32 TB-FMCL-MIPI Hardware User Manual Inrevium Company URL: http://www.inrevium.com/ http://solutions.inrevium.com/ E-mail: psd-support@teldevice.co.jp HEAD Quarter: Yokohama East Square, 1-4 Kinko-cho, Kanagawa-ku, Yokohama City, Kanagawa, Japan 221-0056 TEL: +81-45-443-4031 FAX: +81-45-443-4063 Rev.3.01...

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