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Summary of Contents for Atmark Techno Armadillo-9 AN010
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AN010 Hardware Manual Version 1.02 February 21, 2005 Atmark Techno, Inc. http://www.atmark-techno.com/ Armadillo Official Site http://armadillo.atmark-techno.com/...
Armadillo-9 hardware manual ver.1.02 1. Introduction Thank you for your purchase of the Armadillo-9. The Armadillo-9 is a small single board computer that uses an ARM9 processor (Cirrus Logic EP9315: 200MHz). It is equipped with 100Mbps network functionality as well as a wide range of interfaces including serial, USB, IDE and VGA.
Furthermore, we do not guarantee any outcomes resulting from the use of this product. 2.4. Trademarks Armadillo is a registered trademark of Atmark Techno, Inc. Other products and company names are either trademarks or registered trademarks of their respective company or organization.
Armadillo-9 hardware manual ver.1.02 4.2. Logical Memory Map When Using Linux When Linux is being used, the Armadillo-9 is configured by the MMU with the following logical memory map. Table 4-2 Armadillo-9 Logical Memory Map When Using Linux Start Address End Address Device Memory Area...
Armadillo-9 hardware manual ver.1.02 5.3. CON2 (Serial Interface 2) CON2 is an asynchronous (start-stop) serial interface. It is connected to UART2 on the CPU (EP9315). Signal input/output level: RS232C Maximum data rate: 115.2kbps Flow control: None FIFO: 16Byte built-in for both send and receive Table 5-3 CON2 Signal Assignment Signal Name Function...
Armadillo-9 hardware manual ver.1.02 5.5. CON4 (Parallel Interface) CON4 is a general purpose I/O port. It is connected to the GPIO (General Purpose I/O) on the CPU (EP9315). The port can be controlled using PADR (Port A data register I/O at 0x8084 0000), PADDR (Port A data direction register I/O at 0x8084 0010), PBDR (Port B data register I/O at 0x8084 0004) and PBDDR (Port B data direction register I/O at 0x8084 0014) in the CPU.
Armadillo-9 hardware manual ver.1.02 5.7. CON6 (EP9315 JTAG) The CON6 connector is used to connect a JTAG debugger to the Armadillo-9. It is connected to the JTAG signal on the CPU (EP9315). Signal Name Function +3.3V Power Power supply (+3.3V) Power Power supply (GND) TRST*...
Armadillo-9 hardware manual ver.1.02 5.9. CON8 (Synchronous Serial / AC97 / I2S) While the CON8 connector is used to connect a synchronous serial, AC97CODEC or audio CODEC device, normal operation of the Armadillo9 is not guaranteed when using this connector. Table 5-8 shows the pin assignment.
Armadillo-9 hardware manual ver.1.02 5.10. CON9 (IDE Interface) CON9 is a 2-mm, 44-pin connector used to connect an IDE device. A 2.5-inch hard-disk drive can be connected using a straight flat cable. PIO mode and ATA33 data transfer modes are supported. The following table shows the pin assignment of CON9.
Armadillo-9 hardware manual ver.1.02 5.11. CON10 (Compact Flash) CON10 is a Compact Flash interface. It supports I/O mode and memory mode, allowing the connection of ATA devices and I/O cards. Connection Modes: I/O Mode, Memory Mode Type: Type I, Type II 3.3V cards only, Hot Plug support Table 5-11 CON10 Signal Assignment Signal Name...
Armadillo-9 hardware manual ver.1.02 5.12. CON11 (LAN Connector) CON11 is a 10BASE-T/100BASE-TX LAN interface used to connect a category 5 or higher Ethernet cable. While it is normally used to connect to a hub using a straight cable, it can also be used to directly connect a PC etc.
Armadillo-9 hardware manual ver.1.02 5.14. CON13 (Power Input Connector) The CON13 connector used is to connect a power supply to the Armadillo-9. The minimum power supply required to operate the Armadillo-9 is +5V-GND. The +12V is connected to the PC/104 +12V supply pin. Table 5-15 CON13 Signal Assignment Signal Name Function...
Armadillo-9 hardware manual ver.1.02 5.16. J1, J2 (PC/104-Compliant Extension Bus) J1 and J2 are extension buses with PC/104-compliant bus arrays. They have a 64kB I/O area and a 16MB memory area. However, since the ARM architecture does not have an I/O area (I/O access only) as x86 CPUs do, the I/O area is placed in the standard memory space.
Armadillo-9 hardware manual ver.1.02 Table 5-18 J1 Signal Assignment (2) Signal Name Function Power Power supply (GND) RESET_DRV Reset output Power Power supply (+5V) IRQ9 Interrupt 9 Power Power supply (-5V) DQR2 Non-support -12V Power Power supply (-5V) ENDXFR* Non-support (5V pull-up) +12V Power Power supply (+12V) (KEY)
Armadillo-9 hardware manual ver.1.02 Table 5-19 J2 Signal Assignment (1) Signal Name Function Power Power supply (GND) SBHE* Bus high enable (active when the high 8-bit on data bus is used) Address bus (23bit) Address bus (22bit) Address bus (21bit) Address bus (20bit) Address bus (19bit) Address bus (18bit)
Armadillo-9 hardware manual ver.1.02 5.16.1. Precautions for PC/104 Extension Bus Access As the PC/104 extension bus of the Armadillo-9 is not equipped with a dynamic bus sizing function, care is needed when accessing the PC/104 I/O area or memory area. The Armadillo-9 has one physical I/O area (64kB) and one physical memory area (16MB).
Armadillo-9 hardware manual ver.1.02 Each virtual area can be used as follows. 8bit virtual area 8-bit access using data bus (D7 - D0) 16bit virtual area 8-bit access to odd numbered addresses using data bus (D15 - D8) 8-bit access to even numbered addresses using data bus (D7 - D0) 16-bit access using data bus (D15 - D0) Accessing the physical areas can be accomplished as follows: 8(16)bit Base Address + Physical Area offset Address...
Armadillo-9 hardware manual ver.1.02 5.16.2. Access Timing The figure below shows the access timing to the PC/104 extension bus. The access timing is the same for both 16bit and 8bit access. ISACLK 8.333MHz Address (A23~A0) SBHE* 60ns 90ns BALE Write timing 10ns 240ns - IOW*,...
Armadillo-9 hardware manual ver.1.02 5.17. LED (D4) LED (D4) is the IDE access lamp. 3.3V 150Ω (D4) DASP* Figure 5-5 LED (D4) Connections 5.18. LED (D5, D6) LED (D5,6) show the LAN status. Table 5-21 Status of LED (D5, D6) Code Name LINK...
Armadillo-9 hardware manual ver.1.02 5.19. LED (D14) The LED (D14) indicates the status of the Armadillo-9’s power supply. Table 5-22 Status of LED (D14) Code Name POWER The Armadillo-9 is being supplied The Armadillo-9 is not being supplied power power 3.3V 150Ω...
Armadillo-9 hardware manual ver.1.02 6. Other Functions 6.1. CPLD Internal Register (I/O Control Register) 6.1.1. Memory Map of I/O Control Register The Armadillo-9 CPLD provides an I/O control register to control the PC/104 I/O. The memory map of the I/O control register is shown in Table 6-1. Table 6-1 Memory Map of I/O Control Register Hardware Address...
Armadillo-9 hardware manual ver.1.02 6.1.2. Details of the I/O Control Registers Table 6-2 gives details of the I/O Control registers. Table 6-2 Details of I/O Control Registers Hardware Linux Data Register name Address Address Read Only Interrupt Service Register0 0x1000 0000 0xF000 0000 IRQ15 IRQ14 IRQ12...
Armadillo-9 hardware manual ver.1.02 6.1.3. Structure of PC/104 Interrupt Controller The PC/104 interrupt controller is incorporated in the CPLD (XCR3064). Types of interrupt connected to this interrupt controller include IRQ3, 4, 5, 6, 7, 9, 10,11,12, 14 and 15. The conceptual diagram of the interrupt controller is illustrated below.
Armadillo-9 hardware manual ver.1.02 6.2. External Interrupts Connections from outside the board can be made to the external interrupt terminal of the CPU (EP9315) via CON14. Pin-4 of CON14 can be connected to the CPU (EP9315) by shorting JP3. While by shorting JP4, the interrupt output of IC5(S-353xxA) can be sent to outside the board.
Armadillo-9 hardware manual ver.1.02 6.4. Calendar Clock (Real Time Clock) The calendar clock (Real Time Clock: S-3531A or compatible) is connected to the CPU (EP9315) by a 2- wire serial line (GPIO). The CPU end accesses the RTC by controlling parallel port B (PB4, 5: EGPIO12, EGPIO13) in a serial fashion.
Armadillo-9 hardware manual ver.1.02 7. Board View Figure 7-1 shows the board view of the Armadillo-9. (Connectors shown in the diagram may not be mounted on some Armadillo-9 models) 82.55 74.5 50.165 34.29 29.21 16.51 8.89 Φ6.4 PAD Φ3.2 HOLE 11.7 17.9 5.75 5.08 6.35...
Armadillo-9 hardware manual ver.1.02 8. Revision History Revision History Version Date Description 1.00 2004.12.18 Initial release 1.01 2005.2.10 Correction of GPIO value in Table 3-1 Correction of SDRAM memory map Table 4-1 Revision of description of External Interrupts, Section 6.2 Correction of various typographical errors 1.02 2005.2.21...
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Armadillo-9 Hardware Manual February 21, 2005 version 1.02 Atmark Techno, Inc. AFT Bldg., 6F East 2 North 5, Chuo-ku, Sapporo, Japan 060-0035 TEL011-207-6550 FAX011-207-6570...
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