IBM 5280 Technical Newsletter page 18

Accessing Keyboard/Display Storage
The following example shows. how a display adapter
accesses keyboard/display storage to read data from the
display buffer. For this example, assume a dual data
station is attached to the IBM 5285. Therefore, a dual
data station adapter card is installed in location E 1
(Refer to logic diagram
LOOOJ.
Refer to diagram
LD05-2
while reading the following description.
1. The raster timing and storage interface logic on the
E1 card (L006-2) requests a storage cycle by acti-
vating the '-bit req 3 I/O' line (see the chart on
L006-2).
2. Keyboard/display storage control (KB/disp on
LD06-1) selects display adapter 1 by activating the
'+sel dev 3 I/O' line.
3. The raster timing and storage interface logic L006-2
responds by activating the '-storage req (I/O)' line.
The storage interface logic then puts the selected
keyboard/display storage address on the storage
address bus ('-I/O SAR bit 0 dot' through '-I/O
SAR bit 15 dot' lines).
4. The '-storage req (I/O)' line initiates a storage cycle.
During the cycle, the addressed data is put on the
storage data bus (-I/O stg data bit P dot' through
'-I/O stg data bit 7 dot' lines). At the end of the
storage cycle, KB/disp storage control activates the
'-T comp I/O' line. This signals the storage inter-
face logic that the data is on the bus and ready to
read.
5. The storage interface logic reads the data and deacti-
vates the '-storage req I/O' line.
6. The KB/disp storage control deactivates the '-T comp
I/O' line, which deactivates the '-dev sel 3 I/O' line.
The storage cycle is complete and the KB/disp
storage control can respond to another request.
KEYBOARD
The keyboard has three major parts: key modules, the
pad printed circuit board, and the logic printed circuit
board. Key modules contain the switches that are pressed
by the operator. The pad printed circuit board below the
key senses a pressed key by capacitive coupling. The
logic printed circuit board, attached to the pad printed
circuit board, contains a scan counter. The scan counter
tests each position on the pad printed circuit board one
position at a time. When a change of capacitance is
detected, a scan code is generated for the key pressed.
The scan code is sent serially to the data select logic in
the keyboard adapter on the
'+
serial data A' line. The
keyboard also generates a clock signal and a strobe signal
and sends them to the adapter on the
'+
ser data clk A'
and
'+
strobe A' lines to synchronize the transfer of data
from keyboard A.
The adapter then signals the keyboard/display MPU by
activating a service request line. The service request line
indicates to the keyboard/display MPU that a keyboard
has data to be transferred. During the time the keyboard/
display MPU is responding to the service request, the
adapter is transferring the data to the serial to parallel
register. The data is deserialized in this register then read
by the MPU and processed as specified by the application
program (see Keyboard Oata Flow in this section).
The first keyboard adapter (adapter 0) contains two
buff~rs.
All other adapters contain three buffers. If a
keystroke occurs and all buffers are full, the data in the
first buffer is set to all 1 's. This indicates to the keyboard/
display MPU that a keystroke has been lost and the key-
board/display MPU detects an overrun condition. An
overrun can occur from extra clock pulses or noise on the
clock line. The MPU also detects an overrun condition if
it receives a scan code with bits one through seven on.
This can occur if the serial data line remains active during
a serial keyboard data transfer.
MAGNETIC STRIPE READER
The magnetic stripe reader (MSR) allows rapid entry of
data constants read from credit-card-like media. A maxi-
mum of four MSRs can be connected to a keyboard/display
attachment. The reader contains a read head, ampl ifiers,
and a card sensing photocell. The magnetic card contains
data and control characters, which are read by the reader
as follows:
• Start of message (SOM) character
• Users data
• End of message (EOM) character
• Longitudinal redundancy check (LRC) character
This information is coded using four bits to define a
character and one bit to provide odd parity.
Keyboard/Display Attachment 257