Keysight Technologies N4963A User Manual
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Keysight Technologies N4963A User Manual

Keysight Technologies N4963A User Manual

Clock synthesizer 13.5 ghz
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Keysight N4963A
Clock Synthesizer 13.5 GHz
User's Guide

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Summary of Contents for Keysight Technologies N4963A

  • Page 1 Keysight N4963A Clock Synthesizer 13.5 GHz User’s Guide...
  • Page 2 Keysight N4963A Clock Synthesizer 13.5 GHz User Guide...
  • Page 3 Software is subject to outside of the environmental specifications for the Keysight Technologies’ standard commercial license product, or improper site preparation or maintenance. terms, and non-DOD Departments and Agencies of the No other warranty is expressed or implied. Keysight U.S.
  • Page 4 Alternately, an externally prohibited. installed switch or circuit breaker which is Keysight Technologies assumes no liability for readily identifiable and is easily reached by the the customer's failure to comply with these operator may be used as a disconnecting requirements.
  • Page 5 Symbols on Instruments Indicates the time period during which no CE Marking to state compliance within the European The instruction documentation symbol. The product is hazardous or toxic substance elements are Community: This product is in conformity with the marked with this symbol when it is necessary for the relevant European Directives.
  • Page 6 Error! No text of specified style in document. Environmental Information This product complies with the WEEE Directive (2002/96/EC) marketing requirements. The affixed label indicates that you must not discard this electrical/electronic product in domestic household waste. Product category: With reference to the equipment types in the WEEE Directive Annexure I, this product is classed as a “Monitoring and Control instrumentation”...

  • Page 7: Table Of Contents

    Contents Contents Contents ......................... 7 Getting Started ....................9 General ..................... 9 Getting started with N4963A ..............11 1.2.1 Unpacking and installation ............11 1.2.2 Important notes................. 11 1.2.3 Performance recommendations ..........11 Connect The Hardware ................12 Setting frequency and output levels ............13 Aligning clock and data ................
  • Page 8 Simple Functional Examples of N4963A use ..........56 5.6.1 Generic test example ..............57 5.6.2 Example using the N4963A to Control the N4962A ....58 Remote GPIB Interface ..................59 GPIB Capabilities ..................59 GPIB Command Syntax ................60 6.2.1 GPIB Command Syntax ..............

  • Page 9: Getting Started

    1 Getting Started 1.1 General The N4963A Clock Synthesizer 13.5 GHz generates six pairs of differential square- wave clock outputs from 500 MHz to 13.5 GHz. The instrument features GPIB- programmable output amplitude, DC offset, phase offset, sub-rate trigger, and jitter injection.
  • Page 10 GPIB (IEEE 488.2-1992) • All controls both local and GPIB Jitter Generation • Internal jitter synthesizer: (N4963A-101) o 1 Hz to 75 kHz Max 32 UI o 75 kHz to 2.4 MHz Max 32 -> 1UI o 2.4 MHz to 100 MHz Max 0.6 UI...

  • Page 11: Getting Started With N4963A

    Getting Started 1.2 Getting started with N4963A 1.2.1 Unpacking and installation The N4963A clock synthesizer 13.5 GHz is shipped in a protective carrying case with all the accessories required for the self-test mode and verification. The case includes: • N4963A clock Synthesizer •...

  • Page 12: Connect The Hardware

    4. Keep cable lengths short and minimize number of cable bends 5. Use a 7 to 10 in-lbs torque wrench when attaching connectors 1.3 Connect The Hardware • Connect power cord to adaptor to N4963A; plug in the power cord. Jittered • Connect the OUT to your instrument transmit clock input using the filters provided.

  • Page 13: Setting Frequency And Output Levels

    • Turn on the power switch from the back panel. • The N4963A synthesizer starts with the FREQ option selected by default and "005.000G" showing in the display. • Set the desired frequency using the Unit, Digit and Value buttons.

  • Page 14: Enabling Jitter Injection

    Getting Started 1.6 Enabling jitter injection • Using the jitter Select button, select either the internal (Int Jitter) or external (Ext Jitter) jitter source. • Using the internally generated jitter source (Int Jitter): Display- o Press the >Scroll  button and select JITTER FREQ. o Set the modulation frequency with the Unit, Digit and Value buttons.

  • Page 15: N4963A Operation Overview

    N4963A Operation Overview 2 N4963A Operation Overview The Keysight Technologies N4963A clock synthesizer 13.5 GHz generates six pairs of differential square-wave clock outputs from 500 MHz to 13.5 GHz. The instrument features GPIB-programmable output amplitude, DC offset, phase offset, sub-rate trigger, and jitter injection.

  • Page 17: N4963A System Overview

    GPIB (IEEE 488.2) interface. Instrument status is conveyed on the front panel by LED indicator and the 8-digit display. Options The N4963A is available with the following build options: • standard: 500 MHz to 13.5 GHz operation, 6 differential unjittered outputs •...
  • Page 18 N4963A System Overview Block Diagram Figure 2. N4963A block diagram Clock Synthesizer 13.5 GHz User Guide...

  • Page 19: Front Panel Quick Reference

    N4963A System Overview 3.1 Front panel quick reference Figure 3. N4963A front panel 3.1.1 Connectors Reference Outputs: OUT, OUT ¯¯¯ (SMA) – differential unjittered outputs, channel 1 Jittered Outputs: OUT, OUT ¯¯¯ (SMA) – differential jittered outputs, channel 2 3.1.2 Front panel controls Table 1.
  • Page 20 Off- Internal ref source. Select (Jitter): Off- All jitter off Requires N4963A-101. Toggles between injecting no jitter, injecting jitter from the internal jitter generator, Jitter Off Int- Internal jitter and injecting jitter from the externally-applied source.

  • Page 21: Rear Panel Quick Reference

    Trig-O (SMA) – Programmable sub-rate trigger output (clk/[8,9,10,…,510,511]) Ext-Jitter (SMA) – External jitter modulation input port (DC to 100 MHz) (GPIB) – GPIB connector, conforms to IEEE 488.1 mechanical specification (unmarked circular 5-pin DIN) – DIN-connector for N4963A power supply Clock Synthesizer 13.5 GHz User Guide...

  • Page 22: Label

    SN (white area) – N4963A serial number 3.2.3 Controls GPIB (switch panel) – N4963A GPIB address (down is ‘0’, up is ‘1’, LSB is on the left) (Default GPIB address as shipped from the factory is 16) Power (switch) – N4963A is powered on when switch is togged up towards ‘Power’...

  • Page 23: System Details And Performance Specifications

    The clock output channels are grouped in differential pairs. When a single port of a differential pair is used in a single-ended method of measurement, the complementary port must be terminated with a 50Ω-terminated connector. 4.1 General Table 2. General and mechanical parameters of N4963A Operating Temperature +10°C to +55°C Storage Temperature -40°C to +70°C...

  • Page 24: Safety And Regulatory

    Do not remove instrument covers. There are no user serviceable parts within. WARNING Operation of the instrument in a manner not specified by Keysight Technologies may result in personal injury or loss of life. To prevent electrical shock, disconnect instrument from mains before cleaning.
  • Page 25 See Table 4. If the synthesizer is built with jitter injection, N4963A-101, the jittered high- frequency signal will be available from the front-panel CH2 differential outputs and the rear-panel CH4A and CH4B differential outputs. CH2 has programmable output amplitude and programmable DC offset.
  • Page 26 System Details and Performance Specifications Table 4. Parameters for N4963A 10 MHz reference Frequency 500 MHz to 13.5 GHz Frequency resolution Front Panel GPIB 1 MHz 1 KHz Frequency accuracy ±20 ppm Phase noise (typical) -65 dBc/Hz at 100Hz offset...

  • Page 27: Jitter Injection

    Female-SMA, single-ended, AC coupled, 50 Ω impedance 4.4 Jitter injection Internal and external jitter injection capability is only available when the unit is built with N4963A-101. It may be possible to upgrade your clock synthesizer to include N4963A-101, contact http://www.keysight.com/find/assist for more information.
  • Page 28 System Details and Performance Specifications Figure 5. Maximum internal jitter generation vs. frequency When using the internal jitter source, the method of generation is automatically selected based on the modulation frequency selected. However, different generation methods allow different amounts of jitter to be injected. Figure 5 and Table 6 indicate the maximum amount of jitter UI as a function of jitter modulation frequency.
  • Page 29 System Details and Performance Specifications Table 6. Parameters for N4963A internal jitter injection Jitter frequency 1 Hz to 75 kHz 75 kHz to 2.4 MHz 2.4 MHz to 100 Maximum UI 16 -> 1 Jitter frequency Front Panel and GPIB resolution 1 Hz in 1 Hz to 1 MHz;...

  • Page 30: External Jitter

    System Details and Performance Specifications 4.4.2 External jitter The jitter modulation signal may also be externally supplied by applying a signal to the external jitter port. Low frequency jitter signals are sampled by an ADC, and the jitter modulation signal is generated from a lookup table in the FPGA. High frequency signals are directly modulated onto the high-frequency clock.
  • Page 31 System Details and Performance Specifications Figure 6. Maximum external jitter generation vs. frequency Clock Synthesizer 13.5 GHz User Guide...
  • Page 32 System Details and Performance Specifications Table 7. Parameters for N4963A external jitter injection Modulation Source External Signal Generator Maximum input 1 V pp Input Female-SMA, Single-Ended, DC-Coupled, 50 Ω Deviation scaling 1, 2, 4, 8, 16 and 32 factors Modulation Frequency Maximum UI Ext.

  • Page 33: Operation

    5 Operation The following section provides more detailed information regarding the use of the N4963A clock synthesizer 13.5 GHz. Please refer to the front and rear panel quick reference, in Section 3, for abbreviated information. The “Getting Started with the Keysight Technologies N4963A Clock Synthesizer”...

  • Page 34: Performance Recommendations

    50 Ω termination. 5.1.2 Command Structure The N4963A clock synthesizer 13.5 GHz features high-quality SMA connectors for the front and rear panel Input and Output, RF connections. Connector damage will degrade signal fidelity.
  • Page 35 Operation Clock Synthesizer 13.5 GHz User Guide...

  • Page 36: Front Panel Interface

    Operation 5.2 Front Panel Interface Figure 7. N4963A front panel The N4963A front panel indicates the system configuration and can be used for local operation of the instrument. The front panel contains four groupings of buttons and lights: 1. Local status, clock output status, and 10 MHz reference path controls;...

  • Page 37: Display Panel

    Operation 5.2.1 Display panel Figure 8. N4963A front panel – Display panel Table 8. N4963A front panel – Display panel Text Type Description Default Unleveled LED light The unleveled indicator is lit when any of the clock outputs reach a level where they are un-calibrated.

  • Page 38: Local, Clock, Reference, And Jitter Select Controls

    Operation 5.2.2 Local, Clock, Reference, and Jitter Select Controls Figure 9. N4963A front panel – local, receiver, and data path controls Table 9. N4963A front panel – local, receiver, and data path controls Text Type Description Default Local button Light indicates local control: &...

  • Page 39: Display Selection Controls

    • Ext Jitter: The jitter modulation is from an external signal applied to the Ext Jitter connector on the back panel. 5.2.3 Display selection controls Figure 10. N4963A front panel – display selection controls Clock Synthesizer 13.5 GHz User Guide...
  • Page 40 Operation Table 10. N4963A front panel – display selection controls Text Type Description Default Display UP and DOWN Buttons select the measurement or Freq (GHz) buttons configuration option to display on the -> display panel: and 6 lights Scroll •...

  • Page 41: Configuration Adjustment Controls

    Operation 5.2.4 Configuration adjustment controls Figure 11. N4963A front panel – configuration adjustment controls Table 11. N4963A front panel – display and configuration adjustment controls Indicator LED 8-Digit Display Function Units Default FREQ xxx.xxxG Displays the clock frequency. G-GHz 005.000G Unit –...
  • Page 42 Operation Indicator LED 8-Digit Display Function Units Default is on. Unit – selects the frequency band Digit – selects the digit to change Value – changes the value Ext (LO/HI) Indicates the low- or high-frequency Ext LO mode when using an external Ext Jitter modulation signal with Value –...

  • Page 43: Rear Panel Interface

    The two differential reference (un-jittered) outputs CH3A and CH3B (both SMA) are labeled Ref. The two differential jittered outputs CH4A and CH4B (both SMA) are labeled Jit. If the synthesizer was built without N4963A-101, the panel marking will be unchanged, and the differential outputs will generate reference clocks.

  • Page 44: Power-On State

    This is detailed in Section 6. 5.4 Power-On State The power-on state of the N4963A is set after turning the rear power switch on. The unit comes on in local mode, and is controlled by the front panel. The internal TXCO is active after turn-on and generates a 10.0 MHz reference signal for the low...

  • Page 45: System Verification

    Firmware revision number 5.5 System verification When first using the N4963A, and before using the unit to test an external DUT, the user should first confirm that the synthesizer is generating a clock signal of the proper frequency and amplitude. The user should also check that the unit is responding properly to the front panel and GPIB commands.
  • Page 46 CH4B it is very important to terminate this output with a 50 Ω load. The N4963A may now be turned on. The unit will come up in local mode utilizing the internal 10 MHz reference. The display indicator is by default showing frequency and the default frequency is 5 GHz.
  • Page 47 Operation The next test is to check the output amplitude control. With the frequency adjusted to some desired value, scroll the display menu to the position of amplitude adjustment, AMP. Use the Chan button to select the desired channel for amplitude adjustment. In this case select A3, for the amplitude adjustment of the signal on CH3.
  • Page 48 Operation N4963A Keysight Trig-O CH3B CH4B Spectrum Analyzer CH3B Figure 13. Frequency and output amplitude verification setup Clock Synthesizer 13.5 GHz User Guide...

  • Page 49: Dc Offset And Phase Offset

    Operation 5.5.2 DC offset and phase offset The user should verify that the front panel amplitude adjustment control is working properly by following steps similar to those performed on the rear panel channels in the previous section. Note that the front panel output has considerably more range.
  • Page 50 Operation N4963A Keysight Trig-O Channel 1 OUT Channel 2 OUT Figure 14. DC offset and phase offset verification setup Clock Synthesizer 13.5 GHz User Guide...

  • Page 51: Internal Jitter Injection

    0.6 UI. For internal jitter the N4963A switches modes automatically depending on the user programmed jitter modulation frequency. The experimental setup is shown in Figure 15. Here the N4963A trigger output is connected to the scope trigger input. The channel 1 output is connected to the scope input and is used as a comparison reference.
  • Page 52 (adjust the external and trigger divide modulus as necessary). The maximum UI deviation that the N4963A is capable of producing is a function of the modulating frequency, see Figure 5.
  • Page 53 Operation N4963A Keysight Trig-O Channel 1 OUT Divide by N Channel 2 OUT Channel 2 OUT Figure 15. Internal jitter injection verification setup Clock Synthesizer 13.5 GHz User Guide...

  • Page 54: External Jitter Injection

    The maximum allowable signal level on the external jitter input to the N4963A is 1 V pp. Set the source frequency to some desired jitter frequency. Start with 100 kHz to make a comparison with the results from the previous section.
  • Page 55 Measure the signal spectrum coming from any port for Channels 2 or 4. Observe the clock signal, sideband spacing is equal to the frequency of the external jitter source. External Source Ext-Jitter N4963A Trig-O Keysight Channel 1 OUT Divide...

  • Page 56: Simple Functional Examples Of N4963A Use

    Operation Simple Functional Examples of N4963A use In this section a couple of examples that utilize the N4963A as a clock source, as part of a simple measurement experiment, are given. Clock Synthesizer 13.5 GHz User Guide...

  • Page 57: Generic Test Example

    Operation 5.6.1 Generic test example Generic experiment setup and description. Receiver Data Source PRBS Retimer Transmission Channel ∆φ φ(t) Keysight Reference Clock Jittered Clock Trig-O Figure 17. N4963A generic test example experimental setup Clock Synthesizer 13.5 GHz User Guide...

  • Page 58: Example Using The N4963A To Control The N4962A

    Experiment setup and description of N4963A controlling the BERT. N4963A Keysight Jittered Clock Reference Clock φ(t) ∆φ Tx Clock N4962A Rx Clock Keysight Transmitted Received Data Data Figure 18. Experimental setup for N4962A clocked by the N4963A Clock Synthesizer 13.5 GHz User Guide...

  • Page 59: Remote Gpib Interface

    Remote GPIB Interface 6 Remote GPIB Interface The N4963A can be controlled and queried with the rear-panel GPIB interface. The GPIB interface complies with IEEE standard 488.2-1992. To learn more about the GPIB interface, consult the following books from the IEEE:Record all symptoms.

  • Page 60: Gpib Command Syntax

    No controller capability Tristate outputs (except the handshake line) 6.2 GPIB Command Syntax The N4963A can be controlled through the GPIB interface using commands and queries. The commands and queries are documented in the Backus-Naur Form notation, detailed in Table 14.

  • Page 61: Ieee Common Commands

    6.3 IEEE Common Commands The IEEE 488.2 standard has a list of reserved commands that must be implemented by all instruments using the standard. The N4963A implements all of the required commands, listed in Table 15. Clock Synthesizer 13.5 GHz User Guide...

  • Page 62: Scpi Mandated Commands

    Recall ** ** Not implemented 6.4 SCPI Mandated Commands The N4963A also conforms to the Standard Commands for Programmable Instrumentation (SCPI 1999.0) command set. Two SCPI mandated commands are implemented, listed in Table 16. Clock Synthesizer 13.5 GHz User Guide...

  • Page 63: N4963A Device Commands

    Returns SCPI protocol version number (“1999.0”) 6.5 N4963A Device Commands The N4963A device commands are summarized in Table 17. The following descriptions and examples assume the user is programming with Keysight BASIC, a simple interpretative language that is convenient for instrument programming.

  • Page 64: Scpi Protocol Description

    *FWREV? 6.6 SCPI Protocol Description The N4963A supports a simple SCPI syntax. The SCPI commands are meant to be compatible with the Keysight ESG when possible. SCPI has an associated hierarchy with it. The top level is referred as the Root mode. SCPI remembers the current hierarchy so you don’t need to repeat it for subsequent commands.

  • Page 65: Command Summary

    Numeric - the use of italics indicates that the term numeric is a placeholder in the command and is described elsewhere in the text for the command. 6.7 Command Summary 6.7.1 Root Subsystem All of these commands can be called from the root level of the N4963A. Command :FREQuency numeric <unit>...
  • Page 66 The unit is Volts peak-to-peak. Optional <units> are V and mV. The N4963A features four channels, 1, 2, 3, and 4. Channels 1 and 2 are the reference and jittered output channels on the front panel. Channels 3 and 4 each refer to two differential outputs on the back panel.
  • Page 67 Set the specified channel DC offset to the given value. The unit is DC Volts. The units which are supported are V, mV, or uV. The reference and jittered outputs, channel 1 and channel 2, respectively, of the N4963A have DC offset control. Example All of the following examples are valid :OFFSet 1 500mV;...
  • Page 68 Remote GPIB Interface Description Set the phase offset of channel 1, relative to the other three channels, to a value in degrees. Command :PHASe? Description Query the phase offset of channel 1. Returns a value in degrees. Command :PREScaler value Description Set the programmable trigger prescaler to a value between 8 and 511.

  • Page 69: Source Subsystem

    { OFF | INTernal | EXTernal } Description Set the jitter of the N4963A. It is used to either turn the jitter off; or to set the jitter source to the internal source or to the external signal provided to the Jitter-In rear panel connector.
  • Page 70 Remote GPIB Interface Description Set the jitter path of the N4963A when using external jitter inputs. Low band signals are digitized and scaled by the ExtUI=[1|2|4|8|16|32] parameter which determines the maximum UI available with a full scale input signal. High band signals pass thru analog signal processing blocks, are limited to a reduced max UI value and do not receive any additional signal scaling.
  • Page 71 Remote GPIB Interface Command :JITTer:AMPLitude? Description Query the jitter amplitude of the N4963A. Clock Synthesizer 13.5 GHz User Guide...

  • Page 72: Ieee Common Capabilities

    Description Event Status Enable Query – not implemented. Command *IDN? Description Returns the manufacturers name, model number, serial number and firmware revision as a string: “KEYSIGHT TECHNOLOGIES, N4963A, SN3001, Rev01.02” Command *LRN? Description Learn Query – not implemented. Command *OPC?
  • Page 73 Remote GPIB Interface Description Option Identification Query- returns the options in the instrument as a comma delimited string. Option Result None ( an empty string ) 13.5 GHz clock Jitter Injection Command *PSC numeric Description Sets the value of the Power On Status Clear Flag. Controls the automatic clearing of the SRQ enable register see IEEE 488.2 Section 10.25.
  • Page 74 Remote GPIB Interface Description Service Request Enable – Sets the status byte mask numeric = QUES Status Summary Message Available Event Status Summary Request Service OPER status summary Command *SRE? Description Service Request Enable Query. Command *STB? Description Status Byte Query – Returns the value of the status byte in numeric form. Command *TRG Description...
  • Page 75 Remote GPIB Interface Command *TST? Description Self Test Query – not implemented. Clock Synthesizer 13.5 GHz User Guide...

  • Page 76: Perl Script To Exercise Gpib Commands

    Remote GPIB Interface 6.9 PERL Script to exercise GPIB Commands #!/usr/local/bin/perl # test all commands on N4963A use RPCINST; use strict; my($reg)=1; my($addr); #create object and load with address to the unit #add your address here my($gpib)=RPCINST->new("192.168.100.223","hpib,16"); my($result)=$gpib->iconnect(); printf "ICONNECT result = $result \n";...
  • Page 77 Remote GPIB Interface # do nothing becuse query else { printf "\n"; # check_errors(); # sleep 1; # for (my($c)=0; $c<10000; $c++) { my($wait)=1; } return $res; sub gpib_read my($string)=shift; sleep 1; my($res)=$gpib->iread(); printf " = $res"; return $res; $exit_on_errors=0; my($result)=gpib_write("*IDN?");...
  • Page 78 Remote GPIB Interface my($result)=gpib_write(":DACS 6 1000"); my($result)=gpib_write(":DACS 7 1000"); my($result)=gpib_write(":PHASE 66 "); my($result)=gpib_write(":JITTER:SOURCE INT "); my($result)=gpib_write(":AMPL 1 100mV"); my($result)=gpib_write(":AMPLITUDE 2 200mV;"); my($result)=gpib_write(":AMPL 3 300mV"); my($result)=gpib_write(":AMPL 4 0.40V"); # my($result)=gpib_write(":OFFSET 1 700mV"); # my($result)=gpib_write(":OFFSET 2 -200mV"); my($result)=gpib_write(":OUTP OFF"); my($result)=gpib_write(":FREQ 5 GHZ"); my($result)=gpib_write(":PHASE 22 ");...

  • Page 79: Returning The N4963A Clock Synthesizer To Keysight Technologies

    Synthesizer to Keysight Technologies 7 Returning the N4963A Clock Synthesizer to Keysight Technologies If the N4963A clock Synthesizer 13.5 GHz fails system verification and you cannot correct the problem, return it to Keysight Technologies for repair following the steps shown below.
  • Page 80 This information is subject to change without notice. © Keysight Technologies 2017 Edition 3.0, October 2017 www.keysight.com...

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