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SIGNALCORE SC5507A Hardware Manual

Dc - 6.25 ghz rf signal source with sensor
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Hardware Manual
SC5507A & SC5508A PSG
DC – 6.25 GHz RF Signal Source
With Sensor
www.signalcore.com
© 2019 SignalCore, Inc. All Rights Reserved

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Summary of Contents for SIGNALCORE SC5507A

  • Page 1 Hardware Manual SC5507A & SC5508A PSG DC – 6.25 GHz RF Signal Source With Sensor www.signalcore.com © 2019 SignalCore, Inc. All Rights Reserved...

  • Page 2: Table Of Contents

    Warranty ............................4 Copyright & Trademarks ........................4 International Materials Declarations ....................5 CE European Union EMC & Safety Compliance Declaration ............5 Warnings Regarding Use of SignalCore Products ................5 Physical Description ..........................6 Unpacking ............................6 Nomenclature ..........................6 Setting Up and Configuring the PSG Device ..................
  • Page 3 Register 0x1B STORE_DEFAULT_STATE (1 Byte) ..............25 Register 0x1C SELF_SYNTH_CAL (1 Byte) ................25 Register 0x1D SENSOR_SETTING (3 Byte) ................25 Register 0x1E SENSOR_FREQUENCY (7 Byte) ................ 26 Query Registers ..........................26 Rev 1.0 | SC5507A & SC5508A Hardware Manual SignalCore, Inc.
  • Page 4 General Information Register 0x20 GET_RF_PARAMETERS (1 Byte sent, 8 Bytes received) ......... 27 Register 0x21 GET_TEMPERATURE (1 Byte, 8 Bytes) ............27 Register 0x22 GET_DEVICE_STATUS (1 Byte, 8 Bytes) ............28 Register 0x23 GET_DEVICE_INFO (1 Byte, 8 Bytes) .............. 30 Register 0x24 GET_LIST_BUFFER (3 Bytes, 8 Bytes)..............

  • Page 5: General Information

    SignalCore reserves the right to make changes to subsequent editions of this document without prior notice to possessors of this edition. Please contact SignalCore if errors are suspected. In no event shall SignalCore be liable for any damages arising out of or related to this document or the information contained in it.

  • Page 6: International Materials Declarations

    SignalCore, Incorporated uses a fully RoHS compliant manufacturing process for our products. Therefore, SignalCore hereby declares that its products do not contain restricted materials as defined by European Union directive 2002/95/EC (EU RoHS) in any amounts higher than limits stated in the directive.

  • Page 7: Physical Description

    SignalCore immediately if the product appears damaged in any way. Nomenclature The name “PSG” shall be used in this document in reference to both the SC5507A and SC5508A, unless the context requires using SC5507A or Sc5508A explicitly. The SC5507A is a PXIe platform module while the SC5508A is a USB/Serial platform module.

  • Page 8: Setting Up And Configuring The Psg Device

    Figure 1. Front view of SC5508A The SC5507A is a PXIe-based RF signal source with all RF connectors located on the front face of the module. Its control I/O is via the back PXIe interface connectors. The SC5508A is a serial controlled core module, whose RF and I/O connectors are located at the front face as shown in Figure 1.

  • Page 9: Device Led Indicators

    LED Color Description Green Device is open Red Supply fault due to possible overvoltage Off Device is closed (off) Communication and Supply Connection Figure 2. Power and Digital IO Connector Rev 1.0 | SC5507A & SC5508A Hardware Manual SignalCore, Inc.

  • Page 10: Mini-Usb Connection

    TFM-115-01-L-D-RA. It also serves as the digital connector interface for RS232/SPI, trigger, and other digital signals. The pin definitions are listed in Table 3. Pinouts are different for different SignalCore products with the same connector type. Please ensure that mating connectors and cables are wired correctly before connection.

  • Page 11: Reset Button (Pin Hole)

    25 MHz to 6.25 GHz path HF ALC controller 32 dB Harmonic FracN Coarse Coarse 50MHz Step Gen Step Gen DC to 50 MHz path VCXO OCXO SENSOR Figure 3. PSG block diagram Rev 1.0 | SC5507A & SC5508A Hardware Manual SignalCore, Inc.

  • Page 12: Rf Generation

    Theory and Operation RF Generation The PSG is a true DC to 6 GHz low phase noise, low harmonics, and low spur synthesizer that uses a hybrid synthesizer architecture comprising of phase lock loops, harmonic generation, and DDS functions. Coarse tuning is accomplished by PLL and harmonic generators, while fine tuning is accomplished with the variable modulus DDS, providing exact frequency generation with resolution of 1 mHz.

  • Page 13: Internal Eeprom

    (highest or lowest) frequency and sweep backwards toward the start point, mapping out a triangular waveform on a frequency versus time graph. Rev 1.0 | SC5507A & SC5508A Hardware Manual...

  • Page 14: Dwell Time

    21, the hardware trigger pin (TRIGIN). Hardware triggering occurs on a high to low transition state of this pin. Note, hardware triggering is currently not available for the SC5507A. Hardware Trigger Modes The device may be triggered to start a sweep or list then use the next trigger to stop it. In triggered start/stop mode, alternating triggers will start and stop the sweep/list.

  • Page 15: Default Startup Mode

    Bit 2 Bit 1 Bit 0 Address Range INITIALIZE 0x01 [7:0] Open Open Open Open Open Open Open Mode Enable SYSTEM_ACTIVE 0x02 [7:0] Open Open Open Open Open Open Open ‘active’ Rev 1.0 | SC5507A & SC5508A Hardware Manual SignalCore, Inc.
  • Page 16 Hardware Registers Register Serial Register Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Address Range Disable Loop Lock SYNTH_MODE 0x03 [7:0] Open Open Open Open Open gain mode RF_MODE 0x04 [7:0] Open Open Open...

  • Page 17: Register 0X01 Initialize (1 Byte)

    0 = Normal loop gain for better close in phase noise Loop Gain 1 = Low loop gain for better far out phase noise and spur suppression Disable spur Only applies in harmonic offset mode, see bit [0]. suppression Rev 1.0 | SC5507A & SC5508A Hardware Manual SignalCore, Inc.

  • Page 18: Register 0X04 Rf_Mode (1 Byte)

    Hardware Registers Type Name Width Description 0 = The device automatically switches to fracN offset mode to avoid potentially large spurs due to intermodulation between the carrier and the harmonics of the reference clock. 1 = This disables the function and may speed up tuning speed in some cases 0 = Use lower frequency generator for frequencies <...

  • Page 19: Register 0X05 List_Mode_Config (1 Byte)

    Soft/Hardware 1 = Hardware trigger. A high-to-low transition on Trigger the TRIGIN pin will trigger the device. It can be used for both start/stop or step-on-trigger functions Rev 1.0 | SC5507A & SC5508A Hardware Manual SignalCore, Inc.

  • Page 20: Register 0X06 List_Start_Freq (7 Bytes)

    Hardware Registers Type Name Width Description 0 = Start/Stop behavior. The sweep starts and continues to step through the list for the number of cycles set, dwelling at each step frequency for a period set by the LIST_DWELL_TIME register. The sweep/list will end on a consecutive trigger. 1 = Step-on-trigger.

  • Page 21: Register 0X07 List_Stop_Freq (7 Bytes)

    This applies for both start / stop and step trigger modes. [55:32] Unused Set to zeros Rev 1.0 | SC5507A & SC5508A Hardware Manual SignalCore, Inc.

  • Page 22: Register 0X0B Reserved

    Hardware Registers Register 0x0B Reserved Type Name Width Description [7:0] Reserved Register 0x0C LIST_BUFFER_POINTS (3 Bytes) This register sets the number of frequency points to step through in the buffer list. Type Name Width Description Sets the number of frequency points to step through in the buffer list.

  • Page 23: Register 0X0E List_Buf_Mem_Trnsfer (1 Byte)

    Sets the RF1 Power level in hundreds of dB. To [14:0] RF1 Power Level set to 10.25 dB, write 1025 to this register 0 = Positive number [15] Sign bit 1 = Negative number [23:16] Unused Zeros Rev 1.0 | SC5507A & SC5508A Hardware Manual SignalCore, Inc.

  • Page 24: Register 0X12 Rf_Enable (1 Byte)

    Hardware Registers Register 0x12 RF_ENABLE (1 Byte) This register enables and disables the RF1 output power. Type Name Width Description 0 = Disables the output power RF1 Enable 1 = Enables the output power [7:1] Unused Set all bits to zero Register 0x13 RF_PHASE (7 Bytes) This register sets the phase word.

  • Page 25: Register 0X16 Rf_Standby (1 Byte)

    0.25 dB LSB for RF attenuators up to 63.75 dB, 1 [7:0] Value dB LSB for LF attenuators up to 32 dB. 0 = RF attenuators Atten select 1 = LF attenuators Rev 1.0 | SC5507A & SC5508A Hardware Manual SignalCore, Inc.

  • Page 26: Register 0X1B Store_Default_State (1 Byte)

    Hardware Registers [23:9] Unused Set to zeros Register 0x1B STORE_DEFAULT_STATE (1 Byte) This register stores the current configuration into memory. Type Name Width Description Set all bits to zero. Calling this register will store the current configuration into memory. On reset [7:0] Reserved or power-up these values are read from memory...

  • Page 27: Register 0X1E Sensor_Frequency (7 Byte)

    Buffer Address [7:0] FETCH_LIST_BUFFER 0x24 [15:8] Zeros [15:12] Buffer Address [11:8] [23:16] Zeros [23:16] FETCH_DAC_VALUE 0x25 [7:0] Zeros[7:1] Select SERIAL_OUT_BUFFER 0x26 [7:0] Zeros [7:0] RESERVED 0x27 [7:0] FETCH_SENSOR_VALUE 0x28 [7:0] Zeros [7:0] Rev 1.0 | SC5507A & SC5508A Hardware Manual SignalCore, Inc.

  • Page 28: Register 0X20 Get_Rf_Parameters (1 Byte Sent, 8 Bytes Received)

    Hardware Registers Register 0x20 GET_RF_PARAMETERS (1 Byte sent, 8 Bytes received) Write to this register the required RF parameter to query from the device. Type Name Width Description Data specifies the parameter to retrieve: 0x00 = Current RF Freq (7 valid bytes return) 0x01 = Sweep Start Freq (7 valid bytes return) 0x02 = Sweep Stop Freq (7 valid bytes return) 0x03 = Sweep Step Freq (7 valid bytes return)

  • Page 29: Register 0X22 Get_Device_Status (1 Byte, 8 Bytes)

    0 = temperature is within operation range [26] Over_temp 1 = temperature of device is too high Operate: Ext. ref 0 = no reference source detected [25] detect 1 = reference source detected Rev 1.0 | SC5507A & SC5508A Hardware Manual SignalCore, Inc.
  • Page 30 Hardware Registers Type Name Width Description Operate: List mode 0 = list mode not running [24] running 1 = list mode is running 0 = CW mode [23] Operate: RF Mode 1 = List mode Operate: sensor 0 = RMS mode [22] mode 1 = Envelope mode...

  • Page 31: Register 0X23 Get_Device_Info (1 Byte, 8 Bytes)

    Hardware Revision – typecast to 32-bit float Firmware Revision – typecast to 32-bit float [31:0] data Manufacture Date – unsigned 32-bit with following [31:24] Year (last two digits) [23:16] Month [15:8] [7:0] Hour Rev 1.0 | SC5507A & SC5508A Hardware Manual SignalCore, Inc.

  • Page 32: Register 0X24 Get_List_Buffer (3 Bytes, 8 Bytes)

    Hardware Registers Type Name Width Description [63:32] Invalid Data Register 0x24 GET_LIST_BUFFER (3 Bytes, 8 Bytes) Write to this register to query 8 bytes of data from the calibration EEPROM at the starting address. Type Name Width Description [15:0] Buffer Address The data point (0 –...
  • Page 33 SC5507A & SC5508A Hardware Manual Section 2 Communication Interfaces Rev 1.0 | SC5507A & SC5508A Hardware Manual SignalCore, Inc.

  • Page 34: Communication Interfaces

    Communication Interfaces 5 Communication Interfaces The SC5507A has a PXI express interface, while the SC5508A has 2 communication interfaces: 1. USB and SPI 2. USB and RS232 This section will examine the communication aspects of the product, focusing on data transfer to and from the device on each interface.

  • Page 35: Spi Interface

    = 0.2 ����), however, if the external SPI signals do not have sufficient rate may be as high as 5.0 MHz (T integrity due to trace issues, the rate should be lowered. Rev 1.0 | SC5507A & SC5508A Hardware Manual SignalCore, Inc.

  • Page 36: Writing The Spi Bus

    Communication Interfaces Byte N (MSB) DATA 8 Bit Command/ Reg. Address Byte N-1 (LSB) Figure 5. SPI timing. As mentioned above, the SPI architecture limits the byte rate since after every byte transfer the input and output SPI buffers need to be cleared and loaded respectively by the device SPI engine. Data is transferred between the input buffer and internal register buffers.

  • Page 37: Rs232 Interface

    Information for writing to the configuration registers is provided in Table 6. Configuration Registers. Upon the execution of the register Rev 1.0 | SC5507A & SC5508A Hardware Manual SignalCore, Inc.

  • Page 38: Reading From The Device Via Rs232

    A simple driver using IO controls should be sufficient to read and write byte data to this block of addresses. Although SignalCore provides the driver and API for these products, information is provided here for users who may need to write drivers for a different operating system or a different driver.

  • Page 39: Writing To The Device

    8. All 8 bytes must be read to fully clear the transfer buffer. The first byte read is the most significant byte. Rev 1.0 | SC5507A & SC5508A Hardware Manual...

  • Page 40: Revision Table

    Revision Table Revision Table Revision Revision Date Description 2/26/2019 Document Created 5/16/2019 Initial Release ©2019 Rev 1.0...

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