SLS JT-DO1 User Manual

Gps-disciplined irig-b timecode generator

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Summary of Contents for SLS JT-DO1

  • Page 2 The standard JT-DO1 timecode generator includes an integrated patch antenna. For indoor applications, or other applications where the device does not have a clear-sky field of view, the JT-DO1 is available with an additional coaxial input to support the connection of an external GPS antenna.
  • Page 3 Physical An annotated underside view of the JT-DO1 timecode generator is shown in Figure 1. The JT-DO1 chassis is machined from UV-resistant black Delrin with machined 6061 aluminum front and rear panels. The footprint of the unit is 4.62-in (L) by 2.12-in (W). The chassis height is 1.0-in. The chassis is drilled with four 0.2-in mounting holes (two on each flange).
  • Page 4 Connections Annotated views of the front and rear panels of the JT-DO1 timecode generator are shown in Figure 2 and Figure 3. The front panel provides 50 Ω SMA female connectors for the IRIG-B DCLS output and the 1 PPS output. In addition, the front panel provides three LED indicators for power (solid red), GPS lock status (solid green), and PPS (flashing blue).
  • Page 5 ° Operation The JT-DO1 is powered from a DC source with acceptable input voltage range from 4.5 V to 18 V applied to the rear panel screw terminal connector (see Figure 3). On power-up, the device will immediately begin the process of locking to the satellite constellation. When a GPS lock has been...
  • Page 6 LED indicator will begin flashing in sync with the PPS output. The JT-DO1 provides both buffered IRIG-B and PPS outputs from the front panel SMA connectors. Both outputs can drive a 50 Ω load (nominally 2.75 V into a 50 Ω load and 3.3 V into a high-impedance load).

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