Trenz Electronic TE0808 TRM Manual

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TE0808 TRM

Revision v.32

Exported on 2019-03-18

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https://wiki.trenz-electronic.de/display/PD/TE0808+TRM

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Page 1 TE0808 TRM Revision v.32 Exported on 2019-03-18 Online version of this document: https://wiki.trenz-electronic.de/display/PD/TE0808+TRM...
Page 2: Table Of Contents
Voltage Monitor Circuit ............................32 Power Rails................................32 Bank Voltages............................... 33 B2B connectors ..............................35 Features................................35 Connector Stacking height ..........................35 Current Rating ..............................36 Connector Speed Ratings ............................ 36 Copyright © 2019 Trenz Electronic GmbH 2 of 46 http://www.trenz-electronic.de...
Page 3 Data privacy ................................. 45 13.2 Document Warranty............................. 45 13.3 Limitation of Liability............................45 13.4 Copyright Notice ..............................45 13.5 Technology Licenses............................45 13.6 Environmental Protection ........................... 45 13.7 REACH, RoHS and WEEE ............................45 Copyright © 2019 Trenz Electronic GmbH 3 of 46 http://www.trenz-electronic.de...
Page 6: Overview
4 Overview The Trenz Electronic TE0808 is an industrial-grade MPSoC SoM integrating a Xilinx Zynq UltraScale+ MPSoC, up to 8 GBytes of DDR4 SDRAM via 64-bit wide data bus, max. 512 MByte Flash memory for configuration and operation, 20 Gigabit transceivers and powerful switch-mode power supplies for all on-board voltages.
Page 8: Main Components
14. Ultra fine 0.50 mm pitch, Razor Beam™ LP Slim Terminal Strip with 160 contacts, J3 15. Ultra fine 0.50 mm pitch, Razor Beam™ LP Slim Terminal Strip with 160 contacts, J1 16. Quartz crystal, Y2 Copyright © 2019 Trenz Electronic GmbH 8 of 46 http://www.trenz-electronic.de...
Page 9: Initial Delivery State
Storage device name Content Notes SPI Flash main array Not programmed eFUSE Security Not programmed Si5345A programmable PLL NVM OTP Not programmed Table 1: Initial Delivery State of the flash memories. Copyright © 2019 Trenz Electronic GmbH 9 of 46 http://www.trenz-electronic.de...
Page 10: Signals, Interfaces And Pins
VCCO47 VCCO pins max. 3.3V B47_L12_ J3-43, usable as J3-44 single- B47_L1_N ended I/ B47_L12_ B48_L1_P 24 I/Os VCCO48 VCCO pins max. 3.3V B48_L12_ J3-15, usable as J3-16 single- B48_L1_N ended I/ B48_L12_ Copyright © 2019 Trenz Electronic GmbH 10 of 46 http://www.trenz-electronic.de...
Page 11 48 I/Os VCCO66 VCCO pins max. 1.8V B66_L24_ J1-90, usable as J1-120 single- B66_L1_N ended I/ B66_L24_ B_66_T0 .. . B_66_T3 MIO13 ... 13 I/Os PS_1V8 User MIO25 configura ble I/Os on B2B Copyright © 2019 Trenz Electronic GmbH 11 of 46 http://www.trenz-electronic.de...
Page 12: Mgt Lanes
(Xilinx GTH / GTR transceiver) available composed as differential signaling pairs for both directions (RX/TX). The MGT banks have also clock input-pins which are exposed to the B2B connectors J2 and J3. Following MGT lanes are available on the B2B connectors: https://shop.trenz-electronic.de/de/Download/?path=Trenz_Electronic/Pinout Copyright © 2019 Trenz Electronic GmbH 12 of 46 http://www.trenz-electronic.de...
Page 13 J1-56, J1-58 PLL clock generator U5 to B228_RX1_P, bank's pins N8/N7 B228_RX1_N, pins J1-63, J1-65 B228_TX1_P, B228_TX1_N, pins J1-62, J1-63 B228_RX0_P, B228_RX0_N, pins J1-69, J1-71 B228_TX0_P, B228_TX0_N, pins J1-68, J1-70 Copyright © 2019 Trenz Electronic GmbH 13 of 46 http://www.trenz-electronic.de...
Page 14 J1-32, J1-34 PLL clock generator U5 to B229_RX1_P, bank's pins J8/J7 B229_RX1_N, pins J1-39, J1-41 B229_TX1_P, B229_TX1_N, pins J1-38, J1-40 B229_RX0_P, B229_RX0_N, pins J1-45, J1-47 B229_TX0_P, B229_TX0_N, pins J1-44, J1-46 Copyright © 2019 Trenz Electronic GmbH 14 of 46 http://www.trenz-electronic.de...
Page 15 J1-8, J1-10 PLL clock generator U5 to B230_RX1_P, bank's pins E8/E7 B230_RX1_N, pins J1-15, J1-17 B230_TX1_P, B230_TX1_N, pins J1-14, J1-16 B230_RX0_P, B230_RX0_N, pins J1-21, J1-23 B230_TX0_P, B230_TX0_N, pins J1-20, J1-22 Copyright © 2019 Trenz Electronic GmbH 15 of 46 http://www.trenz-electronic.de...
Page 16 J2-31, J2-33 PLL clock generator U5 to B128_RX1_N, bank's pins F25/ B128_RX1_P, pins J2-40, J2-42 B128_TX1_N, B128_TX1_P, pins J2-37, J2-39 B128_RX0_N, B128_RX0_P, pins J2-46, J2-48 B128_TX0_N, B128_TX0_P, pins J2-43, J2-45 Copyright © 2019 Trenz Electronic GmbH 16 of 46 http://www.trenz-electronic.de...
Page 17: Jtag Interface
Table 3: B2B connector pin-outs of available MGT lanes of the MPSoC. 5.3 JTAG Interface JTAG access is provided through the MPSoC's PS configuration bank 503 with bank voltage PS_1V8. JTAG Signal B2B Connector Pin J2-120 J2-122 J2-124 J2-126 Copyright © 2019 Trenz Electronic GmbH 17 of 46 http://www.trenz-electronic.de...
Page 18: Configuration Bank Control Signals
Table 5: B2B connector pin-out of MPSoC's PS configuration bank. 5.5 Analog Input The Xilinx Zynq UltraScale+ MPSoC provides differential pairs for analog input values. The pins are exposed to B2B- connector J2. https://www.xilinx.com/support/documentation/user_guides/ug1085-zynq-ultrascale-trm.pdf https://www.xilinx.com/support/documentation/user_guides/ug570-ultrascale-configuration.pdf Copyright © 2019 Trenz Electronic GmbH 18 of 46 http://www.trenz-electronic.de...
Page 19: Quad Spi Interface
SPI Flash IO3 SPI Flash IO2 SPI Flash IO0 SPI Flash IO3 SPI Flash CS SPI Flash CLK Table 7: PS MIO pin assignment of the Quad SPI Flash memory ICs. Copyright © 2019 Trenz Electronic GmbH 19 of 46 http://www.trenz-electronic.de...
Page 20: Boot Process
Supports USB 2.0 and USB 3.0. PJTAG_0 MIO[29:26] PS JTAG connection 0 option. SD1-LS MIO[51:39] Supports SD 3.0 with a required SD 3.0 compliant level shifter. Table 9: Selectable boot modes by dedicated boot mode pins. Copyright © 2019 Trenz Electronic GmbH 20 of 46 http://www.trenz-electronic.de...
Page 21 TE0808 TRM Revision: v.32 For functional details see ug1085 - Zynq UltraScale+ TRM (Boot Modes Section) https://www.xilinx.com/support/documentation/user_guides/ug1085-zynq-ultrascale-trm.pdf Copyright © 2019 Trenz Electronic GmbH 21 of 46 http://www.trenz-electronic.de...
Page 22: On-Board Peripherals
Notes On-board Oscillator (U25) 25.000000 B2B Connector pins J2-4, J2-6 (differential pair) User AC decoupling required on base B2B Connector pins J3-66, J3-68 (differential User AC decoupling pair) required on base https://www.xilinx.com/support/documentation/data_sheets/ds925-zynq-ultrascale-plus.pdf Copyright © 2019 Trenz Electronic GmbH 22 of 46 http://www.trenz-electronic.de...
Page 23 B2B Connector Pin Function PLL_FINC J2-81 Frequency increment. PLL_LOLN J2-85 Loss of lock (active-low). PLL_SEL0 / PLL_SEL1 J2-93 / J2-87 Manual input switching. PLL_FDEC J2-94 Frequency decrement. PLL_RST J2-89 Device reset (active-low) Copyright © 2019 Trenz Electronic GmbH 23 of 46 http://www.trenz-electronic.de...
Page 24: Oscillators
DONE signal (PS This LED goes ON when power has been applied to the Configuration Bank module and 503) stays ON until MPSoC's programmable logic is configured properly. Table 14: LED's description. http://www.silabs.com/products/timing/clocks/high-performance-jitter-attenuators/device.si5345a Copyright © 2019 Trenz Electronic GmbH 24 of 46 http://www.trenz-electronic.de...
Page 25: Power And Power-On Sequence
The maximum power consumption of a module mainly depends on the design which is running on the FPGA. Xilinx provide a power estimator excel sheets to calculate power consumption. It's also possible to evaluate the power consumption of the developed design with Vivado. See also Trenz Electronic Wiki Power Input Pin...
Page 26: Power Distribution Dependencies
There are following dependencies how the initial voltages of the power rails on the B2B connectors are distributed to the on-board DC-DC converters, which power up further DC-DC converters and the particular on-board voltages: Copyright © 2019 Trenz Electronic GmbH 26 of 46...
Page 27 Revision: v.32 Figure 3: Power Distribution Diagram.  Current rating of Samtec Razor Beam LP Terminal/Socket Strip ST5/SS5 B2B connectors is 1.5 A per pin (1 pin powered per row). Copyright © 2019 Trenz Electronic GmbH 27 of 46 http://www.trenz-electronic.de...
Page 28: Power-On Sequence Diagram
Following diagram describes the sequence of enabling the three power instances utilizing the DC-DC converter control signals (Enable, Power-Good), which will power-up in descending order as listed in the blocks of the diagram. Copyright © 2019 Trenz Electronic GmbH 28 of 46 http://www.trenz-electronic.de...
Page 29: Operation Conditions Of The Dc-Dc Converter Control Signals
8.4 Operation Conditions of the DC-DC Converter Control Signals The control signals have to be asserted on the B2B connector J2, whereby some of the Power-Good signals need external pull-up resistors. Copyright © 2019 Trenz Electronic GmbH 29 of 46 http://www.trenz-electronic.de...
Page 30 J2-114 4K7, pulled data up to sheet DCDCIN EN_PSG J2-84 DCDCIN NC7S08 PG_PSG J2-82 Externa TPS748 l pull- 01 data data sheet sheet needed (max. 5.5V), max. sink current 1 mA Copyright © 2019 Trenz Electronic GmbH 30 of 46 http://www.trenz-electronic.de...
Page 31 See Xilinx datasheet DS925 for additional information. User should also check related base board documentation when intending base board design for TE0808 SoM. https://www.xilinx.com/support/documentation/data_sheets/ds925-zynq-ultrascale-plus.pdf Copyright © 2019 Trenz Electronic GmbH 31 of 46 http://www.trenz-electronic.de...
Page 32: Voltage Monitor Circuit
153, 155, 157, LP_DCDC 138, 140, 142, Input PS_BATT Input GT_DCDC 157, 158, 159, Input PLL_3V3 Input (programma ble PLL) 3.3V nominal input SI_PLL_1V8 Output Internal voltage level 1.8V nominal output Copyright © 2019 Trenz Electronic GmbH 32 of 46 http://www.trenz-electronic.de...
Page 33: Bank Voltages
VREF_64, pin J4-88 max. 1.8V VCCO65, J4-69, J4-105 user VREF_65, pin J4-15 max. 1.8V VCCO66, J1-90, J1-120 user VREF_66, pin J1-108 max. 1.8V PS_1V8 1.8V PS_1V8 1.8V PS_1V8 1.8V CONFIG PS_1V8 1.8V Copyright © 2019 Trenz Electronic GmbH 33 of 46 http://www.trenz-electronic.de...
Page 35: B2B Connectors
Number to stacking height 27219 REF192552- SS5-80-3.50- Baseboard 3.5mm Standard L-D-K-TR connector connector used on modules 27018 REF-189545- SS5-80-3.00- Baseboard 3 mm Assembly L-D-K-TR connector option on request https://www.samtec.com/products/st5 https://www.samtec.com/products/st5 Copyright © 2019 Trenz Electronic GmbH 35 of 46 http://www.trenz-electronic.de...
Page 36: Current Rating
(0.197") stack heights. The data in the reports is applicable only to the 4mm and 5mm board-to-board mated connector stack height. 9.5 Manufacturer Documentation Geändert 30 05, 2017 by Susanne Kunath https://wiki.trenz-electronic.de/display/~s.kunath Copyright © 2019 Trenz Electronic GmbH 36 of 46 http://www.trenz-electronic.de...
Page 37 13 11, 2017 by John Hartfiel 13 11, 2017 by John Hartfiel 13 11, 2017 by John Hartfiel 13 11, 2017 by John Hartfiel https://wiki.trenz-electronic.de/display/~s.kunath https://wiki.trenz-electronic.de/display/~j.hartfiel https://wiki.trenz-electronic.de/display/~j.hartfiel https://wiki.trenz-electronic.de/display/~j.hartfiel https://wiki.trenz-electronic.de/display/~j.hartfiel https://wiki.trenz-electronic.de/display/~j.hartfiel https://wiki.trenz-electronic.de/display/~j.hartfiel https://wiki.trenz-electronic.de/display/~j.hartfiel Copyright © 2019 Trenz Electronic GmbH 37 of 46 http://www.trenz-electronic.de...
Page 38: Variants Currently In Production
EG-1ED TE0808-04-09 XCZU9EG-2FFV -40°C - 100°C Industrial Temperature Range EG-2IB C900I (1) Note: Lower B2B connector profile,check distance bolt of between module and carrier Table 19: Differences between variants of Module TE0808-04 Copyright © 2019 Trenz Electronic GmbH 38 of 46 http://www.trenz-electronic.de...
Page 39: Technical Specifications
Receiver (RXP/RXN) and -0.5 Xilinx DS925 data sheet transmitter (TXP/TXN) absolute input voltage Voltage on input pins of -0.5 VCC + 0.5 NC7S08P5X data sheet, NC7S08P5X 2-Input AND see schematic for VCC Gate Copyright © 2019 Trenz Electronic GmbH 39 of 46 http://www.trenz-electronic.de...
Page 40: Recommended Operating Conditions
Xilinx DS925 data sheet PLL_3V3 3.14 3.47 Si5345/44/42 data sheet 3.3V typical VCCO for HD I/O banks 1.14 Xilinx DS925 data sheet VCCO for HP I/O banks 0.95 Xilinx DS925 data sheet Copyright © 2019 Trenz Electronic GmbH 40 of 46 http://www.trenz-electronic.de...
Page 41: Operating Temperature Ranges
• Mating height with standard connectors: 4mm • PCB thickness: 1.6mm • Highest part on PCB: approx. 3mm. Please download the step model for exact numbers All dimensions are given in millimeters. https://www.xilinx.com/support/documentation/data_sheets/ds925-zynq-ultrascale-plus.pdf Copyright © 2019 Trenz Electronic GmbH 41 of 46 http://www.trenz-electronic.de...
Page 43: Revision History
• correction MGT Lane assignment 2019-03-18 page 6) v.30 Martin • Corrected clock connection to J2 07.01.2019 Rohrmüller v.29 John Hartfiel • Notes for power supply 20.11.2018 https://shop.trenz-electronic.de/de/Download/?path=Trenz_Electronic/TE0808/REV04 https://shop.trenz-electronic.de/de/Download/?path=Trenz_Electronic/TE0808/REV03 https://shop.trenz-electronic.de/de/Download/?path=Trenz_Electronic/TE0808/REV02 https://wiki.trenz-electronic.de/display/~j.hartfiel Copyright © 2019 Trenz Electronic GmbH 43 of 46 http://www.trenz-electronic.de...
Page 44 Vitali Tsiukala Changed signals count in the B2B connectors table • PCB REV04 Initial release 2017-08-15 v.11 John Hartfiel, Ali • update boot mode section Naseri 2017-02-06 Jan Kumann Initial document Copyright © 2019 Trenz Electronic GmbH 44 of 46 http://www.trenz-electronic.de...
Page 45: Disclaimer
13.3 Limitation of Liability In no event will Trenz Electronic, its suppliers, or other third parties mentioned in this document be liable for any damages whatsoever (including, without limitation, those resulting from lost profits, lost data or business interruption) arising out of the use, inability to use, or the results of use of this document, any documents linked to this document, or the materials or information contained at any or all such documents.
Page 46 TE0808 TRM Revision: v.32 Trenz Electronic is a manufacturer and a distributor of electronic products. It is therefore a so called downstream user in the sense of REACH . The products we supply to you are solely non-chemical products (goods). Moreover and under normal and reasonably foreseeable circumstances of application, the goods supplied to you shall not release any substance.

Trenz Electronic TE0808 TRM Manual

1 Table of Contents

2 Table of Figures

3 Table of Tables

4 Overview

5 Signals, Interfaces and Pins

6 Boot Process

7 On-Board Peripherals

8 Power and Power-On Sequence

9 B2B Connectors

10 Variants Currently in Production

11 Technical Specifications

12 Revision History

13 Disclaimer

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Summary of Contents for Trenz Electronic TE0808 TRM

Table of Contents