Tektronix P7001 /IEEE 488 Instruction Manual
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Tektronix P7001 /IEEE 488 Instruction Manual

Tektronix P7001 /IEEE 488 Instruction Manual

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Tektronix,
Inc.
PO.
Box 500
97077
Beaverton, Oregon
070-2623-00
Product Group
45
Tektronix®
PLEASE CHECK FOR CHANGE
AT
REAR OF
THE
P7001 /|EEE 488
INTERFACE
021
INSTRUCTION MANUAL
Serial Number
COMMITTEDTO
EXCELLENCE
INFORMATION
THIS MANUAL.
-0206-00
First Printing JUL 1978
Revised DEC 1986

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  • Page 1 Tektronix® COMMITTEDTO EXCELLENCE PLEASE CHECK FOR CHANGE INFORMATION REAR OF THIS MANUAL. P7001 /|EEE 488 INTERFACE -0206-00 INSTRUCTION MANUAL Tektronix, Inc. Box 500 97077 Serial Number Beaverton, Oregon First Printing JUL 1978 070-2623-00 Product Group Revised DEC 1986...
  • Page 2 Those manufactured unique States have The country United unique digits. manufacture identified follows: 8000000 Beaverton, Oregon, Tektronix, Inc., 100000 Channel islands Tektronix Guernsey, Ltd., 200000 Tektronix United Kingdom, Ltd., London 300000 Sony/Tektronix, Japan 700000 Tektronix Holland. Heerenveen. Netherlands...

  • Page 3: Table Of Contents

    CONTENTS TABLE SECTION GENERAL INFORMATION SECTION INSTALLATION SECTION PROGRAMMING INFORMATION WARNING SERVICING INSTRUCTIONS THE FOLLOWING ARE FOR USE PERSONNEL ONLY. QUALIFIED AVOID PERSONAL INJURV, SERVICING THAT CONTAINED NOT PERFORM OTHER THAN INSTRUCTIONS OPERATING UNLESS QUALIFIED SECTION MAINTENANCE SECTION DIAGRAMS SECTION REPLACEABLE PARTS APPENDIX DATA SHEETS...
  • Page 4 262531‘ P7001/IEEE 488 INTERFACE...
  • Page 5 P7001/IEEE Interface Section GENERAL INFORMATION INTRODUCTION information This contains both maintenance operationaI manuaI Interface, Part Tektronix Tektronix This 021—0206-00. P7001/IEEE in— terface to interconnect Processor section Tektronix used P7001 of severaI with Tektronix manufac- DigitaI Processing Osci110$cope (DPO) tured devices...
  • Page 6 P7001/IEEE Interface Interface Table CapabiIity P7001/IEEE 1—1 Interface Function Section Interface Std. CapabiIity IEEE Source Handshake(SH) CompIete(SH1) Acceptor Handshake(AH) CompIete(AH1) TaIker(T) “TaIk Only” Mode(T6) ”Listen Listener(L) OnIy” Mode(L4) Service Request(SR) CompIete (SR1) Remote—LocaI(RL) None(RLfl) ParaIIeI PoII(pP) N0ne(PP¢) Device CIear(DC) None(DCQ) Device Trigger(DT) None(DTg)

  • Page 7: Device Address Switch Sw412

    P7001/IEEE lnterlace Section INSTALLATION INTRODUCTION section contains information for the This operator/user manual to interconnect the Tektronix Interface, Processor used P7001/IEEE P7001 section Tektronix Digital Oscilloscope with Processing (DPO) IEEE instructions for selecting device. Included are Device compatible facilitates that...

  • Page 8: The P123

    P7001/IEEE Interface (Continued) SELECTING DEVICE ADDRESS five bits is set five rocker of the corresponding Each left Significant Digit) to right switches, numbered (Least that this the order Significant Digit). is reversed Note from (Most the top, rocker are read. switch which numbers...

  • Page 9: Interface Installation

    With P7001 power until Processor in slowly firmly seated. assembly press installation interface Tighten both screws. either cable Part Connect (Tektronix 488 bus IEEE interface with secure assembly 012-0630—01) thumb— screws. that Prior to removal, ensure power installation terface fully thumbscrews disengaged.

  • Page 10: Ieee 488 Bus

    Figure shows con- IEEE 2—4 line nector signal nomenclature. pin arrangement interface also includes the cable, Tektronix mating connector Part cable). This connector (standard meter 012-0630—01 IEEE interface side to double—sided, with with connector male mate...

  • Page 11: Strap Option 2

    P7001/IEEE Interface Section INFORMATION PROGRAMMING INTRODUCTION contains information section operator/user both This of the manual utilizing the Tektronix nature specific type of system general controller. Included commands and command 4051 Graphic system System as control under from 488 com- formats...

  • Page 12: Status Word

    P7001/IEEE Interface On/Initialization (Continued) Power instructions are included interrupt handling program, other controller service the interrupt, does reason some interface cleared. This using the must accomplished ”DCLb“ later this section. explained command Status Word indicate controller to the Status used reason Word solicited...
  • Page 13 P7001/IEEE Interface Interrupts with the Servicing 4051 issues service request interrupt through When (SRQ) finish current interface, executing 4051 normally programmed transfer routine, in the statement, then interrupt handling shown following example: lflfl 0N SRQ THEN N,M;4;5;1 50¢ POLL 51¢ PRINT 6$¢,7¢¢,8QQ GOTO...
  • Page 14 Sec— this ”Standard” tion option operating manual. provides modes, operation is defined Standard operation operation. ”Optional” be— controller, Tektronix such as 4051. Optional tween controllers, with Hewlett-Packard such as should used operation transfer less time, core, ease programming. 9825,...
  • Page 15 hflenace P7001HEEE Option (Continued) Strap illustrated terminators is the delimiters in Figure 3-1, which last transfer data four elements of from shows (waveform) controller. is set for “Standard”. strap option Termination Waveform Characters Elemi 511 Elemeht Elemi Elem.I Data Cbntroller Delimiter Characters 262335 Transfer Delimiters...
  • Page 16 lnterlace P7001/IEEE (Continued) COMMAND FORMAT consists of the Listen format This Address, command three character read then mnemonic from Query Commands [i.e., of Table followed question mark (MLA)(DAB?)]. by a that asks (the This question command DPO) until will able to from "Read answer...
  • Page 17 P7001/IEEE Interface DESCRIPTIONS COMMAND controller structured from Commands IEEE ways. transfer data status Setting used DPD, Commands structured threeacharacter followed blank mnemonic space, (the character des- used enclosed quotation marks, such as ”ADRW" in Table blank space). Setting shown ignate Commands 3—1.

  • Page 18: P7001 4K

    Hold DPD. later, performed using the commands explained ”STOb" ”HOLb” executed manually Front from Panel (see Operators Manual, Tektronix 070-1599-00). after single blank space mnemonic, such as command ”DPAb" "DPCb" indicates transfer data from 4051 DPD. command de—...

  • Page 19: Dpo Card

    P7001/IEEE Interface (Continued) Commands DPA, DPB, AND DPD followed mnemonics by a When command DPA, DPB, ques— interface data to allow tion mark, such as "DPA?" ”DPC?”, controller other list— transferred from IEEE ele- line dimensions the following ener. 4051 example, to the sets...
  • Page 20 P7001/IEEE Interface Commands of data to transferred (Data) allow elements commands from with beginning address pointed Address DPO, After execution of these (set with Register command). commands, ”ADRb” Address Register advanced decimal 512. line the following the array dimensions 4051 example, line line...

  • Page 21: Location Of

    P7001/IEEE Interface (Continued) Commands dimensioned to following 4051 example, array line standard elements in elements, (note waveform array first therefore this is line quarter of only whole waveform). 110, is selected the beginning of starting address. Line Waveform first line sets output the data, data...
  • Page 22 lnteriace P7001/IEEE l5" "'0’" PLUG-IN READOUT Hum: VEF‘T VET" HOR'Z HORII PLUG-IN NEAOOUT LEFY NICHT VENT' HONIZ VENT WORDPDS'"°NS CN‘NNEL‘ C"‘NNE¥‘ CHANNEL‘ WONOPosnIONs CHANNELI CNANNELI CHANNELI CHANNEL! CHANNELI —> I12]:[.Is]s|y[.!s|m Ilallflsla 444491", Ilzlaltlsls suns M31: sHylnghu'I TIME SLOTS IlaHm IHITI 2|:[I[s|51y|a]s[m;.]2|a|4 5[s]7|.
  • Page 23 Registers is explained in subsequent Line paragraphs. sets Interface Field to display Readout residing message Waveform ”;3456 PRINT @1:”ADR STILL 11¢ PRINT @1:"SCL “;"TEKTRONIX OSCILLOSCOPES” THE BEST MAKES ”;7296 PRINT @1:“ADR @1:”0CT ","Q40100" PRINT NOTE registers This other does command Converter,...
  • Page 24 P7001/IEEE Interiace Address: 7fl4¢ MML..[..1..|..1..T..11L.1.1.].fl.1_.] LV-J DI§LAV ”URCE W N0 CNANGE m... PLUG-INS memonvmml CALL 9-15 DECIMAL —__—__J DWARV CODED mun—mu WBUSV 1‘ «on: ” HOLD STORE SEND RECEIVE § Una) SINGLE SWEEP HESEY CVU- SET BY RESET AND ARM SWEEP ‘...

  • Page 25: Status Register Bit

    7424; Readout 7296; Display installed), 6912. Front Panel, Hardware Signal Averager 7046; 7168; involved in controlling Further information registers (Tektronix Part Processor in the 070-1882—00), found Manual P7001 Converter Hold Manual Manual (O70—1809-00), P7001 Sample P7001 & Interface...

  • Page 26: Operation

    P7001/IEEE Interlace Commands (Octal) or receive octal used send commands represent— ations of 16-bit Status Status Register (see Figures Words octal that 3-5 and to ease form used Note programming. 3—6). octal treated enclosed in charact- numbers must quotation marks (i.e., literal).

  • Page 27: Commands

    Operators speed Part starting under page 2-2 head— Manual (Tektronix 070—1599-00) step uses Each 4051 LOOP approxi— ”SAMPLE CONVERTER”. HOLD A—D & lines milliseconds. Therefore, above example mately 4.5...
  • Page 28 X—Y vertical input). display (horizontal input " PRINT @1:”X—Y Controlling the Hardware Signal Averager (HSA) instal- Part Hardware Signal Averager (Tektronix 644—0092-00) controlled (the with led in the and "HISb" com- ”HAVb” DPO, HSA) selects mode, places averaging mands.
  • Page 29 P7001/IEEE Interface Interrupts Front Panel front buttons 1-15 panel pushed, When PROGRAM CALL controller is generated, then should to conduct programmed serial to the status poll. indicating poll decimal word response that buttons order find of the pushed. which CALL PROGRAM button the following...
  • Page 30 P7001/IEEE Interface Command (i.e., the function of the performs ”CLIb“ command "DCLb" command clears front buttons). interrupts re—enables panel CALL DPO PROGRAM interface addition, execution of through commands a ”DCLb” initializes initialization, (sets Address Register, firmware default default This to the sets all with mode.
  • Page 31 P7001/IEEE lnierface Scaling Data Acquiring to acquire data routine is from following example subtract reference, to appropriately scale the data. zero DPO, left slot vertical this that assumed example, plug—in being used. mainframe 7704A W(512) PRINT @1:”STO "g”B” NEXT I ”;“B”...
  • Page 32 P7001/IEEE Interface Seiecting Dispiay Source se1ector buttons of foilowing routine “DISPLAY SOURCE” changes UPC: ";7w4o PRINT @1:“ADR @1:"0CT?” PRINT @1:s$ INPUT S$=REP(“X",2,1) ";S$ PRINT @1:”0CT (both). 1ine 4b, (memory), (p1ug—ins), Where: lines acquire the current the foregoing exampie, through repiaces the of the Status binary...
  • Page 33 WARNING THE FOLLOWING SERVICING INSTRUCTIONS PERSONNEL ARE FOR USE BY QUALIFIED PERSONAL INJURY, AVOID ONLY. SERVICING OTHER THAN THAT PERFORM OPERATING INSTRUCTIONS CONTAINED UNLESS QUALIFIED SAFETY SUMMARY REFER TO OPERATORS SERVICE SAFETY SUMMARY PRIOR TO SERVICE. PERFORMING...
  • Page 35 Instrumentation” required for comprehensive understand— Programmable functions further signals. information IEEE on P7001 data Service control signals, Processor (Tektronix P7001 Manual Interface Service Part Part (Tektronix and P7001 Main Manual No. 070—1882—00) Motorola's Signals associated with the are explained 070—1604-00).
  • Page 36 P7001/IEEE Interface DECODING, IEEE P7001 BUFFERING, INTERFACE INTERFACE TIMING & LOGIC LOGIC BUS, DATA CONTROL LINES, JU<O>< JU<O>< ADDRESS LINES, <:> ADDRESS 8<t:> IEEE <:::::> CONTROL ————————————_—— <:i> PROM L___.__—.—_——_—..—— PIA/P7001 BOARD MPU/GPIB BOARD “ 2623-0 Basic BIock Diagram Figure 4—1.
  • Page 37 P7001/IEEE Interface (Continued) BASIC BLOCK DESCRIPTION DIAGRAM "listener” tion is to the then adapted before second group of PIA's bus by interface. buffered of the being DEFINITIONS BLOCK SIGNAL DIAGRAM definitions introduction signaI provided foiiowing as an Functionai used BIock Diagram (Figures signaI and 4—4)
  • Page 38 P7001/IEEE Interface (Motorola Signals (Continued) this is tied input to clock $2- Data Enable; Three—state Address outputs. through data Bi—directional bus. through Control inputs, Avail- and Three—State HAET, TSC, HALT able output, are not used. 4-4) Signals (Refer Figure P7001 (least Bits significant)
  • Page 39 P7001/IEEE Interface Interface Internal Signals, (Continued) GPIB transceivers. control logic circuitry out—enable enabling signal from Bits Buffered Data through through test Interface signals, part Tx, ClkX operation. RSZ32C Internal Signals, 4-3) Control (Refer to Figure & Bits Data from through through MPU.

  • Page 40: P7001/Ieee

    lntertace P7001/IEEE Internal Signals, (Continued) P7001 Common - Data from bus. DIhlwthrough P7001 common bus. Data P7001 DOUT'0through DOUT 15— common data Latched from bus. through P7001 PD15 common — Internal Signals, (Refer to Figure 4—4) control logic enable enables Signal from RAM.
  • Page 41 P7001/IEEE Interface 8-bit static contains the read/ The 512 Access (Random Memory) write registers for interface, including Address Register, ta Register, Status Register, output buffers for the input GPIB. Detailed information these will Motorola's chips found Data MCM6810A this Sheets, found rear manual,...
  • Page 42 lnterlace P7001/IEEE (Continued) GPIB INTERFACE control interface data control signals Bus. between IEEE interface signals are generated from except or accepted management NRFD control. under firmware control of the limited under hardware because time in which NRED controller. is asserted control—...
  • Page 43 P7001/IEEE Interface cH‘fiEfi DATA DATA GRANT SELECT wssmv CONTROLLER SYNC SYNC ACK DATA MODE fl DONE 4-2A. Figure Read Operation P7001 Bus DATA DATA GRANT SELECT WSBWY dfifimitfir§mf sVNC EEK fiWfiTMmt DONE will time-out than 3.5usec, P7001 3.5usec greater max; IVOQUES: error).
  • Page 44 lnteriace P7001/IEEE (Continued) P7001 INTERFACE disconnect the addressed, wi]] Front Pane] being P7001 that disturbed Interface mi]]iseconds cannot Contro] Logic for that mi]]iseconds. the operation "write", the Front P700] Pan— the appropriate operation. ]atch the status Front wi]] word and perform sets to the...
  • Page 45 _<=uC\Q_u_w mCZO._._OZ>_. Od<om wO>mU «SEEP WPOOK ,OOEZEII 2.903.92— «< EoUmzzou IIIII .53. < 23:13 .rwwwx EMBED} 53x: 55-83 Emigm «e Salmon 180m :<uw( Emma kmmwm o<ua< xxxu xxsx 5383:) «9 45“ng 48‘ xxwx ® < MEAQV 05‘ 72...: imwxaawa 355:2. mmK<n<...
  • Page 46 P7001/IEEE Intertace —-——--—“—”—“\\\1 ‘ R324 0225 LOCATOR c324“ U325 0225 U125 BOARD R~25 U324 c123 (1313 c324c::3 COMPONENT U123 MPU/GPIB U323 p123\ 41.80 lU322 0122 ———-————————— (756322 U121 U321 [—1120 R220 4P35 CZZDC321 c220———3 fig U120 0119 U220 EffSE7Ig—_——‘___—_. U119 C425 U219 U320...
  • Page 47 DATA TRANS- CE‘VERS ——- oouTm-DOU11§ DlND'D |N15 BDQ-BD7 Strain: etod T)A¢)A1 *— fi: P7001 cog-”:8“ " lOOLd/Vld (SEE P7001 'IVNOILONnd MAIN \NTE RFACE W263?) GHVOE )IOO'IS Tq/FROM -BD7 8025 INVHBVICI MPu/sPus Clum- BOARD rL’c BUFFER INVERTE Strobt Addrass fie-SET A2) A1 P7001 ~ADR11 LRQAE'ML...
  • Page 48 P7001/IEEE Interface (:::::)C1 GNDoTP (:32 C305 c309 C3725 E:::3R44 [l44 [21324 C3027 LOCATOR CDC, BOARD COMPONENT PIA/P7001 [3—131 U” U” E323 c::3c28 :3R24 920‘0 UU17 C:::>C22 E§§§3 C43CD ”1 ._____.__ fig HARM Ufl Location 252309 Component PIA/P7001 Board...
  • Page 49 Y1.1-1972. Abbreviations are based on ANSI Other that the preparation of ANSI standards are used Inc. are: diagrams by Tektronix, Practices. Y14.15, 1966 Drafting Conventions Y14.2, 1973 Line Lettering. Letter Symbols for Quantities Y10.5, 1968 Used Electrical Science and Electrical Engineering.
  • Page 51 “5 +3V\ 0-47 +3V\}1’§:_\l§( u4-7.o U4”. éms KA-M— 454% 14Lsz-p <1 came P53): ‘7- ‘0 NM» 7—D “ "< @cc: U445 4.0mm. 3> ’> (£3: U4\8> uno-uns,07_\o-u7.\s-8 504‘ U445 —{>°_‘ ~————-u\7_\,un.7.-3<o é UNIS-3": ‘Q {>°.‘° r———*A‘ 3:23, B\l¢%_>.”5%%”31‘2?373<0 ‘L 741504 ‘02—...
  • Page 52 +3VI 3V2. Kara K314 ~+sv AIe ‘4 ‘ U3|8 C209,- CH6 Ha Ha 3‘5 IZ'S “0.! 809'! 28‘, 3Io',3Iz 3I5,’ 3‘7 311323 4‘3 v—OTP I’LJ\\\ chXX LKIS C420 \°|\9 51" X\XX 0.4-7 xzxx A’LSH—L>~sv 1"" ‘ INTEKFACE. x3xx I”; 4&5 M"...
  • Page 53 UlZZ. MCQBZO {was HHS/flaw ©{U3l9-H ‘3‘? U?.\G—to © \‘7-‘2. GHVOG ® uzzo-4 UZ‘9'|3 uus—n 2'5 COMM SH\ELD 02.7.": U11“: U\Z\ Mcoazo @{uaeqs uus-s UEMS-H {UZWr‘I uzn-IZ 1555 uazo—e ~BUS SVCSZ": u7_\9»\ ‘ u'uem ”3752 74— NDAC NKFD MCtoe’LO +SV Cg%4- gm,"...
  • Page 54 ® u4o, u¢\,u42,U¢3-1<o u4¢4z é, UAA-A- uao, U4\‘U¢Z,U43- uM-s, new-l 14x14 Naa'bE NSABLE D‘SABLE ElldSIndW OHVOS P‘IOOI MAIN ® \MTERFACE DOUTB U'LB OUT H MCQB’LO PA¢ JZO' >—< ww46‘d'Pu’ PCDO urn/u THRU U31-zo THEU SHEET IOFB‘, HA/DPo DATA LATCH/XCVES use-8%“ @10-4853—00, P\A/P‘IOO\ BOARD...
  • Page 55 K\(a (———r—'vw——\l§ P'IOO\ " ‘mF-KFACF' ‘00 <__. cz,e,9,n4,19,zz,ze 57.0 1‘] A17, uzs@ é B’LB P'LO U'L‘I MCQBZO A14- 57.4 "I ‘1' ”‘0 1435 0‘- :13! Noe/Addrcss strobe @uu-u '“(l P'lOO\ )” uzo-3és MAHJ >—‘< INT EKFKCE H“ ® UZ4,UZ$)UZG "3: was-40%} REG.
  • Page 56 —J\O 47.0 "I AQS-AQ: >?.'—,—< >—« uu,uz_%,w_9-Z u'L‘l,uze,m.9—7A UZ‘I,U?.6,U?_‘B-7.’L u’L‘|,U7.E>,U?_9~Z\ U¢\ MCQEO MCQB\0 MC68\O 1404 14LSO4 J’LO he< r-_* ”7| “(a “0' Pumas use U30—U39 RESERVED >50 :144 L-__ L______________ ___l lOOLd/VId GHVOS SHEET & @10-4583-00, P‘A/Pmam BOARD wow/[[555 [qifi INTER/7A ®...
  • Page 57 Tektronix. Inc. Field Office or representative will contactyou concerning change part number. Change information. located at the rear of this manual.
  • Page 58 TUCSON, FORBES INC. BLVD 59660 TUSONIX 16512 ERIE, INC. 12TH 72982 ERIE TECHNOLOGICAL PRODUCTS, 97077 BEAVERTON, 80009 INC. TEKTRONIX, IL 60525 AVE., GRANGE, HILLGROVE PO BOX INC. 81073 GRAYHILL, 3029 E. WASHINGTON STREET CO., DIV. CAPACITOR 90201 MALLORY 46206 INDIANAPOLIS, CO.,...
  • Page 59 Electrical Parts—021-0206-00 Replaceable Serial/Model Tektronix thNo. MfrPan Dscont Name Code Number Descflpfion & 670-4882-03 80009 670—4882-03 ASSYzMPU/GPIB BOARD 670—4883-03 ASSYzPIA/P7001 80009 670—4883-03 BOARD 290—0296-00 CAP.,FXD,ELCTLT:lOOUF,20%,20V 56289 150D107X0020S2 8121N0832500104z 283-0024—00 72982 DI:0.1UF,+80-20%,50V CAP.,FXD,CER 283-0024-00 01:0.1UF,+8o—2oz,50v 72982 8121N08325U01042 CAP.,FXD,CER 283-0024-00 8121008325001042 72982 DI:0.1UF,+80-20%,50V...
  • Page 60 Electrical Pans—021-0206-00 Replaceable Serial/Model Tektronix Code Part Number Part Dscont Name Descrlption & 8131N075E474M 0412 DI:0.47UF,ZOZ,50V 72982 283-0203—00 CAP. ,FXD,CER 8121808325001042 01:0.108,+80-207.,50v 72982 283=0024~00 0413 CAP.,FXD,CER 01:10588,1z,500v 72982 OBAISAICOGOlOSOF 041a 283m0052—OO CAP.,FXD,CER 0415 283e0331-00 01:4398,2z,100v 72982 805—5051841306 CAP, ,FXD,CER 90201 'I‘DClOéMOZSFL...
  • Page 61 Electrical Parts—021-0206-00 Replaceable Serial/Model Tektronix thNo. MfrPan Dscont Name Code Number Efi Descnpfion & 156-0058—00 156-0058-00 80009 MICROCIRCUIT,DI:HEX.INVERTER 156-0129-00 156-0129-00 80009 MICROCIRCUIT,DI:QUAD 2-INPUT GATE 156-0030-00 MICROCIRCUIT,DI:QUAD 2-INPUT 01295 SN7400(N NAND GATE 156-0043-00 156-0043-00 MICROCIRCUIT,DI:QUAD 2-INPUT 80009 NOR GATE 156—0041-00 FLIP-FLOP...
  • Page 62 Replaceable Electrical Pans—02141206430 Serial/Model Tektronix Part Number Code Part Name Description & 156-0145-00 80009 MICROCIRCUIT,DI:QUAD 2-INPUT 905 0319 156-0145—00 11mm 31211 mcxocmcuu,01:1111:5st 27014 DM8097M lseeoszs-oo 11111-1? 11320 01295 SN7SLSQN 156°0138°00 LINE RECEIVER MICROCIRCUIT,LI:CORE U321 156=0383-00 80009 MICROCIRCUIT,DI:QUAD 156-0383—00 2-»111110'1 NOR...
  • Page 63 "" END ATTACHINGPARTS ordered replaced with a new or Parts of Detail Part part you have has been Parts 0/ Part improved part, your local Tektronix, lnc. Field Office or Detail Attaching parts contact concerning change representative part will END ATTACHINGPARTS number.
  • Page 64 Repmceame MechanMaIPans— 021-0206-00 MANUFACTURER CROSS MFR. CODE NUMBER INDEX hfifr. State. Address (fity. (Made Manufacturer Code 02379 NEST BRIOGENOTER COMPONENT PORK 04919 SERVICE COMPONENT 01880 NAKEFIELO NOKEFIELO ENGINEERING RUOUBON R0 05820 06515 NEH HOVEN CT 06540 NITE CORP ONATON ELECTRONIC HRRONORE BLAKE ST 92642...
  • Page 65 Pafls- Repwceame MechaMcm 021-0206-00 Fig. a Index Tektronix Serial/Assembly Mfr. Part Dscont Effective 12345 Name Description Code Part Mfr. 380-0499-00 380-0499-00 80009 H50 HALF,CONN:FRDNT,NYLON PARTS) (ATTACHING 211-0008-00 93907 SCREN,NACHINE:4-4O O.25,PNH,STL ORDER DESCR 211—0504-00 SCREN,NACHINE:6-32 O.250,PNH,STL TKO435 ORDER DESCR (END ATTACHINO...
  • Page 66 Parts- Replaceable Mechanical 021-0206-00 Fig. & Mfr, Seria|lAssembly Index Tektronix Code Part Dscont Name Description Mfr. Part Effective 12345 04919 012-0530-01 8100795 2024—2 8010100 C118LE,INTCON:2.0H [OPTION 31 ONLY) 74868 DC30147-102 012—0630-03 8100796 CABLE,INTCON:2.0I (OPTION 31 ONLY) 1986 REV DEC 6—1...
  • Page 67 .— mxvroumo —0206-00...
  • Page 68 M06800 70°C; Suffix) M668000 to 85°C; Suffix only) (—40 MICROPROCESSING UNIT (MPU) monolithic 8-bit microprocessor forming the MC6800 is a central control function for M6800 Motorola’s family. Compatible with with M6800 system parts, MC6800, TTL, requires only one +5.0-voIt power supply, and no external TTL devices...
  • Page 69 MC6800 ELECTRICALCHARACTERISTICS to 70°C otherwise noted.) unless (VCC 5%, V55 Unit Characteristic Symbol lnput High Voltage Logic — Veg—0.3 VCC+0.1 (1)192 VIHC — Input Low Voltage Logic — — —0.1 VSS+0.3 $1,492 VILC Overshoot/Undershoot Clock Input Level High — -— lnpm Level —...
  • Page 70 MC6800 MAXIMUM RATINGS Value Unit Rating Symbol This device contains circuitry protect ~O.3 +7.0 inputs against damage due to high static Supply Voltage volt~ ages or electric fields; however, it that advised Input Voltage __0_3 normal taken to avoid precautions applica—...
  • Page 71 MC6800 MEMORY OR PERIPHERALS FIGURE 3 WRITE — /— Start of Cycle — (1)2 Address From Data Data VaIId From =¢2 tDEED tDEE 4E (:52 F—fi «IDBEr ~—tDBEf —— q—tH Data §—______a Data VaIid From H—JDDw—— Data Not Valid FIGURE 5 TYPICAL READ/WRITE, VMA, AND TYPICAL DATA BUS OUTPUT DELAY FIGURE 4...
  • Page 72 MC6800 BUS TIMING TEST LOAD FIGURE — CURRENT TYPICAL POWER SUPPLY FIGURE VARIATIONS WITH FREQUENCY 4.75 — MMDG15O > Test Point or Equiv. (.3130 MMWOPO 1200 1000 or Equrv. r, OPERATING FREQUENCY (kHz) — VARIATIONS WITH TEMPERATURE FIGURE 8 — 130 PF for ‘30-'37 z(p2 Duty Cycle...
  • Page 73 MC6800 SIGNAL DESCRIPTION Proper operation of the requires that certain Data Bus Enable (DBE) This the three-state con- input — trol and timing signals be provided to accomplish control for the data bus and enable the specific signal will functions and that other monitored signal lines be bus drivers when...
  • Page 74 MC6800 the initialization of the microprocessor The Index Register, Program Counter, Accumulators, Figure 9 shows for at Condition stored must be held low least eight Code Register are after restart. Reset away on 4.75 stack. the end of the cycle, address after volts.
  • Page 75 MC6800 FIGURE 10 FLOW CHART — Reset Start Sequence FFFE, FFFF Execute ns me Interrupt Routine ‘ ‘ Execute instruction FFF8 FFFC FFF9 FFFD REGISTERS three 8-bit location convenient. three 16-bit registers and have any (address) that those that the programmer require storage of information registers available applications...
  • Page 76 MC6800 PROGRAMMING MODEL OF THE MICROPROCESSING UNIT FIGURE -— Accumulator ACCA Accumulator ACCB Index Register Counter Program Stack Pointer COdes z v c $23,323" Carry (From Bit Overflow Zero Negative Interrupt Half Carry (From Bit 3) SAVING THE STATUS OF THE MICROPROCESSOR THE STACK FIGURE 12 m—9...
  • Page 77 06800 Condition The condition code location when fetches the immediate instruction Code Register register this — three-byte instructions. Arithmetic Unit operation: execution. These are indicates results Logic (2), from bit Negative (N), Zero Overflow (V), Carry Direct direct addressing, the address Addressing —...
  • Page 78 MC6800 TABLE 3 ACCUMULATOR AND MEMORY INSTRUCTIONS ADDRESSING MODES BOOLEAN/ARITHMETIC OPERATION COND.CDDE REG, IMMED DIRECT INDEX EXTND IMPLIED (Allregisterlabels refertocontenIsI ‘ OPERATIONS MNEMONIC A+M6A ADDA 5° “D E” AODB B+NI A+B~A AddAcmltrs A+M+C~A Addwith AOCA Carry B+M+C~B ADCB A-MAA ANOA B-M~B ANDB BitTesI...
  • Page 79 MC6800 TABLE 4 INDEX REGISTER AND STACK MANIPULATION INSTRUCTIONS —- CDND. CODE REG. IMMED DIRECT INDEX EXTND IMPLIED “' OI’ BOOLEAN/ARITHMETIC OPERATION POINTER OPERATIONS MNEMONIC 4"; @ 1(8) Compare Index M, XL — X—I-‘X Decrementlndex SP~I->SP DecrementStack Pntr X+I'*X Increment Index SP+1~>SP o o 0 Increment Stack Pntr...
  • Page 80 MC6800 SPECIAL OPERATIONS JUMP SUBROUTINE: Main Program Subroutine Stack INX + Subr. Instr. SP'Z 74> [n+2] Offset' INDXD SP—l (n+ZI Next Main Instr. [n+2] Form alue + 2] = B-Bit Unsigned Main Program Subroutine Stack :> 1st Subr. Instr. SP—Z -—>...
  • Page 81 C6800 TABLE INSTRUCTION ADDRESSING MODES AND ASSOCIATED EXECUTION TIMES — (Times Machine Cycles) OpevandI OperandI Extended Exmnded Indexed Implied (Dual (Dual ASFI \INU’QUIQJXO howmmmAww- .0bb.NOltI-OO¢~&. NOF’ 01000-0account-noo-ouommbbbo 0010).. uxAono Moo-omcwoo0000000000..omen-economic“).Immediate coooco-oomoooooomooooooom-oowumoooanImmediate UIOIVOCDVUIOVIClo-.OIOOIOOUIODOIIOVVU’IU'IU'IOIndexed oon.I...IICODAbmt-bbbbabobbxxauaooootoRelative OAbONCOONINNNOOQIOOIO.IIIUIIDOIIOODNImpIIed Ioon...ucoon.oust-commoooommooocioomACCX CCONOONIONC0.0000IIOIOOOIOOOIINNOOO.ACCX UCOOOb.(£00.00...OOCIIOOQICIIOOOOUGUODirecl aon.an.0.0mm».-uwooooooomooobbwoooooDirac: 1:... 010. cnoommmomma Amman-u.
  • Page 82 MC6800 SUMMARY OF CYCLE BY CYCLE OPERATION detailed description of the Table 8 provides informa- the control executed. The information ware program tion present on the Address Bus, Data Bus, Valid Memory categorized groups according to Addressing Mode and Address the Read/Write line (VMA), and line (R/W) dur-...
  • Page 83 MC6800 (Continued) OPERATION SUMMARY TABLE 8 — Address Mode Cycle VMA Instructions Address Bus Line Data Bus Line Cycles INDEXED (Continued) Op Code Address Op Code Offset Op Code Address Index Register Irrelevant Data (Note Index Register Plus Offset (w/o Carry) Irrelevant Data (Note Index Register Plus Offset Irrelevant Data (Note...
  • Page 84 MC68OO TABLE 8 OPERATION SUMMARY (Continued) — Cycle VMA Address Mode Line Instructions Line Address Bus Data Bus Cycles EXTENDED (Continued) Op Code Op Code Address Order Op Code Address Address of Operand (High Byte) Address of Operand (Low Order Op Code Address Byte) Address of Operand...
  • Page 85 MC6800 TABLE 8 (Continued) OPERATION SUMMARY —— Cycle VMA Address Mode Instructions Line Address Bus Line Data Bus Cycles INHERENT (Continued) Op Code Address Op Code Instruction Op Code Address Op Code of Next Pointer Return Stack Address (Low Order Byte) Pointer Return Stack...
  • Page 86 M06820 to 70°C; Suffix) M068200 to 85°C; {-40 Suffix only) PERIPHERAL INTERFACE ADAPTER (PIA) Interface Adapter The MC6820 Peripheral universal provides equipment to the of interfacing MC6800 Micro‘ means peripheral (NCHANNEL,SILICON-GATE) Unit interfacing the (MPU). This device capable processing bidirectional peripheral data buses to peripherals through two 8—bit...
  • Page 87 M06820 CHARACTERISTICS ELECTRICAL to 70°C unless otherwise noted.) i5%, (VCC 0, TA Unit Characteristic Symbol lnput Enable High Voltage — Other V53 + 2.0 Inputs —- Input Low Voltage Enable —0.3 — Other -0.3 Inputs — R/waFet, C31,E§§, Current cso, pAdc Input Leakage...
  • Page 88 MC6820 MAXIMUM RATINGS Rating Symbol Value Unit This contains circuitry device protect «0.3 to +7.0 inputs against damage due to high static volt- Supply Voltage ages or electric fields; however, it that advised lnput +7.0 Voltage normal taken to precautions avond applica~ Temperature...
  • Page 89 M06820 FIGURE 4 PERIPHERAL CMOS DATA DELAY TIMES FIGURE 5 PERIPHERAL DATA AND DELAY TIMES — -— (Write Mode; CRA-5 (Write Mode; CRB-S CRB-3 CRB4 CRA-3 = 0) CRA—4 Enable ‘PDW Enable ‘cmos- PBO—F’B7 ----- 450% PAO-PA7 "‘tDC Note: CB2 goes low result of transition positive...
  • Page 90 MC6820 FIGURE 12 BUS TIMING TEST LOADS — Load Load Load (IRQ Only) (CMOS Load) (DO-D7, PAO-PA7, PBO‘PB7, CA2, C82) MMD6150 Test Point Test Polnt °" EQUIV- Test Polnt o——] 7000 or Equiv. 130 pF for 00—07 30 pF for CA2, and PAOAPA7, PBO-PB7, 11.7...
  • Page 91 M06820 EXPANDED BLOCK DIAGRAM <~——40 lFlQA 38 Interrupt Status Control 39 CA2 Control RegisterA (CRA) ——J\ Data Direction Register DZ 31 <———> |—-—'———J—}—1/ (DORA) <—> Data Bus < Buffers ‘ D4 29 (DBB) Output ”0 <—> D6 27 Output 3 PA1 Register 4 PA2 (ORA)
  • Page 92 MC6820 must occur from the to the Operation the corresponding inactive edge active Read Peripherai Data pulse the interrupt of the interrupt input to condition the After data being cleared, flag edge signal edge register. deselected network. the interrupt flag has been enabled and enabled to until cannot...
  • Page 93 MC6820 INTERNAL CONTROLS There are locations within PIA accessible to CONTROL REGISTERS (CRA and CR data bus: Data Peripheral Registers, two Control Registers (CRA and allow Direction two Control Selection Registers, and Registers. to control the operation the four peripheral of these locations controlled the R80...
  • Page 94 MC6820 Control of to enable the CA1 and C81 Interrupt Input Lines (CRA-O, used interrupt signals IROA and IROB, lowest order CRA-l and determine the bits respectively. Bits CRB<I active CRB-O, CRA-‘l, B-1) —- to control transition of the interrupt input control registers are used interrupt...
  • Page 95 MC6820 Control of Control low, CA2 (CB2) interrupt input line similar CA2 and Lines Peripheral C885) (CB1) (Table 4). When CRA-5 (ORB-5) high, CA2 (ORA-3, ORA-4, CRA~5, CRB-3, ORB-4, and — that of the two control becomes may be used registers are used (CB2) output...
  • Page 96 MCM6810A 70°C; Suffix) M9M6810AG to 85°C; Suffix (—40 only) 8-BIT STATIC RANDOM ACCESS MEMORY (NCHANNEL’SMCONGATE) 8-BIT STATIC The MCM68IO byte-organized memory designed for use is a fabricated bus'organized systems. It with N-channel RANDOM ACCESS MEMORY silicon—gate operates from technology. For ease device single power use,...
  • Page 97 MCM6810A CHARACTERISTICS OPERATING CONDITIONS AND (Full operating voltage and range unless otherwise noted.) temperature OPERATING RECOMMENDED CONDITIONS Parameter Symbol Unit 4.75 Supply Voltage 5.25 Input High Voltage 5.25 — Input Low Voltage -0.3 VI L — CHARACTERISTICS Characteristic Symbol Unit Input Current csn, 53‘”)
  • Page 98 MCM6810A AC OPERATING CONDITIONS AND CHARACTERISTICS (Full operating voltage and otherwise noted.) temperature unless TEST LOAD FIGURE 1 — RL = AC TEST CONDITIONS MM06150 Te“ Ponnt Condition Value or Equiv Pulse Levels Input 11.7 input Rise and Times Fall MMD7000 Output Load...
  • Page 99 MCM6810A WRITE CYCLE MCM6810AL1 MCM6810AL Characteristic Unit Symbol Write CycIe Time — toyeIW) —- Address Setup Time — Address Hold Time — — Chip Select PuIse Width ‘CS — — Write to Chip Select Delay Time tWCS — — Data Setup Time (Write) tDSW...
  • Page 100 P7001/IEEE Interface Appendix 9825 EXAMPLES PROGRAMMING H—P demonstrated in the with following Controlling 9825 H—P addition to discussion. of the P7001/IEEE 488 understanding DPO, Interface, Standard familiarity with the 9825 IEEE 488—1975, Interface is required. 98034A HP—IB that operating the Before with strap...
  • Page 101 P7001/IEEE Interface STORE HOLD & Store and/or particular the following Hold waveform, use examples guides: 7Z1,”STO 7Z1,"HOL Store follows: multiple Hold accomplished waveforms as 7Z1,”STO D,B,A" 7Z1,”HOL D,B,A" READING DATA FROM into the follows: read from Data 9825 E: dim ATSLE] ?Zl,”DPx?"...
  • Page 102 P7001/IEEE Interface (Continued) WRITING DATA TO to receive data represents Line ” "DPx prepares Lines of the the waveform arrays A, B, transfer. line line loop with actually effecting output '.1' to perform in '7D1.1' referencing technique used 9825 write operation using format READING SCALE FACTORS factor...
  • Page 103 P7001/IEEE Interface (Continued) DISPLAY SOURCE line string variables; line dimensions preceding example, interface sets Register to the decimal address of the Address Display within the that Generator card lines read the value of card; DPO; line status modifies the is desired; according to word which...
  • Page 104 P7001/IEEE Interface (Continued) SERIAL EXECUTING POLL determine calculator Line primary address 32 masks itself. interface listen This value to create the added address calculator for the stored which then Line performs decimal octal variable conversion of the (the primary address of which DPO) talk...
  • Page 106 P7001/IEEE Interface APPENDIX ASCII CODE CHART ”a B”:%5 HIGF)XI& CONTROL GRAPHIC INJUT B4 B3 NLH. 0 mm 0 (0) 10 (16) (32) (64) 50 (4B) ((80) (112) (96) (33) (17) (49) (65) 51 (81) (97) (113) " (2) 12 (34) (1B) (50) (66) 52...

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