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Reset
When power is initially applied to the monitor, 0701
is off until the
+
5 VDC is present. The resulting low
on the reset line (TP3) initializes microprocessor
IC101. When the
+
5 VDC supply reaches approxi-
mately 4.5 volts, 0701 conducts to reverse bias
CR707. Capacitor C716 then holds the reset line high
by charging to 5 VDC through a pull-up resistor within
IC101. The RC time constant allows logic circuits to
reach 5 VDC before the RES* signal becomes inactive.
If the
+
5 VDC supply drops to approximately 4.5 volts,
0701 will turn off. The reset line is therefore driven
low resetting microprocessor IC1 01. This circuit resets
the microprocessor if brownouts occur.
Timing
A 6.0 MHz oscillator provides control and synchroniza-
tion signals to microprocessor IC101 at pins 2 and 3.
The timing signals enable internal registers, buffers,
and control logic to function.
Microprocessor
IC101 is an 8-bit 8749 microprocessor containing an
EPROM. Microprocessor IC101 is clocked by a 6.0
MHz oscillator to control internal register and buffer
operation. IC101 also initiates a sequential strobe
which drives a matrix of IR (infrared) LEDs located
within the front bezel assembly of the monitor. The
projected infrared beams allow IC101 to sense the
presence and location of a finger placed against the
face of the CRT.
The strobe is implemented over the DB7 - DBO bus
and is triggered by the horizontal synchronization sig-
nals of the monitor. The infrared beams projected
across the face of the CRT define X-V coordinates
Circuit Descriptions
\
which IC101 uses to interpret a particular location on
the CRT display. The microprocessor strobes each IR
LED approximately every 400 microseconds (jJ.s) and
reads its testable input each time a strobe occurs. If
a finger breaks a set of X-V infrared beams, the testa-
ble input is driven low. IC101 then logs the data bytes
which drove the IR LEDs corresponding to that particu-
lar X-V location and uses them to execute an instruc-
tion contained within firmware.
Main CPU Interface
When data for an X-V coordinate is established, the
microprocessor communicates with the main CPU by
means of serial data transmission from the monitor
output connector J8. The transmission is directed
through ports P25, P26, and P27. When microproces-
sor IC101 wants to communicate with the main CPU,
a RTS (request to send) signal is issued. The signal
is buffered and inverted by
NAND
gate IC102, pin 6,
and is then transmitted through inductor L 102, to the
monitor output connector J8 at pin 4. L 102 filters the
signal and suppresses radiation while diodes CR103
and CR1 04 shunt any developed back EMF.
In response to the RTS signal, the main CPU issues
a CTS (clear to send) signal, interfaced through pin
5 of connector J8 to pin 38 of microprocessor IC101.
This signal is also filtered and suppressed for radiation
by inductor L103, and diodes CR105 and CR106 pro-
tect pin 13 of buffer/inverter IC103.
Upon receipt of the CTS Signal, microprocessor IC101
begins to transmit serial data (SOUT) to the main CPU
through pin 3 of buffer/inverter IC102 and inductor
L 101. The transmission is interfaced to the main CPU
through pin 2 of connector J8. The SOUT signal is
filtered and radiation suppressed by inductor L 101.
Diodes CR101 and CR102 protect against developed
back EMF.
Page 3-5
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