1. Manuals
  2. Brands
  3. Ziatech Corporation Manuals
  4. Storage
  5. ZT 8825
  6. Hardware manual

Ziatech Corporation ZT 8825 Hardware Manual

Expanded, extended memory systems
Hide thumbs
Table of Contents

Advertisement

Quick Links

Download this manual
Ziatech Corporation ZT 8825 Hardware Manual

Advertisement

Table of Contents
loading

Summary of Contents for Ziatech Corporation ZT 8825

  • Page 1 Artisan Technology Group is your source for quality new and certified-used/pre-owned equipment SERVICE CENTER REPAIRS WE BUY USED EQUIPMENT • FAST SHIPPING AND DELIVERY Experienced engineers and technicians on staff Sell your excess, underutilized, and idle used equipment at our full-service, in-house repair center We also offer credit for buy-backs and trade-ins •...
  • Page 2 ZT 8825 and ZT 88CT25 Expanded\Extended Memory Systems HARDWARE MANUAL For ZT 8825 and ZT 88CT25 REVISION A.4 Reorder Part Number ZT M8825 April 29, 1993 1050 Southwood Drive San Luis Obispo, CA 93401 USA FAX (805) 541-5088 Telephone (805) 541-0488...
  • Page 3 Life Support Policy: Ziatech products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of Ziatech Corporation. As used herein: 1. Life support devices or systems are devices or systems that...
  • Page 4 CUSTOMER SUPPORT If you have a technical question, please call Ziatech’s Customer Support Service at the following number: Corporate Headquarters: (805) 541-0488 (805) 541-5088 (FAX) You can also use a modem to leave a message on the 24 hour Ziatech Bulletin Board Service...
  • Page 5 ZT 8825. It includes a product definition and a listing of product features. I. GETTING STARTED Chapter 2, "Getting Started," summarizes the information essential to getting your ZT 8825 up and running. You can refer to subsequent chapters for further explanation of the material covered in "Getting Started." III. USER’S REFERENCE Chapter 3, "Theory Of Operation,"...
  • Page 6 Preface Chapter 4, "Application Examples," includes specific examples of the ZT 8825 in operation, including code to implement these applications. Examples include initializing the ZT 8825 as continuous memory and as extended memory. Chapter 5, "Configurable Options," details the various jumper- selectable options on the ZT 8825.

  • Page 7: Table Of Contents

    ........FEATURES OF THE ZT 8825 .

  • Page 8: Overview

    ........... . . INITIALIZING ZT 8825 AS CONTINUOUS MEMORY .
  • Page 9 ....... . ZT 8825 Power Requirements ....... . .
  • Page 10 Contents Appendix E. GLOSSARY INDEX Index ............. . i Artisan Technology Group - Quality Instrumentation ...
  • Page 11 TABLES Table 2–1 ZT 8825 Basic Access Time Requirements... . . Table 2–2 Chip Size Selection. 2-12 ....... .
  • Page 12 ..... Figure B–1 ZT 8825 Card Dimensions......

  • Page 13: Introduction

    This chapter briefly introduces some key features and some possible applications for the ZT 8825. Unless specifically called out, all references to ZT 8825 also refer to the CMOS extended temperature version ZT 88CT25. Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
  • Page 14 ZT 8825 Software Support Package manual for more information. 4. RAM or PROM disk: The ZT 8825 can be organized as a disk using the software provided with the product. DOS can work with these pseudo-disks in the same manner as with regular disks.
  • Page 15 3-6). An example of the versatility of the ZT 8825 is that EPROM can be used on one half of the ZT 8825 and RAM on the other half. This arrangement will provide the total memory requirements for many STD systems. The ZT 8825 is effectively two byte-wide boards in one.
  • Page 16 Introduction FEATURES OF THE ZT 8825 • Direct 20-bit or 24-bit addressing (compatible with the STD-80 Series Bus Specification) • Each 16 Kbyte block is independently addressable • Two sets (four sockets each) of 32-pin JEDEC sockets • Various combinations of RAM (32K-2M) and EPROM (16K-2M) •...

  • Page 17: Getting Started

    Unless explicitly noted, all references to ZT 8825 in this manual also refer to the CMOS version ZT 88CT25. Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
  • Page 18 Number (see page D-6). WHAT’S IN THE BOX When the package is opened, you should find: 1. The ZT 8825 Operator’s Manual and the ZT 8825 Software Support Package manual (in a binder). 2. One ZT 8825 or ZT 88CT25 PC Board.
  • Page 19 Getting Started SYSTEM REQUIREMENTS The ZT 8825 is designed to be physically compatible with card cages manufactured to meet the STD-80 Series Specification and should normally be mounted in one. The board requires +5 V DC ±5% @ 0.67 A maximum, not including any memory chips.

  • Page 20: Backplane Recommendations

    STD-80 and STD 32 systems. Processor Compatibility The ZT 8825 is designed for STD-80 Series systems. It can be used with other microprocessors only if they meet the STD-80 Series multiplexed memory addressing and timing specifications.

  • Page 21: Socket Assignments

    28-pin memory chips must be inserted with socket pins 1, 2, 31 and 32 empty. When looking at the ZT 8825 circuit board with the component side facing you and the edge connector at the bottom, 28- pin chips should be installed in the bottom-most section of the socket.

  • Page 22: Memory Speed Requirements

    Table 2-1 shows the basic chip access time requirements for static RAMs (SRAMs), EPROMs or EEPROMs. See page 3-6 for more information about wait states. Table 2-1 ZT 8825 Basic Access Time Requirements. 0 WAIT STATES 1 WAIT STATE TIMING...

  • Page 23: Board Configurations

    Getting Started BOARD CONFIGURATIONS The ZT 8825 incorporates several jumpers that can be set to select different board configurations. The default configuration includes 20- bit memory addressing, 16-bit I/O port addressing, 0 wait states on all memory accesses, no battery backup, high IOEXP for access to registers, and is configured for 128K SRAM chips in both rows.

  • Page 24: Figure 2-1 Factory Default Jumper Configuration

    Getting Started SW2 = Down toward board Figure 2–1. Factory Default Jumper Configuration. Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 25: Figure 2-2 Example Setting For 24-Bit Addressing

    Getting Started SW2 = Down toward board Figure 2–2. Example Setting for 24-bit Addressing. Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 26: Chip Size Selection

    Getting Started CHIP SIZE SELECTION Six-segment switch SW1 must be set according to the size of memory chips installed. Segments 6, 5, and 4 correspond to Row B chip size while segments 3, 2, and 1 correspond to Row A. See Table 2-2 on page 2-12 and Table 2-3 on page 2-13 for allowable settings.

  • Page 27: Figure 2-3 Memory Chip Orientation

    Getting Started Pin 1 Figure 2–3. Memory Chip Orientation. 2-11 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 28: Table 2-2 Chip Size Selection

    Getting Started Table 2-2 Chip Size Selection. Switch section† Size 321 (or 654) 128K 256K 512K 512K special - two chips in row A † Switch section setting of 0 = ON, 1 = OFF. 2-12 Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 29: Table 2-3 Valid Chip Combinations

    Getting Started Table 2-3 Valid Chip Combinations. ROW A ROW B Size SW 321 Size SW 654 16K † 16K † 32K † 32K † 64K † 32K † 64K † 64K † 128K † 32K † 128K † 128K † 256K †...

  • Page 30: Chip Type Selection

    Getting Started CHIP TYPE SELECTION All chips in each row must be of the same size and type. Jumper sets J1 and J2 define the configuration for memory chip Rows A and B, respectively. The configurations shown in Table 2-4 cover all chip types known at publication time.
  • Page 31 J to pin 8 and pin 4 to pin 9. This applies +5V to EPROM pins 1 and 31 (Vpp and /pgm) to meet non-Intel/AMD requirements. † Flash EPROMs require special software routines for programming. See ZT 8825 Software Support Package documentation.

  • Page 32: I/O Addressing

    Getting Started I/O ADDRESSING The ZT 8825 has four I/O registers that are used to configure the board (see Table 2-5. These registers require jumpers to set the base I/O address (see Table 2-6 on page 2-17). The default base address is 0EE68h.

  • Page 33: Table 2-6 Default I/O Address Assignments

    Getting Started Table 2-6 Default I/O Address Assignments. Address Default Default Default Line Condition Base Address Base Address (Binary) (Hexadecimal) W14 out W13 out W12 out W11 in 1 hardwired 1 hardwired 1 hardwired 0 hardwired W10 in W9 out W8 out W7 in 1 hardwired...
  • Page 34 III. USER’S REFERENCE THEORY OF OPERATION ........APPLICATION EXAMPLES .

  • Page 35: Figure 3-4 Configuration Register

    Chapter 3 THEORY OF OPERATION Contents Page OVERVIEW ........... . . MEMORY CHIP TYPE .

  • Page 36: Figure 3-1 Functional Block Diagram

    Theory of Operation OVERVIEW This chapter presents a high-level look at the way the ZT 8825 functions. It is designed to help you become more familiar with the board. Figure 3-1 illustrates the functional relationship between the key components on the board. Refer to Figure 3-1 as you read this chapter.
  • Page 37 STD-80 Series Bus Specification. In addition, the CMOS version ZT 88CT25 is TTL compatible. Unless specifically noted, all references to ZT 8825 in this manual refer also to ZT 88CT25. There are eight memory chip sockets on the ZT 8825. These sockets are divided into two rows of four.

  • Page 38: Memory Chip Type

    Theory of Operation MEMORY CHIP TYPE The ZT 8825 accepts JEDEC-compatible byte-wide memory devices of either 28 or 32 pins. All chips in each row of four must be of the same type (for example, all static RAM in Row A, all EPROM in Row B) and the same size (all 64K in Row A, all 32K in Row B).
  • Page 39 Theory of Operation Table 3-1 Chip Size Combinations. Row A Row B Switch 1 654321 16K † 16K † 000000 32K † 32K † 001001 64K † 32K † 001010 64K † 64K † 010010 128K † 32K † 001011 128K †...

  • Page 40: Wait States

    You may select either zero wait states or one wait state for the board. If one wait state is selected, the ZT 8825 requests a wait state only for 16 Kbyte blocks of memory that you have programmed as enabled.

  • Page 41: Battery Backup

    µPD44256-12L or Sony CXK58255P-12L which have a 1 µA data retention current. See Table 3-2 for the estimated life of batteries used with the ZT 8825 with various SRAM chips installed. Table 3-2 Est. Battery Life @ Max. Standby Current.
  • Page 42 Theory of Operation For example, a board with eight 10 µA RAMs installed is used (powered-on) 8 hours per day, 5 days per week at +25˚C. In this example, the battery acts as the power supply for the board for different amounts of time weekdays than on weekends (16 hrs/day on weekdays, 24 hrs/day on weekends).
  • Page 43 The ZT 8825 supplies a DCLOW signal for use with the on-board battery backup. DCLOW is asserted when the 5 V supply is below 4.50 V. The ZT 8825 uses this signal to disable any glitching on the write line or chip selects to the memory chips. This signal may optionally assert DCLOW* (STD bus pin 6, Jumper W22 IN) and/or PBRESET* (STD bus pin 48, Jumper W23 IN) on the backplane.

  • Page 44: Table 3-3 Default I/O Address Assignments

    An I/O address is chosen for the ZT 8825 to distinguish it from any other I/O board that exists on the STD bus. If more than one ZT 8825 is used in a system, each must have a unique address.

  • Page 45: Table 3-4 Zt 8825 I/O Registers

    1110b. A7-A4 are jumper configurable. A3 is hardwired to a logical 1. A2 is not decoded. A1-A0 define the four unique addresses (000b, 001b, 010b, and 011b) used on the ZT 8825 (see Table 3-4). Note: Since A2 is not decoded, four addresses (100b, 101b, 110b, and 111b) are redundantly mapped and should not be used.
  • Page 46 Theory of Operation Address lines A15-A12 and A7-A4 are tied to Jumpers W14-W11 and W10-W7, respectively. Since the hardware restricts address lines A11-A8 to the value 1110b (Eh) and A7-A4 to the value 1000b (8h), this limits the choice of base addresses to XEY8h, where X and Y may be chosen by Jumpers W14-W11 and W10-W7, respectively.

  • Page 47: Memory Addressing

    Map Registers). 24-bit Memory Addressing Even though the ZT 8825 was designed to work explicitly with the multiplexed 20-bit memory address scheme of the STD-80 Series Bus Specification, it will work with a 24-bit address STD bus (for example, 80286 or similar processors).

  • Page 48: Memory Mapping

    Paging The memory resident on the ZT 8825 can be located outside the normal memory map of the PC when the ZT 8825 is used as an expanded memory board. Using a technique called "paging", the CPU can access 16 Kbyte blocks of physical memory called "pages"...

  • Page 49: Figure 3-2 Logical To Physical Address Mapping

    Map Registers Each page frame in the logical address space has an associated Map Register on the ZT 8825. 64 Map Registers are used in 20-bit address systems. 1,024 Map Registers are available in 24-bit address systems. In addition, a complete alternate set of Map Registers can be loaded at the same time as the primary set and switched in under software control (see "Setting the Map Register"...

  • Page 50: Figure 3-3 Map Register

    Theory of Operation Each 8-bit wide Map Register points to a 16 Kbyte physical page of memory that is to occupy the page frame currently associated with the Map Register. The most significant bit (MSB) of each register is used as an enable bit for the page frame (see Figure 3-3).
  • Page 51 Theory of Operation Configuration Register The Configuration Register allows software control of several board parameters associated with memory mapping. Figure 3-4 illustrates the Configuration Register bits that affect these parameters. The fol- lowing is a description of the purpose of each Configuration Register bit: Bit 0 Map Enable bit.

  • Page 52: Setting The Map Register

    Theory of Operation Setting the Map Register Follow these steps to load the Map Register: 1. Disable the board by setting the Configuration Register Map Enable bit (bit 0) to logical 0. 2. Set the Configuration Register Map Write Enable bit (bit 2) to logical 1.

  • Page 53: Absolute Address Mode

    0 and continuing to the upper limit of memory on the board. This is useful for small systems where the ZT 8825 is the only RAM board or in systems where it is used for RAM disks and for lower memory.

  • Page 54: Extended Memory Mode

    Theory of Operation EXTENDED MEMORY MODE The ZT 8825 can be used as normal memory anywhere in the 16 Mbyte address space by using 24-bit addressing. Memory is mapped in 16 Kbyte blocks, allowing it to be distributed over 16 Mbytes of address space.
  • Page 55 Theory of Operation 10. Set the Configuration Register Alternate Map Register bit (bit 7) a) logical 0 to access the Primary Map Register set. b) logical 1 to access the Alternate Map Register set. 11. Enable the board by setting Configuration Register bit 0 to logical 1.
  • Page 56 ..........OVERVIEW This chapter includes specific examples of the ZT 8825 in operation. INITIALIZING ZT 8825 AS CONTINUOUS...
  • Page 57 Application Examples Assembly Language Setup The following example is written in Assembly language. The ZT 8825 is loaded with 8 x 32K RAM. The 20-bit memory address starts at 8000:000 (segment 8000 or 512K). ;MEMORY EQUATES START_MAP ;=SEGMENT 8000H SHIFTED RIGHT 10 TIMES SIZE ;16 X 16K = 256K...
  • Page 58 Application Examples ;INCREMENT PAGE NUMBER LOOP INIT_LOOP ;SELECT NEXT PAGE DX, CONFIG AL, EN_BOARD DX, AL ;TURN ON BOARD Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
  • Page 59 1988 * Setup is a simple configuration utility for the ZT 8825. Its * only purpose is to allow you to map the ZT 8825 into a single * contiguous memory space in an STD DOS system. It is implemen- * ted using Microsoft C compiler Version 4.0.
  • Page 60 Application Examples printf("\nMapping ZT8825 at %x to %x:0 for %d pages (%dK).\n", ioaddr,baseaddr,pages,(pages*16)); clear(ioaddr); setup(ioaddr,baseaddr,pages); /*******************************************************************/ clear: zeros all mapping registers on the specified ZT8825. clear(ioaddr) unsigned int ioaddr; int i; outp( (ioaddr + REG_CONFIG), CONFIG_MAP_WRITE_ENABLE); outp( (ioaddr+REG_HI_ADDR), 0); for (i=0; i<64; i++) { outp( (ioaddr+REG_LO_ADDR), i);...
  • Page 61 Application Examples printf("Start at memory segment (in hex) [%x] : ",DEFAULT_BASE_SEG); gets(Input); if (strlen(Input) == 0) { *baseaddr = DEFAULT_BASE_SEG; } else { sscanf(Input,"%x",baseaddr); printf("Number of pages to initialize (in decimal) [%d] : ", DEFAULT_PAGES); gets(Input); if (strlen(Input) == 0) { *pages = DEFAULT_PAGES;...
  • Page 62 These example programs have been included in this manual as a convenient quick reference for EMS users. Further information on EMS can be found in the ZT 8825 Software Support Package manual. Example 1 The following program was written using the Microsoft C compiler Version 3.0.
  • Page 63 Application Examples char *ptr; ptr = (char *) (((unsigned long)segment << 16) + offset); return (ptr); /* ------------------------------------------------------------------ */ /* Function which determines whether EMM device driver is installed. /* ------------------------------------------------------------------ */ char emm_installed() char *EMM_device_name = "EMMXXXX0"; char *int_67_device_name_ptr; /* -------------------------------------------------------- */ /* AH = DOS get interrupt vector function.
  • Page 64 Application Examples /* ------------------------------------------------------------------ */ /* Routine which allocates expanded memory pages and passes /* back to the main EMM handle. /* ------------------------------------------------------------------ */ char allocate_expanded_memory_pages (pages_needed, emm_handle_ptr) pages_needed; unsigned int *emm_handle_ptr; input_regs.h.ah = ALLOCATE_PAGES; input_regs.x.bx = pages_needed; int86 (EMM_INT, &input_regs, &output_regs); if (output_regs.h.ah ==0) { *emm_handle_ptr = output_regs.x.dx;...
  • Page 65 Application Examples /* ------------------------------------------------------------------ */ /* Routine to release all expanded memory pages allocated by an EMM /* handle. /* ------------------------------------------------------------------ */ char deallocate_expanded_memory_pages (emm_handle) unsigned int emm_handle; input_regs.h.ah = DEALLOCATE_PAGES; input_regs.x.dx = emm_handle; int86 (EMM_INT, &input_regs, &output_regs); if (output_regs.h.ah == 0) return (TRUE);...
  • Page 66 Application Examples /* -------------------------------------------------------- */ /* Get expanded memory page frame address. /* -------------------------------------------------------- */ if (!get_page_frame_address (&pf_addr)) exit (1); /* -------------------------------------------------------- */ /* Write to expanded memory. /* -------------------------------------------------------- */ for (index = 0; index < 0x3fff; index++) pf_addr[index] = index; /* -------------------------------------------------------- */ /* Return expanded memory pages before exiting.
  • Page 67 Application Examples Example 2 The following program is an example of how to use the basic EMM functions with Turbo Pascal. The program performs the following steps: 1. Makes sure that the EMM has been installed 2. Displays the EMM version number 3.
  • Page 68 Application Examples GET_UNALLOCATED_PAGE_COUNT= $42; ALLOCATE_PAGES = $43; MAP_PAGES = $44; DEALLOCATE_PAGES = $45; GET_VERSION = $46; STATUS_OK = 0; {-----------------------------------------------------------} { Assume the application needs one EMM page. {-----------------------------------------------------------} APPLICATION_PAGE_COUNT = 1; Regs: Registers; Emm_Handle, Page_Frame_Base_Address, Pages_Needed, Physical_Page, Logical_Page, Offset, Error_Code, Pages_EMM_Available, Total_EMM_Pages,...
  • Page 69 Application Examples {-----------------------------------------------------------} { The function Emm_Installed checks to see if the { EMM is loaded in memory. It does this by looking { for the string ’EMMXXXX0’, which should be located { at 10 bytes from the beginning of the code segment { the EMM interrupt, 67h, points to.
  • Page 70 Application Examples {---------------------------------------------------} { Get the number of currently unallocated pages and } { the total number of pages in the system from EMM. } { Load pseudo-registers prior to invoking EMM. AH = get unallocated page count function. {---------------------------------------------------} AH := Get_Unallocated_Page_Count;...
  • Page 71 Application Examples Regs: Registers; Begin with Regs do Begin {---------------------------------------------------} { Map a logical page at physical page 0. { Load pseudo-registers prior to invoking EMM. AH = map page function DX = handle BX = logical page number AL = physical page number {---------------------------------------------------} AH := Map_Pages;...
  • Page 72 Application Examples {-----------------------------------------------------------} { This function releases the EMM memory pages allocated to { us, back to the EMM memory pool. {-----------------------------------------------------------} Function Deallocate_Expanded_Memory_Pages (Handle: Integer): Integer; Regs: Registers; Begin with Regs do Begin {---------------------------------------------------} { Deallocate the pages allocated to an EMM handle. { Load pseudo-registers prior to invoking EMM.
  • Page 73 Application Examples {-----------------------------------------------} { The upper four bits of AH are the integer { portion of the version number, the lower four } { bits are the fractional portion. Convert the } { integer value to ASCII by adding 48. {-----------------------------------------------} Integer_Part := Char (AL shr 4...
  • Page 74 Application Examples {-----------------------------------------------------------} { Determine if there are enough expanded memory pages for { this application. {-----------------------------------------------------------} Pages_Needed := APPLICATION_PAGE_COUNT; Error_Code := EMM_Pages_Available (Total_EMM_Pages, Available_EMM_Pages); If Error_Code <> STATUS_OK then Error (’Error determining number of EMM pages available.’, Error_code); Writeln (’There are a total of ’, Total_EMM_Pages, ’...
  • Page 75 Application Examples ’ successfully mapped into Physical Page ’, Physical_Page); Writeln; {-----------------------------------------------------------} { Get the expanded memory page frame address. {-----------------------------------------------------------} Error_Code := Get_Page_Frame_Base_Address (Page_Frame_Base_Address); If Error_Code <> STATUS_OK then Error (’EMM test program unable to get the base page’ + ’...
  • Page 76 Application Examples + ’the EMM pages in use.’, Error_Code); Writeln (APPLICATION_PAGE_COUNT, ’ page(s) deallocated.’); Writeln; Writeln (’EMM test program completed.’); end. Example 3 The following program is written in Microsoft’s macro assembler. CODE SEGMENT ASSUME CS:CODE, DS:CODE AX, CS DS, AX check_emm_installed: AH,35h ;...
  • Page 77 Application Examples map_0_to_0: BX,0 ; BX = logical page 0 AL,0 ; AL = physical page 0 AH,AH ; Check EMM status emm_error_handler ; IF error THEN goto error handler ; ELSE get_page_frame_address: AH,41h ; AH = EMM get page frame base ;...
  • Page 78 Application Examples Example 4 The following program is an example of how to change a 256 Kbyte block of data from conventional memory to expanded memory. CODE SEGMENT ASSUME CS:CODE,DS:CODE xchg_packet_set_up: ;DS:SI = xchg_packet AX,SEG xchg_packet DS,AX SI,OFFSET xchg_packet ;Moving 256K of data from conventional memory to expanded memory WORD PTR [SI].region_length [0],0 WORD PTR [SI].region_length [2],4 [SI].src_mem_type, 0...
  • Page 79 Chapter 5 CONFIGURABLE OPTIONS Contents Page OVERVIEW ........... . . MEMORY CHIP TYPE SELECTION .

  • Page 80: Overview

    ZT 8825. It provides specific information to allow you to correctly configure your board. Since the ZT 8825 is a flexible board, several jumpers must be set to select the desired configuration. These jumpers can be divided into the following groups: •...

  • Page 81: Memory Chip Type Selection

    Configurable Options MEMORY CHIP TYPE SELECTION This board typically will be used with EPROMs or SRAMs. Different jumper configurations are required for each chip size and type. All chips in each row of four must be of the same size and type. Jumpers are provided to select various signals for pins 1, 3, 29, 30, and 31 as is shown in Table 5-1.

  • Page 82: Table 5-2 Jumper Selection Of Socket Signals

    (see the table on page 5-8), for write operations to be performed correctly. Other chips on the ZT 8825 may be accessed while the EEPROM is carrying out its long internal write cycle. However, software must keep track, using delay loops or hardware counter/timers, of the interval required before the chip may be accessed again.
  • Page 83 J to pin 8 and pin 4 to pin 9. This applies +5V to EPROM pins 1 and 31 (Vpp and /pgm) to meet non-Intel/AMD requirements. † Flash EPROMs require special software routines for programming. See ZT 8825 Software Support Package documentation.

  • Page 84: Memory Chip Size Selection

    The chip size also determines which address lines must be used by the decoders to generate the eight socket/chip selects. Preprogrammed PALs are used on the ZT 8825 to decode the appropriate address bits based on the chip sizes used. The chip sizes are set on six-segment DIP switch 1 (SW1), which provides the inputs to the PALs.
  • Page 85 Configurable Options Table 5-4 Switch Settings for All Possible Chip Sizes. Switch Section Sockets Total Bytes 654321 On Board 000000 16K † 16K † 128K 001001 32K † 32K † 256K 001010 32K † 64K † 384K 010010 64K † 64K †...

  • Page 86: Table 5-5 Zt 8825 Basic Access Time Requirements

    The ZT 8825 loaded with chips that have access times of less than 290 ns will operate with no wait states with any 5 MHz CPU that meets the STD-80 Series Bus Specification.

  • Page 87: Battery Backup Selection

    Configurable Options BATTERY BACKUP SELECTION A lithium battery can be loaded on the ZT 8825 PC board for use as backup voltage for CMOS RAMs. Ziatech offers a 1 Amp-hour battery as an option for the ZT 8825 (option 003). For maximum...
  • Page 88 When using on-board battery backup, the ZT 8825 uses a voltage comparator to detect when the Vcc supply is less than 4.5 V. When this is true, the ZT 8825 prevents any access to the SRAMs. This comparator can also drive the DCLOW* signal (pin 6, low true) to disable other boards to protect the RAM and/or EEPROM data.
  • Page 89 5-7). Bits 11-8 are hardwired to 1110 (0Eh), and bit 3 is hardwired to logical 1. Bits 2-0 are used to decode the various registers on the ZT 8825. Jumpers W14-11 are used to set address bits 15-12, and Jumpers W10-7 are used to set address bits 7-4. If the jumper is OUT, the corresponding address bit must be a logical 1 in the base address to access the board.

  • Page 90: Memory Address Selection (20- Vs. 24-Bit)

    Configurable Options MEMORY ADDRESS SELECTION (20- VS. 24-BIT) The ZT 8825 is designed to use the multiplexed 20-bit memory addresses as specified by the STD-80 Series standard. The extra four address bits (A16 to A19) are multiplexed onto the data bus (bits 0 to 3) at the beginning of each cycle when MCSYNC* is asserted.

  • Page 91: Iv. Appendices

    IV. APPENDICES ........A-1 JUMPER CONFIGURATIONS .

  • Page 92: Overview

    The ZT 8825 includes several jumper options that tailor the operation of the board to the requirements of specific applications. Jumper designators are shown on the ZT 8825 where space permits and are illustrated in full in Figure A-1 on page A-6.
  • Page 93 Jumper Configurations JUMPER DESCRIPTIONS Table A-1 ZT 8825 Jumper Descriptions. JUMPER # DESCRIPTION Enables absolute addressing mode for the board at power-on or reset time (see page 3-19). W2-5 Enable 24-bit memory addressing mode (see page 3-13). W6† Enables 16-bit I/O port addressing for the on-board registers (see page 3-10).
  • Page 94 Jumper Configurations Table A-1 ZT 8825 Jumper Descriptions (continued). JUMPER # DESCRIPTION W16†† Enables one wait state on all memory accesses (see page 3-6). Used for Ziatech test only; must not be installed. Selects battery backup mode for Row B chips (see page 3-7).

  • Page 95: Jumper Descriptions

    Jumper Configurations Table A-1 ZT 8825 Jumper Descriptions (continued). JUMPER # DESCRIPTION W21† Selects non-battery backup mode for Row A chips (see page 3-7). Enables board to drive DCLOW* when Vcc < 4.5 V (see page 3-7). Enables board to drive PBRESET* when Vcc <...

  • Page 96: User Jumper Configuration

    Jumper Configurations USER JUMPER CONFIGURATION Figure A-1 illustrates jumper locations for the ZT 8825. You may also wish to document your board configuration here. This documentation will allow you to easily restore your configuration in case it is changed. SWITCH CONFIGURATION Table A-2 shows settings for six-segment DIP switch SW1 that correspond to available memory chip sizes.

  • Page 97: Figure A-1 Customer Jumper Configuration

    Jumper Configurations Figure A–1. Customer Jumper Configuration. Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 98: Electrical Specifications

    ....... . ZT 8825 Power Requirements ....... . .

  • Page 99: Zt 88Ct25 Power Requirements

    Powered Standby: +5 VDC ±5% @ 0.06 A max (ZT 88CT08 processor HALT) (not including memory chips) STD Load Characteristics Both the ZT 8825 and the ZT 88CT25 are TTL compatible on the STD bus. The unit load is a convenient method for specifying input and output drive capability of STD bus cards.

  • Page 100: Table B-1 Zt 8825 Std Bus Loading

    Specifications Table B-1 ZT 8825 STD Bus Loading. PIN (CIRCUIT SIDE) PIN (COMPONENT SIDE) OUTPUT DRIVE (LSTTL) OUTPUT DRIVE (LSTTL) INPUT LOAD (CMOS)† INPUT LOAD (CMOS)† MNEMONIC MNEMONIC +5 VOLTS +5 VOLTS GROUND GROUND DC LOW* N.C. D7 3-S (A23)

  • Page 101: Environmental Specifications

    Specifications ENVIRONMENTAL SPECIFICATIONS Operating Temperature ZT 8825: 0˚ through +65˚ Celsius @ < 95% non-condensing, relative humidity @ 40˚ C ZT 88CT25: -40˚ through +85˚ Celsius @ 15% to 90% non- condensing, relative humidity @ 40˚ C Storage Temperature -55˚ through +125˚ Celsius @ < 95% non-condensing, relative humidity @ 40˚...

  • Page 102: Figure B-1 Zt 8825 Card Dimensions

    BOTH EDGES 0.06 RADIUS MAX 2 PL 0.15 X 45 CHAM 3 PL 0.445 0.062 0.007 TOLERANCES 0.XXX = 0.005 INCHES Figure B–1. ZT 8825 Card Dimensions. Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...

  • Page 103: Table B-2 Zt 8825 Rev. A.4 Material List

    Specifications Table B-2 ZT 8825 Rev. A.4 Material List. PART DESCRIPTION PART # 0.1 µF ceramic 0.3" DIP CAP-00061 22µF, tantalum, 25 V, radial CAP-00026 0.025 single row, square, wire-wrap CON-00033 0.025 double row, square, wire-wrap CON-00042 0.1" shorting jack...
  • Page 104 SPDT tiny PC mount SWD-00008 PNP 250 mW B=100 min TRN-2N3906 NPN B=100 @ 150 mA TRN-PN2222 Parts Differences Between ZT 8825 and ZT 88CT25 LOCATION ZT 8825 PART # ZT 88CT25 PART # Pack 3B PAL-50057B PAL-60057C...
  • Page 105 Appendix C HARDWARE QUICK REFERENCE Contents Page JUMPER DESCRIPTIONS ........JUMPER REFERENCE TABLES .
  • Page 106 Hardware Quick Reference JUMPER DESCRIPTIONS Table C-1 ZT 8825 Jumper Descriptions. JUMPER # DESCRIPTION Enables absolute addressing mode for the board at power-on or reset time (see page 3-19). W2-5 Enable 24-bit memory addressing mode (see page 3-13). W6† Enables 16-bit I/O port addressing for the on-board registers (see page 3-10).

  • Page 107: Appendix C. Hardware Quick Reference

    Hardware Quick Reference Table C-1 ZT 8825 Jumper Descriptions (continued). JUMPER # DESCRIPTION W16†† Enables one wait state on all memory accesses (see page 3-6). Used for Ziatech test only; must not be installed. Selects battery backup mode for Row B chips (see page 3-7).

  • Page 108: Jumper Descriptions

    Hardware Quick Reference Table C-1 ZT 8825 Jumper Descriptions (continued). JUMPER # DESCRIPTION W21† Selects non-battery backup mode for Row A chips (see page 3-7). Enables board to drive DCLOW* when Vcc < 4.5 V (see page 3-7). Enables board to drive PBRESET* when Vcc <...

  • Page 109: Jumper Reference Tables

    Table C-2 Jumpers for I/O Base Address Decoding. I/O Address bits Register Number The default I/O base address on the ZT 8825 is 0EE68h (1110 1110 0110 1XXX). Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com...
  • Page 110 J to pin 8 and pin 4 to pin 9. This applies +5V to EPROM pins 1 and 31 (Vpp and /pgm) to meet non-Intel/AMD requirements. † Flash EPROMs require special software routines for programming. See ZT 8825 Software Support Package documentation.
  • Page 111 Hardware Quick Reference Table C-4 Switch Settings for All Possible Chip Sizes. Switch Section Sockets Total Bytes 654321 On Board 000000 16K † 16K † 128K 001001 32K † 32K † 256K 001010 32K † 64K † 384K 010010 64K † 64K †...

  • Page 112: Zt 8825 Revision History

    Original release of the ZT 8825. Revision A - June 7, 1988 The ZT 8825 Revision A was created in order to implement the CMOS version ZT 88CT25 and to remove wire modifications to the ZT 8825. There are no functional differences between Revision 0.1 and Revision A ZT 8825s.

  • Page 113: Revision A.1 - January 1, 1989

    Customer Support Operators Manual, which covers hardware and systems level topics, and the ZT 8825 Software Support Package manual, which addresses software support issues. Chip access times stated in Table 5-5 of the Operators Manual were changed. Revision A.1 - January 1, 1989 This revision was implemented to reduce noise on the data lines caused by some new technology EPROMs.
  • Page 114 Customer Support 2. The "zero-power" PALs used on the ZT 88CT25 are no longer available and have been replaced with Atmel 22V10L low- power PALs. This affects the power requirements in powered standby mode (see page B-2). The new spec is: +5 VDC ±5% @ .065 A max (ZT 88CT08 Processor HALT) (not including memory chips) 3.

  • Page 115: Technical Assistance

    BBS will provide you with current Ziatech product revision and upgrade information. RELIABILITY Ziatech has taken extra care in the design of the ZT 8825 to assure reliability. Three major ways in which reliability is achieved are: 1. The product is designed in top-down fashion, utilizing the latest...

  • Page 116: Warranty

    Life Support Policy: Ziatech products are not authorized for use as critical components in life support devices or systems without the express written approval of the president of Ziatech Corporation. As used herein: 1. Life support devices or systems are devices or systems that...

  • Page 117: Returning For Service

    Customer Support RETURNING FOR SERVICE Before returning any of Ziatech’s products, you must obtain a Returned Material Authorization (RMA) number (call (805) 541-0488). We will need the following information to expedite the shipment of the repaired board or a replacement to you: 1.
  • Page 118 Provides low power density and high noise immunity. DCLOW* STD-80 power bus signal that indicates DC power has dropped below 4.5 V. Used on the ZT 8825 to protect memory data during power failure. EEMS Enhanced Expanded Memory Specification. Expanded Memory Specification.
  • Page 119 Glossary EPROM Erasable Programmable Read Only Memory. Memory is programmed and erased with ultra violet light. Expanded Memory Memory outside the normal 1 Mbyte address space. The Expanded memory manager allows access up to 2 Mbytes per board, 20 Mbytes summed over all EMS boards in the system.
  • Page 120 Glossary MCSYNC* Machine Cycle Sync. STD-80 control signal. Occurs once during each machine cycle of the processor. Used on the ZT 8825 to latch multiplexed memory bits 20-23. MEMEX Memory Expansion. STD-80 control signal. Used on some STD boards to enable 16-bit memory addressing.
  • Page 121 Glossary Pseudo-disk Special software allows PROM and RAM chips to be organized as a "disk" so that DOS can work with this memory in the same manner as regular disks. These chips provide high speed and compact storage. RAM disk See Pseudo-disk.
  • Page 122 INDEX - A - absolute address 3-14, 3-17, 3-18, 3-19, A-2, C-2, E-1 ....access time requirements 2-6, 5-8 ........addressing 20-bit 1-3, 2-7, 3-3, 3-13, 3-15, 5-12...
  • Page 123 ......dimensions and weight of ZT 8825 ......
  • Page 124 - F - features of the ZT 8825 ......... .
  • Page 125 ........mounting the ZT 8825 ......... . .
  • Page 126 ........reliability of the ZT 8825 .
  • Page 127 ............weight and dimensions of ZT 8825 .
  • Page 128 ......ZT 8825 revisions ..........
  • Page 129 Artisan Technology Group is your source for quality new and certified-used/pre-owned equipment SERVICE CENTER REPAIRS WE BUY USED EQUIPMENT • FAST SHIPPING AND DELIVERY Experienced engineers and technicians on staff Sell your excess, underutilized, and idle used equipment at our full-service, in-house repair center We also offer credit for buy-backs and trade-ins •...

This manual is also suitable for:

Zt 88ct25

Table of Contents