Dg-Board (2 Of 3) Block Diagram - Panasonic TH-50PV700P Service Manual

TH-50PV700F / TH-50PV700P / TH-50PX700B / TH-50PX700E

15.16. DG-Board (2 of 3) Block Diagram

PX700B/E OMLY
DG
DIGITAL SIGNAL PROCESSOR
IC8403
CARD 5V
CI SLOT VIN 1
(COMMON 6 VOUT
FAULT 4
INTERFACE)
EN 3
JK8401
Vpp1,Vpp2 18 52
Q8401 Q8402
VCC 17 51
2 6
DATA
D0~D7
30 32
IC8406,IC8407
RESET 58
BUFFER
8
ADDRESS
A0~A14 10 14
21 29
REG# 61
CE1# 7
CONTROL
9 15
OE#,WE#
IORD#,IOWR# 44 45
IREQ# 16
CD1#,CD2# 36 67
CONTROL
MCLK0,WAIT# 57 59
IC8408
ENOUT,PKTRTOUT 62 63
BUFFER
MDO3-MDO7 37 41
DATA0-7
MDO0-MDO2 64 66
STROUT
46
MISTRT
47 50
MDI0~MDI7
DATA0-7
53 56
MIBAL,MCLKI 19 20
SPEN,SPCLK
TU8301
DVB TUNER
IFD1 18
IFD2 17
IF_AGC 16
SCL 15
SDA 14
BM 11 SUB5V
BB 3
1
2
3
4
5
TH-50PX700B/E, TH-50PV700F/P
DG-Board (2 of 3) Block Diagram
SUB 5V
VI1P20
CI_OCP
IS0PSYNC
IC8621,22
IC8401
CI_POWER_ON
D-LATCH
DATA BUFFER
ED16-ED23
IC8554
SUB5V
NOR FLASH
EA1-EA15
IC8402
BUFFER
IC8409
SUB5V
SUB3.3V
BUFFER
SUB3.3V
DATA0-7
SUB5V
SPDATA
IC8404,05 CH0CLK
61
MDO7
TS BUFFER 58
AA_XIRQ2
MDO6
/IRQ 6
57
AA_FE_XRST
MDO5 RESET 9
56
MDO4
53
MDO3
52 IC8301
MDO2
51
FRONT END
IC8302
MDO1
50
COFDM DEMODULATOR
SUB3.3V +1.8V
CH0DATA
49
CH0VAL
48 8 +1.8V
CH0PSYNC
47
31 /VIN
30 VIN
42 AGC1
35 CLK2 AD_SDA2
DATA1 5
AD_SCL2
36 DATA2 CLK1 4
I2C
DG52 1 3 5 7
SUB3.3V
SUB1.8V SUB1.2V SUB3.3V
SERIAL I/F
SUB3.3V
SD CARD I/F
CPU BUS I/F
ExBUS
POD,CI I/F
CI I/F
CI PARALLEL TS
CH,IS IF
CH0CLK
CH0PSYNC
TUNER SERIAL TS
CH0VAL
CH0DATA
IIC I/F
XIRQ2 FE_IRQ
XECS6 PORT14[1]
1.8V
1
I2C
78
8 9 10 11 12 13
Q8801
Q8802
EEPROM_WP
IC8001
PEAKS_Lite II
CLOCK GEN
VC27
CLK74
CK27
CK27D
AUDIO IF
COMMON PORT .etc
JTAG
LVDS I/F
XRST
JTAG
TH-50PX700B/E, TH-50PV700F/P
DG-Board (2 of 3) Block Diagram
11
IC8002,03
DDR 1.8V
IC8601
SUB3.3V
EEPROM
8 VCC
7 WC
AD_SCL3
6 SCL
AD_SDA3
5 SDA
I2C
IC8004
SUB3.3V CLOCK GENE.
VDD
4 VIN
7 74M
9 27M
14 S2
IC5660 DTV9V
PEAKS LITE2 RESET
1 RESET 2
12
13
14
15
16
17