Irq & Mapping Configuration Register Tab; Figure 21: Rssi Window; Table 1: Continuous Mode Dio Mappings - Semtech SX1231SKB User Manual

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(which should not be confused with the LNA or AGC threshold) can be calculated from and equates to the
effective noise floor of the receiver for a given filter bandwidth.
=
+
RSSIthres
[
174
NF
5.4 Irq & Mapping Configuration Register Tab
The Irq & Mapping Configuration Register Tab is illustrated in Figure 22. Please refer to the SX1231 for a
full description of the irq and mappings for each mode of operation of the SX1231.
Configuration register value entries can be selected from the drop down menus besides each DIO listed.
Note that when necessary the GUI will automatically re-configure DIO mappings (i.e. Packet Handler
operation).
Please refer to Table 1 and Table 2, below, for the available DIO mappings of the SX1231 in continuous
and packet mode, respectively.
Mode
DIOx
Mapping
00
01
Sleep
10
11
00
01
Standby
10
11
00
01
FS
10
11
00
01
RX
10
11
00
01
TX
10
11
Revision 2.0 – July 2010
© Semtech 2010
+
+
10
*
log(
2
*
RxBw
)

Figure 21: RSSI Window

DIO5
DIO4
-
-
-
-
LowBat
LowBat
ModeReady
-
ClkOut
-
-
-
LowBat
LowBat
ModeReady
-
ClkOut
-
-
-
LowBat
LowBat
ModeRady
PllLock
ClkOut
Timeout
Rssi
RxReady
LowBat
SyncAddr
ModeReady
PllLock
ClkOut
TxReady
ClkOut
TxReady
LowBat
LowBat
ModeReady
PllLock

Table 1: Continuous Mode DIO Mappings

Page 17 of 24
DemodSNR
]
dBm
DIO3
DIO2
-
-
-
-
AutoMode
-
-
-
-
-
-
-
AutoMode
-
-
-
-
-
-
-
AutoMode
-
-
-
Rssi
Data
RxReady
Data
AutoMode
Data
Timeout
Data
TxReady
Data
TxReady
Data
AutoMode
Data
TxReady
Data
SX1231-31SKB
USER GUIDE
DIO1
DIO0
-
-
-
-
LowBat
LowBat
-
ModeReady
-
-
-
-
-
LowBat
LowBat
ModeReady
-
PllLock
-
-
LowBat
LowBat
PllLock
ModeReady
Dclk
SyncAddr
RxReady
Timeout
LowBat
Rssi
SyncAddr
ModeReady
Dclk
Plllock
LowBat
TxReady
LowBat
LowBat
PllLock
ModeReady
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