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Dallas DS87C550 User Manual Supplement

High-speed microcontroller
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DS87C550
High-Speed Microcontroller
User's Guide Supplement
www.dalsemi.com

Section 1:Introduction

This document is provided as a supplement to the High-Speed Microcontrollers User's Guide, covering
new or modified features specific to the DS87C550. This document must be used in conjunction with
the High-Speed Microcontroller User's Guide, available from Dallas Semiconductor. Addenda are
arranged by section number, which correspond to sections in the High-Speed Microcontroller User's
Guide.
The following additions and changes, with respect to the High-Speed Microcontroller User's Guide, are
contained in this document. This document is a work in progress, and updates/additions will be added as
available.
Section 2:Ordering Information
Information on new members of the High-Speed Microcontroller family has been added.
Section 3:Architecture
No Changes. Information containing new architectural features is contained in the DS87C550 data sheet.
Section 4:Programming Model
Descriptions of new and modified Special Function Registers in the DS87C550 have been included.
Section 5:CPU Timing
Descriptions of the clock multiply/divide modes have been added.
Section 6:Memory Access
Information on EPROM size and the DPTR auto-select feature have been added.
Section 7:Power Management
Changes in the power management clock divisor are discussed.
Section 8:Reset Conditions
A discussion of the reset output has been included.
Section 9: Interrupts
The interrupt structure found on the DS87C550 is described.
Section 10:Parallel I/O
Descriptions of the new I/O ports have been added.
Section 11:Programmable Timers
New clock multiply and divide functions added to the DS87C550's Timers are described.
1 of 93
3/09/00

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Summary of Contents for Dallas DS87C550

  • Page 1: Section 1:Introduction

    This document is provided as a supplement to the High-Speed Microcontrollers User’s Guide, covering new or modified features specific to the DS87C550. This document must be used in conjunction with the High-Speed Microcontroller User’s Guide, available from Dallas Semiconductor. Addenda are arranged by section number, which correspond to sections in the High-Speed Microcontroller User’s...
  • Page 2 Section 17:Troubleshoooting No changes. Section 18:Analog-to-Digital Converter This is a new section describing the A/D converter found on the DS87C550. Section 19:Pulse Width Modulator This is a new section describing the PWM functions found on the DS87C550. 2 of 93...

  • Page 3: Section 2:Ordering Information

    DS87C550 High-Speed Microcontroller User’s Guide Supplement SECTION 2:ORDERING INFORMATION The High-Speed Microcontroller family follows the part numbering convention shown below. Note that not all combinations of devices are planned to be made available. Refer to individual data sheet for available versions.

  • Page 4: Section 3:Architecture

    DS87C550 High-Speed Microcontroller User’s Guide Supplement SECTION 3:ARCHITECTURE No changes. 4 of 93...

  • Page 5: Section 4:Programming Model

    DS87C550 High-Speed Microcontroller User’s Guide Supplement SECTION 4:PROGRAMMING MODEL SPECIAL FUNCTION REGISTERS The following table identifies the complete SFR map for the DS87C550. DS87C550 SPECIAL FUNCTION REGISTER LOCATIONS : Table 550UG-1 REGISTER BIT 7 BIT 6 BIT 5 BIT 4...
  • Page 6 PCM0 PX5/PC3 PX4/PC2 PX3/PC1 PX2/PC0 WDCON SMOD_1 EPFI WDIF WTRF Note: Registers and bits in bold are new to the DS87C550. Registers and bits in bold AND Italic existed in previous high-speed microcontrollers, but at different locations. 6 of 93...
  • Page 7 DS87C550 High-Speed Microcontroller User’s Guide Supplement DS87C550 SPECIAL FUNCTION REGISTER RESET VALUES : Table 550UG-2 REGISTER BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 ADDRESS DPL1 DPH1 PCON Special TCON TMOD CKCON...
  • Page 8 DS87C550 High-Speed Microcontroller User’s Guide Supplement REGISTER BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 ADDRESS CPTH2 CPTH3 PW0FG PW1FG PW2FG PW3FG PWMADR SCON1 SBUF1 PWM0 PWM1 PWM2 PWM3 PW01CS PW23CS PW01CON...

  • Page 9: Stack Pointer (Sp)

    DS87C550 High-Speed Microcontroller User’s Guide Supplement Port 0 (P0) SFR 80h P0.7 P0.6 P0.5 P0.4 P0.3 P0.2 P0.1 P0.0 RW-1 RW-1 RW-1 RW-1 RW-1 RW-1 RW-1 RW-1 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset P0.7-0 Port 0. This port functions as a multiplexed address/data bus during external memory access, and as a general purpose I/O port on devices with internal program memory.
  • Page 10 DS87C550 High-Speed Microcontroller User’s Guide Supplement Data Pointer Low 1 (DPL1) SFR 84h DPL1.7 DPL1.6 DPL1.5 DPL1.4 DPL1.3 DPL1.2 DPL1.1 DL1H.0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset DPL1.7-0 Data Pointer Low 1. This register is the low byte of the auxiliary 16-bit data pointer.
  • Page 11 DS87C550 High-Speed Microcontroller User’s Guide Supplement Power Control (PCON) SFR 87h SMOD_0 SMOD0 OFDF OFDE STOP IDLE RW-0 RW-0 RW-* RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset; *=see description Serial Port 0 Baud Rate Doubler Enable. This bit enables/disables the...
  • Page 12 DS87C550 High-Speed Microcontroller User’s Guide Supplement Timer/Counter Control (TCON) SFR 88h RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset Timer 1 Overflow Flag. This bit indicates when Timer 1 overflows its maximum count as defined by the current mode. This bit can be cleared by...
  • Page 13 DS87C550 High-Speed Microcontroller User’s Guide Supplement Timer Mode Control (TMOD) SFR 89h GATE GATE RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset Timer 1 Gate Control. This bit enable/disables the ability of Timer 1 to GATE increment.
  • Page 14 DS87C550 High-Speed Microcontroller User’s Guide Supplement Timer 0 LSB (TL0) SFR 8Ah TL0.7 TL0.6 TL0.5 TL0.4 TL0.3 TL0.2 TL0.1 TL0.0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset TL0.7-0 Timer 0 LSB. This register contains the least significant byte of Timer 0.
  • Page 15 All Watchdog Timer reset time-outs follow the setting of the interrupt flag by 512 clocks. The DS87C550 does not incorporate a watchdog interrupt, but a similar effect may be achieved by polling its flag.
  • Page 16 DS87C550 High-Speed Microcontroller User’s Guide Supplement Timer 0, 1, and 2 values as a function of various clock control settings OSCILLATOR OSC CYCLES OSC CYCLES OSC CYCLES PER OSC CYCLES PER CYCLES PER PER TIMER 0/1/2 PER TIMER 2 SERIAL PORT CLK, SERIAL PORT CLK, MACHINE.
  • Page 17 DS87C550 High-Speed Microcontroller User’s Guide Supplement Port 1 (P1) SFR 90h P1.7 P1.6 P1.5 P1.4 P1.3 P1.2 P1.1 P1.0 TXD1 RXD1 T2EX RW-1 RW-1 RW-1 RW-1 RW-1 RW-1 RW-1 RW-1 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset P1.7-0 General Purpose I/O Port 1. This register functions as a general purpose I/O port.
  • Page 18 DS87C550 High-Speed Microcontroller User’s Guide Supplement Ring Oscillator Control (RCON) SFR 91h CKRDY RGMD RGSL RW-* RT-0 R=Unrestricted Read, W=Unrestricted Write, T=Timed Access Write Only, -n =Value after Reset, * = See Description Bits 7 – 4 Reserved. Read data will be indeterminate.
  • Page 19 DS87C550 High-Speed Microcontroller User’s Guide Supplement Serial Port 0 Control (SCON0) SFR 98h SM0/FE_0 SM1_0 SM2_0 REN_0 TB8_0 RB8_0 T1_0 R1_0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset SM0-2 Serial Port Mode These bits control the mode of serial port 0. In addition the SM0 and SM2_0 bits have secondary functions as shown below.
  • Page 20 DS87C550 High-Speed Microcontroller User’s Guide Supplement Receiver Enable. This bit enable/disables the serial port 0 receiver shift register. REN_0 Bit 4 0 = Serial port 0 reception disabled. 1= Serial port 0 receiver enabled (modes 1, 2, 3). Setting this bit will initiate synchronous reception in mode 0.

  • Page 21: Power Management Register (Pmr)

    DS87C550 High-Speed Microcontroller User’s Guide Supplement Power Management Register (PMR) SFR 9Fh ALEOFF DME1 DME0 R*-1 R*-0 RW-0 R*-0 R*-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset; * = See Description CD1,CD0 Clock Divide Control : These bits select the source of the system clock and Bits 7, 6 determine the number of clocks per machine cycle as indicated in the table.
  • Page 22 DS87C550 High-Speed Microcontroller User’s Guide Supplement ALEOFF ALE Disable When set to 1, this bit disables ALE during on-board memory accesses. Any off-chip memory access will cause ALE to automatically toggle Bit 2 regardless of the state of this bit. When this bit is 0, ALE toggles for all memory accesses whether the memory is inside or outside of the chip.
  • Page 23 DS87C550 High-Speed Microcontroller User’s Guide Supplement Slave Address Register 1 (SADDR1) SFR A2h SADDR1.7 SADDR1.6 SADDR1.5 SADDR1.4 SADDR1.3 SADDR1.2 SADDR1.1 SADDR1.0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset SADDR1.7-0 Slave Address Register 1. This register is programmed by the user with the given or broadcast address assigned to serial port 1.
  • Page 24 DS87C550 High-Speed Microcontroller User’s Guide Supplement Enable External Interrupt 1. This bit controls the masking of external interrupt Bit 2 0 = Disable external interrupt 1. 1 = Enable all interrupt requests generated by the pin. Enable Timer 0 Interrupt. This bit controls the masking of the Timer 0 interrupt.
  • Page 25 DS87C550 High-Speed Microcontroller User’s Guide Supplement Compare Register Two LSB (CMPL2) SFR ABh CMPL2.7 CMPL2.6 CMPL2.5 CMPL2.4 CMPL2.3 CMPL2.2 CMPL2.1 CMPL2.0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset CMPL2.7-0 Compare Register Two LSB. This register is one of three used to store the least significant 8-bit value for the Timer 2’s comparison functions.
  • Page 26 DS87C550 High-Speed Microcontroller User’s Guide Supplement Capture Register Two LSB (CPTL2) SFR AEh CPTL2.7 CPTL2.6 CPTL2.5 CPTL2.4 CPTL2.3 CPTL2.2 CPTL2.1 CPTL2.0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset CPTL2.7-0 Capture Register Two LSB. This register is used to capture the least significant 8-bit value for the Timer 2’s channel 2 capture function.
  • Page 27 DS87C550 High-Speed Microcontroller User’s Guide Supplement Port 3 (P3) SFR B0h P3.7 P3.6 P3.5 P3.4 P3.3 P3.2 P3.1 P3.0 TXD0 RXD0 RW-1 RW-1 RW-1 RW-1 RW-1 RW-1 RW-1 RW-1 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset P3.7-0 General Purpose I/O Port 3. This register functions as a general purpose I/O port.
  • Page 28 DS87C550 High-Speed Microcontroller User’s Guide Supplement A/D Converter Control Register 1 (ADCON1) SFR B2h ADEX ADON WCIO STRT CONT R*-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset; *=See description Start/Busy. When this bit is changed from a 0 to a 1, an A/D conversion starts. It...
  • Page 29 DS87C550 High-Speed Microcontroller User’s Guide Supplement A/D Converter Control Register 2 (ADCON2) SFR B3h OUTCF MUX2 MUX1 MUX0 APS3 APS2 APS1 APS0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset OUTCF Output Conversion Format. When this bit is set, the ADMSB register contains...
  • Page 30 DS87C550 High-Speed Microcontroller User’s Guide Supplement A/D Result Most Significant Byte (ADMSB) ADMSB. ADMSB. ADMSB. ADMSB. ADMSB. ADMSB. ADMSB. ADMSB.7 SFR B4h R*-0 R*-0 R*-0 R*-0 R*-0 R*-0 R*-0 R*-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset; *=see description ADMSB7:0 A/D Result Most Significant Byte.
  • Page 31 DS87C550 High-Speed Microcontroller User’s Guide Supplement Interrupt Priority (IP) SFR B8h RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset Bit 7 Reserved. Read data is indeterminate. A/D Interrupt. This bit controls the priority of the A/D Converter interrupt.
  • Page 32 DS87C550 High-Speed Microcontroller User’s Guide Supplement Slave Address Mask Enable Register 0 (SADEN0) SFR B9h SADEN0 SADEN0 SADEN0 SADEN0 SADEN0 SADEN0 SADEN0 SADEN0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset SADEN0.7-0 Slave Address Mask Enable Register 0. This register functions as a mask when comparing serial port 0 addresses for automatic address recognition.
  • Page 33 DS87C550 High-Speed Microcontroller User’s Guide Supplement Timer 2 Control (T2CON) SFR BEh EXF2 RCLK TCLK EXEN2 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset Timer 2 Overflow Flag. This flag will be set when Timer 2 overflows from FFFFh or the count equal to the capture register in down count mode.
  • Page 34 DS87C550 High-Speed Microcontroller User’s Guide Supplement Timer 2 Run Control. This bit enables/disables the operation of timer 2. Halting this timer will preserve the current count in TH2, TL2. Bit 2 0 = Timer 2 is halted. 1 = Timer 2 is enabled.
  • Page 35 DS87C550 High-Speed Microcontroller User’s Guide Supplement Parallel I/O Port Four (P4) SFR C0h P4.7 P4.6 P4.5 P4.4 P4.3 P4.2 P4.1 P4.0 CMT1 CMT0 CMSR5 CMSR4 CMSR3 CMSR2 CMSR1 CMSR0 RW-1 RW-1 RW-1 RW-1 RW-1 RW-1 RW-1 RW-1 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset P4.7-0...
  • Page 36 DS87C550 High-Speed Microcontroller User’s Guide Supplement Compare Match Set/Reset Pin 2. This pin alternately serves as an output for CMSR2 the Timer 2 compare function. It will be set if CMS2 (SETR.2) is 1 and a match Bit 2 occurs between Timer 2 and 16-bit compare register CMPH0:CMPL0. It will be reset if CMR2 (RSTR.2) is 1 and a match occurs between Timer 2 and 16-bit...

  • Page 37: Status Register (Status)

    DS87C550 High-Speed Microcontroller User’s Guide Supplement Parallel I/O Port Five (P5) SFR C4h P5.7 P5.6 P5.5 P5.4 P5.3 P5.2 P5.1 P5.0 ADC7 ADC6 ADC5 ADC4 ADC3 ADC2 ADC1 ADC0 RW-1 RW-1 RW-1 RW-1 RW-1 RW-1 RW-1 RW-1 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset P5.7-0...
  • Page 38 DS87C550 High-Speed Microcontroller User’s Guide Supplement SPRA1 Serial Port 1 Receive Activity Monitor. When set, this bit indicates that data is currently being received by serial port 1. It is cleared when the internal hardware Bit 2 sets the RI_1 bit. Do not alter the Clock Divide Control bits (CD1:0) while this bit is set or serial port data may be lost.
  • Page 39 DS87C550 High-Speed Microcontroller User’s Guide Supplement External Interrupt Flag Register (T2IR) SFR C8h CM2F CM1F CM0F IE5/CF3 IE4/CF2 IE3/CF2 IE2/CF0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset Bit 7 Reserved. Read data is indeterminate.
  • Page 40 DS87C550 High-Speed Microcontroller User’s Guide Supplement IE3/CF1 External Interrupt 3 or Capture Interrupt 1 Flag. This bit serves as an interrupt flag for External Interrupt 3 and alternatively for the capture function Bit 1 (capture register 1) of Timer 2. If either capture trigger bit CT1 or (CTCON.2 or 3) is set, then the capture function register 1 is enabled, and this bit...
  • Page 41 DS87C550 High-Speed Microcontroller User’s Guide Supplement Compare Register 2 MSB (CMPH2) SFR CBh CMPH2.7 CMPH2.6 CMPH2.5 CMPH2.4 CMPH2.3 CMPH2.2 CMPH2.1 CMPH2.0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset CMPH2.7-0 Compare Register 2 MSB. This register is used to store the most significant 8- bit value for one of the three available Timer 2 comparison functions.
  • Page 42 DS87C550 High-Speed Microcontroller User’s Guide Supplement Capture Register 2 MSB (CPTH2) SFR CEh CPTH2.7 CPTH2.6 CPTH2.5 CPTH2.4 CPTH2.3 CPTH2.2 CPTH2.1 CPTH2.0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset CPTH2.7-0 Capture Register 2 MSB. This register loads the most significant 8-bit value of...

  • Page 43: Program Status Word (Psw)

    DS87C550 High-Speed Microcontroller User’s Guide Supplement Program Status Word (PSW) SFR D0h PARITY RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset Carry Flag. This bit is set when if the last arithmetic operation resulted in a carry (during addition) or a borrow (during subtraction).
  • Page 44 DS87C550 High-Speed Microcontroller User’s Guide Supplement PWM0 Frequency Generator Register (PW0FG) SFR D2h PW0FG.7 PW0FG.6 PW0FG.5 PW0FG.4 PW0FG.3 PW0FG.2 PW0FG.1 PW0FG.0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset PW0FG.7-0 PWM0 Clock Generator Register. This register contains the user defined...
  • Page 45 DS87C550 High-Speed Microcontroller User’s Guide Supplement PWM3 Frequency Generator Register (PW3FG) SFR D5h PW3FG.7 PW3FG.6 PW3FG.5 PW3FG.4 PW3FG.3 PW3FG.2 PW3FG.1 PW3FG.0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset PW3FG.7-0 PWM3 Clock Generator Register. This register contains the user defined value, N which determines the repetition rate for 8-bit PWM channel 3.
  • Page 46 DS87C550 High-Speed Microcontroller User’s Guide Supplement Serial Port Control (SCON1) SFR D8h SM0/FE_1 SM1_1 SM2_1 REN_1 TB8_1 RB8_1 TI_1 RI_1 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset SM0-2 Serial Port 1 Mode. These bits control the mode of serial port 1 as shown below.
  • Page 47 DS87C550 High-Speed Microcontroller User’s Guide Supplement Receive Enable. This bit enables/disables the serial port 1 receiver shift register. REN_1 Bit 4 0 = Serial port 1 reception disabled. 1 = Serial port 1 receiver enabled (modes 1, 2, 3). Initiate synchronous reception (mode 0).
  • Page 48 DS87C550 High-Speed Microcontroller User’s Guide Supplement PWM0 Value Register (PWM0) SFR DCh PWM0.7 PWM0.6 PWM0.5 PWM0.4 PWM0.3 PWM0.2 PWM0.1 PWM0.0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset PWM0.7-0 PWM0 Value Register. This register provides read/write access to timer and compare resources found in the pulse generator section of 8-bit PWM channel 0.
  • Page 49 DS87C550 High-Speed Microcontroller User’s Guide Supplement PWM2 Value Register (PWM2) SFR DDh PWM2.7 PWM2.6 PWM2.5 PWM2.4 PWM2.3 PWM2.2 PWM2.1 PWM2.0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset PWM2.7-0 PWM2 Value Register. This register provides read/write access to timer and compare resources found in the pulse generator section of 8-bit PWM channel 2.
  • Page 50 DS87C550 High-Speed Microcontroller User’s Guide Supplement PWM0 and PWM1 Clock Select Register (PW01CS) SFR E1h PW0S2 PW0S1 PW0S0 PW0EN PW1S2 PW1S1 PW1S0 PW1EN RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset PW0S2:PW0S0 PWM0 Clock Select Bits. These bits determine which of the available prescaler Bits 7-5 outputs are selected as the PWM0 clock generator inputs as shown below.
  • Page 51 DS87C550 High-Speed Microcontroller User’s Guide Supplement PWM2 and PWM3 Clock Select Register (PW23CS) SFR E2h PW2S2 PW2S1 PW2S0 PW2EN PW3S2 PW3S1 PW3S0 PW3EN RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset PW2S2:PW2S0 PWM2 Clock Select Bits. These bits determine which of the available prescaler Bits 7-5 outputs are selected as the PWM2 clock generator inputs.
  • Page 52 DS87C550 High-Speed Microcontroller User’s Guide Supplement PWM0 Timer/Compare Value Select. When this bit is cleared (reset default PW0T/C condition), a read or write to register PWM0 accesses the compare register Bit 4 portion of the PWM0 Pulse Generator. When this bit is set, a read or write to register PWM0 access the timer portion of the PWM0 Pulse Generator.
  • Page 53 DS87C550 High-Speed Microcontroller User’s Guide Supplement PWM2 and PWM3 Control Register (PW23CON) SFR E4h PW2F PW2DC PW2OE PW2T/C PW3F PW3DC PW3OE PW3T/C RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset PW2F PWM2 Flag. A 1 in this bit indicates that the 8-bit PWM channel 2 (or 16-bit...
  • Page 54 DS87C550 High-Speed Microcontroller User’s Guide Supplement Timer 2 Auto Reload Register LSB (RLOADL) RLOADL.7 RLOADL.6 RLOADL.5 RLOADL.4 RLOADL.3 RLOADL.2 RLOADL.1 RLOADL.0 SFR E6h RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset RLOADL.7-0 Timer 2 Auto Reload Register LSB. This register holds the LSB of the 16-bit reload value when Timer 2 is configured in auto-reload mode ( = 0).
  • Page 55 DS87C550 High-Speed Microcontroller User’s Guide Supplement Extended Interrupt Enable (EIE) SFR E8h ECM2 ECM1 ECM0 EX5/EC3 EX4/EC2 EX3/EC1 EX2/EC0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset Enable Timer 2 Interrupt. Setting this bit enables interrupts from the Timer 2 TF2 flag (T2CON.7) and/or T2FB flag (T2SEL.4).
  • Page 56 DS87C550 High-Speed Microcontroller User’s Guide Supplement Timer 2 Interrupt/Clock Select (T2SEL) SFR EAh TF2S TF2BS TF2B T2P1 T2P0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset Timer 2 16-Bit Overflow Interrupt Select. Setting this bit enables interrupts TF2S resulting from a Timer 2 16-bit overflow (sets TF2 flag T2CON.7).
  • Page 57 DS87C550 High-Speed Microcontroller User’s Guide Supplement Capture Trigger Control Register (CTCON) SFR EBh RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset Capture Register CPTR3 Negative Trigger Enable. Setting this bit enables the transfer of Timer 2 contents into 16-bit capture register pair CPTH3:CPTL3 Bit 7 on the falling edge of the signal on pin INT5/CT3 (P1.3).
  • Page 58 DS87C550 High-Speed Microcontroller User’s Guide Supplement Capture Register CPTR0 Negative Trigger Enable. Setting this bit enables the transfer of Timer 2 contents into 16-bit capture register pair CPTH0:CPTL0 Bit 1 on the falling edge of the signal on pin INT2/CT0 (P1.0). When set, this bit also configures External Interrupt 2 to respond to a negative edge (if enabled).
  • Page 59 DS87C550 High-Speed Microcontroller User’s Guide Supplement Compare Match Set Enable Register (SETR) SFR EEh TGFF1 TGFF0 CMS5 CMS4 CMS3 CMS2 CMS1 CMS0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset TGFF1 Compare Match Toggle Flip-Flop 1. This bit is used as a toggle flip-flop for Port pin CMT1 (P4.7).
  • Page 60 DS87C550 High-Speed Microcontroller User’s Guide Supplement Compare Match Reset/Toggle Enable Register (RSTR) SFR EFh CMTE1 CMTE0 CMR5 CMR4 CMR3 CMR2 CMR1 CMR0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset CMTE1 Compare Match Toggle Enable 1. Setting this bit enables the toggle function on port pin CMT1 (P4.7) when the contents of Timer 2 and the 16-bit register...
  • Page 61 DS87C550 High-Speed Microcontroller User’s Guide Supplement B Register SFR F0h RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 RW-0 R=Unrestricted Read, W=Unrestricted Write, -n=Value after Reset B.7-0 B Register. This register serves as a second accumulator for certain arithmetic operations. Bits 7-0...
  • Page 62 DS87C550 High-Speed Microcontroller User’s Guide Supplement PWM Channel 3 Output. If enabled by PW3OE = PW23CON.1 = 1, this pin PWMO3 serves as the output for PWM channel 3. Otherwise this pin serves as a standard Bit 3 I/O pin.
  • Page 63 DS87C550 High-Speed Microcontroller User’s Guide Supplement PX3/PC1 External Interrupt 3 Priority or Capture 1 Interrupt Priority. This bit determines the priority (0 = normal, 1= high) of the Timer 2 Capture channel 1 if Bit 1 it is in use or External Interrupt 3 if enabled and the capture function is disabled.
  • Page 64 512 clocks prior to a watchdog reset. This bit can be considered a watchdog interrupt flag even though there is no interrupt associated with the watchdog timer in the DS87C550. This bit must be cleared by software and can only be modified using a Timed Access Procedure.

  • Page 65: Section 5:Cpu Timing

    The majority of the information contained in the original “High-Speed Microcontroller User’s Guide” applies to the DS87C550. The only differences are found in the clock divider circuits between the crystal oscillator (or external clock source) and the clock distribution circuitry. Early members of the High-Speed Microcontroller family offer the option of 4, 256, or 1024 clocks per machine cycle.
  • Page 66 DS87C550 High-Speed Microcontroller User’s Guide Supplement The system clock or some derivative there of is provided to all of the peripherals inside the microcontroller and the machine cycle clock provides the basic 4-state clock for all CPU functions. The relationship of the crystal (or external oscillator) to the system clock and machine cycle clock along with the control settings is shown in Table 5-1.

  • Page 67: Section 6:Memory Access

    The DS87C550 supports the memory access features of the DS87C520 described in the High-Speed Microcontroller User's Guide. Exceptions are noted below. INTERNAL PROGRAM MEMORY The DS87C550 contains 8 kbytes of EPROM as on-board program storage. This memory resides at fixed addresses from 0000h to 1FFFh. ROMSIZE FEATURE The ROMSIZE feature is used to select the maximum on-chip decoded address for program memory.
  • Page 68 DS87C550 High-Speed Microcontroller User’s Guide Supplement DPTR DPTR, #data16 MOVC A, @A+DPTR MOVX A, @DPTR MOVX @DPTR, A This feature allows further reduction of code for data movement operations, and therefore even higher performance. The following example demonstrates the improved efficiency.
  • Page 69 Stretch MOVX feature. In all members of this family (including the DS87C550), increasing the stretch value from 0 to 1 causes setup and hold times to be increased by 1 crystal clock period each. In older members of the family, there is no further change in setup and hold times regardless of the stretch value selected.

  • Page 70: Section 7: Power Management

    Switching between clock sources The ring oscillator on the DS87C550 is similar to that on the DS80C320. As such it does not support the "run from ring" feature which allows the microprocessor to use the ring oscillator as a clock source after the external crystal has stabilized (CKRY=1).

  • Page 71: Section 8: Reset Conditions

    (RST) both an input and an output. Normally, this pin is an active high input for a reset signal generated elsewhere in the system. With the DS87C550, this pin functions as an input as before, but now will also provide an output when the reset originates from within the processor.
  • Page 72 DS87C550 High-Speed Microcontroller User’s Guide Supplement circumstances should an R-C timing circuit be connected to the RST pin of the DS87C550. If the RST pin is too heavily loaded (capacitance), it may be necessary to add a pull-up resistor to speed up the low-to- high transition.

  • Page 73: Section 9: Interrupts

    DS87C550 High-Speed Microcontroller User’s Guide Supplement SECTION 9: INTERRUPTS The DS87C550 uses the same interrupt and interrupt priority system as all other members of the High- Speed Microcontroller family. The specific interrupts and their related flags and control bits are identified in Table 9-1 below.

  • Page 74: Section 10: Parallel I/O

    Ports 4, 5 and 6 are new, and are described in the DS87C550 data sheet. Ports 4 and 6 operate as quasi bi- directional I/O pins, while port 5 function as an 8-bit open-drain bi-directional I/O port.

  • Page 75: Section 11: Programmable Timers

    As stated earlier, the only differences in timer/counter 0 and 1 contained in older members of the High- Speed Microcontroller family and those found in the DS87C550 are in the clock selection possibilities. Drawings of these possibilities for various modes are given below.
  • Page 76 DS87C550 High-Speed Microcontroller User’s Guide Supplement TIMER/COUNTER 0 AND 1, MODE 2: Figure 11-2. T0M = CKCON.3 (T1M = CKCON.4) CD1:0 CLK OUT /3,072 anything else C/T = TMOD.2 (C/T = TMOD.6) 2X CD1:0 CLK OUT (TL1) /CLK /1024 T0 = P3.4 (T1 = P3.5)
  • Page 77 Where TxM is either the T0M or T1M SFR bit TIMER 2 As stated earlier, the functionality of Timer/Counter 2 in the DS87C550 is a superset of the functions found on earlier members of the High-Speed Microcontroller family. However, for the same functions, the clock selection options are slightly different.
  • Page 78 DS87C550 High-Speed Microcontroller User’s Guide Supplement TIMER/COUNTER 2, AUTO RELOAD MODE (/RL2 = 0): Figure 11-5. (a) DCEN = 0 T2P1 T2P0 Divisor CD1:0 CLK OUT /3,072 anything else 2X CD1:0 CLK OUT C/T2 = T2CON.1 /CLK TF2 = /1024 T2M = CKCON.5...
  • Page 79 EXEN2 = T2CON.3 TIMER 2 CAPTURE MODE The capture mode of Timer 2 in the DS87C550 is slightly different from that function implemented on other High-Speed Microcontrollers. In the DS87C550, there are four 16-bit registers (eight 8-bit registers concatenated) that can capture values. Timer 2’s output is the value that is captured when appropriate. It should be noted that Timer 2 can be configured in a number of different ways (i.e., counter, timer, auto-...
  • Page 80 P1.3 TIMER 2 COMPARE MODE Timer 2 of the DS87C550 offers a compare mode not previously included in any of the earlier high-speed microcontroller family members. The actual comparison takes place between Timer 2’s 16-bit output and three 16-bit (actually six 8-bit concatenated) compare registers CMPH0:CMPL0, CMPH1:CMPL1, CMPH2:CMPL2.

  • Page 81: Watchdog Timer

    (RSTR.7) WATCHDOG TIMER The DS87C550 contains a watchdog timer that is very similar to that found in other members of the high- speed microcontroller family. It is driven directly off of the internal crystal oscillator (or external clock attached to XTAL1), and offers several divider chains to provide a wide variety of time-out selections.
  • Page 82 8051 timers. Another difference unique to the watchdog timer on the DS87C550 is the fact that there is no interrupt associated with it. Since there are so many other interrupt sources on the DS87C550, it was decided that an interrupt for the watchdog was less important than others and therefore not provided.
  • Page 83 DS87C550. While it has never been known to happen, it was theorized that it would be possible for the oscillator to stop functioning at a time when the processor was commanding some external action to take place.

  • Page 84: Section 18: Analog To Digital Convertor

    DS87C550 High-Speed Microcontroller User’s Guide Supplement SECTION 18: ANALOG TO DIGITAL CONVERTOR Some members of the High-Speed Microcontroller family (DS87C550 for example) incorporate an on- board Analog-to-Digital Converter (A/D). When incorporated, these devices provide eight channels of analog input, internal sample & hold circuitry, a 10-bit successive approximation A/D converter, and related output and control registers.
  • Page 85 DS87C550 High-Speed Microcontroller User’s Guide Supplement writing a “1” to the STRT/BSY bit of the ADCON1 register, or alternately by a falling edge on the STADC pin when the ADEX bit of the ADCON1 is set. When the conversion starts, the analog value on the selected pin is held in the sample and hold circuitry for the remainder of the conversion.
  • Page 86 WINDOWED COMPARATOR The A/D Converter found in some Dallas High-Speed Microcontrollers has a unique feature associated with it called the Window Comparator. This feature allows the user to establish boundaries against which each A/D converter result is compared.
  • Page 87 DS87C550 High-Speed Microcontroller User’s Guide Supplement A/D result. This must be taken into account when selecting the values to be loaded into the WINHI and WINLO registers. The equations for the window comparison function are as follows: ≥ ≥ ≥ ≥...

  • Page 88: Section 19: Pulse Width Modulation

    DS87C550 High-Speed Microcontroller User’s Guide Supplement SECTION 19: PULSE WIDTH MODULATION Some members of the High-Speed Microcontroller family incorporate Pulse Width Modulation (PWM) capability. When incorporated, there are four independent 8-bit channels provided, each of which can operate at a different repetition rate and with an independent pulse width setting. For more precise PWM requirements, two 8-bit PWM channels can be combined into one 16-bit PWM channel.
  • Page 89 DS87C550 High-Speed Microcontroller User’s Guide Supplement PWM0 CLOCK GENERATOR : Figure PWM2 PWM 0 CLOCK GENERATOR Pre-Scaler SYSTEM CLOCK 8-BIT AUTORELOAD PWM0 DOWN COUNTER PULSE EXT CLK GENERATOR PWMC0 PW01CS PW0FG (PW0S2:0, PW0EN) Special Function Registers PW01CS and PW23CS contain the bits that select the prescaler output and also enable/disable the Clock Generator module.

  • Page 90: Pulse Generator

    DS87C550 High-Speed Microcontroller User’s Guide Supplement As a simple example of this timing information, assume that the processor is in its reset default condition running from an 11.0592 MHz crystal (or external clock), and the user wants to establish the maximum repetition rate for PWM0 while maintaining a machine cycle clock of divide by 4.
  • Page 91 DS87C550 High-Speed Microcontroller User’s Guide Supplement PWM0 PULSE GENERATOR : Figure PWM3. OUTPUT FLIP PWMO0 CONTROL FLOP ZERO MATCH COMPARATOR COMPARATOR FROM PWM0 COMPARE 8-BIT COUNTER CLOCK VALUE GENERATOR PWM0 PW01CON PW0T/C The user supplied value contained in the PWMx register is reloaded into the compare value register when there is a match between the counter and the value.
  • Page 92 DS87C550 High-Speed Microcontroller User’s Guide Supplement Achieving 16-bit PWM operation involves the concatenation of resources found in the Pulse Generator section of the PWM function. This is illustrated in Figure PWM4. As shown, two 8-bit counters are combined to form a 16-bit counter and two 8-bit compare value registers are combined to form a 16-bit compare value register.
  • Page 93 DS87C550 High-Speed Microcontroller User’s Guide Supplement Similarly, setting bit PW1T/C (PW01CON.0) allows register PWM1 to access the MSB of the 16-bit counter. Clearing it accesses the MSB compare value register. As described in 8-bit mode, flags PW0F (PW01CON.7) and PW2F (PWM23CON.7) indicate a rollover from 0FFh to 00h of the counters for 16-bit PWM0 and PWM1 respectively.

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