Panasonic SU-HTB550PH Service Manual page 23

6.1.4. MAIN (DSP) CIRCUIT (2/2)
15 16 17
SCHEMATIC DIAGRAM - 8
A
MAIN (DSP) CIRCUIT
1
2
4
TO MAIN (DSP)
SECTION (1/2)
7
8
DSP_SD3
DSP_SD2
9 DSP_SD1
DSP_SCLK
10
DSP_LRCLK
11
12
13
P1
15 16 17
18 19 20
: +B SIGNAL LINE : OPTICAL/AUX AUDIO INPUT SIGNAL LINE
HD
G2001*
C2001
0.1 COM
4 3
CH0
V+
5 2
R2005 GND
LB2006
33
J0JHC0000078
A
6 1
CH1
R2006 33
IC2002
C0JBAR000396
2CH MULTIPLEXER
DSP_MCLK
38 37 36 35 34 33 32 31 30 29 28 27
39
40
41
TEST
42
VDD1
43 HS3
44
DAO2_SCLK
[39] HS4
45
GND1 [40] DAO_MCLK
C2002
46
DAO2_LRCLK
0.1
47 DAO1_DATA3
R2003 33
48 DAO_DATA2
R2044 33
49 DAO_DATA1
50 VDDIO1
R2007 33
51
DAO_DATA0
R2013 33
52
DAO_SCLK1
C2003
53
GNDIO1
R2014 33
0.1
54
DAO_LRCKL1
55 VDD2
C2004
56 GND2
R2015
0.1
57
SD_DQM0#
33
58 EXT_D7
59 [65] EXT_D1
EXT_D6
[66] EXT_WE
60
EXT_D5
61
EXT_D4
62 VDDIO2
EXT_D3
63
EXT_D2
64
65 66 67 68 69 70 71 72 73 74 75 76
7 5 3 1 7 5 3 1 7 5 3 1 7 5
8 6 4 2 8 6 4 2 8 6 4 2 8 6
18 19 20
21 22 23
: AUDIO OUTPUT SIGNAL LINE
25 24 23 22 21 20 19 18 16 14 13 12 11 10 9 8 7 6 5 4
17 15 3
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48
C2011
10P C2012
X2001
10P
C2010
GND
0.1
4 3
1 2
GND
R2033
1M
C2031
22P
C2020
10
26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
SCP1_BSY
128
GND6 127
C2022
SCP1_CLK 126
0.1
VDD6 125
SCP1_MISO 124
SCP1_MOSI
123
[1] SCP2_CLK C2023
[2] SCP2_MISO GNDIO6 122
0.1
[3] SCP2_MOSI
RESET 121
VDDIO6
120
EXT_CS1# 119
EXT_OE#
118
IC2001 EXT_A19 117
EXT_A18 116
C2HBCY000102 C2025
GND5 115
DIGITAL SOUND PROCESSOR
0.1
EXT_A17 114
EXT_A16 113
VDD5 112
EXT_A15 111
SD_CS# 110
SD_RAS# 109
SD_CAS# 108
[103] BA0/EXT_A13
[104] EXT_A10
SD_WE# 107
BA1/EXT_A14
106
C2026
GNDIO5 105
0.1
104
C2027
103
10
100 101 102
77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99
C2028
10
3 1 7 5 3 1 7 5 3 1 7 5 3 1
4 2 8 6 4 2 8 6 4 2 8 6 4 2
21 22 23
23
24 25 26
LB2011
J0JHC0000078
2 1
IC2003
C3ABMY000029
16M SDRAM
49 50
G2902*
IC2902
C0CBCAG00015
+1.8V VOLTAGE REGULATOR
5 4 3 2 1
D2903
B0ECKP000002
LB2905
J0JHC0000078
LB2906
J0JCC0000396
LB2904
J0JHC0000078
G2002*
R2037 100
C2021
10
R2038 1K
R2039 1K
R2040
R2061 R2060
100
4.7K
R2041 100 4.7K
D2001
B0JCCD000017
R2042
100 R2043 1K
R2428 100
D2002
B0JCCD000017
RX2008
/SD_CS
2 1
/RAS
4 3
/CAS
6 5
/SD_WE
8 7
HD: MAIN (HDMI) CIRCUIT: SCHEMATIC DIAGRAM - 1 ~ 4
CP: MAIN (CPU) CIRCUIT: SCHEMATIC DIAGRAM - 5 ~ 6
1/2
DP: MAIN (DSP) CIRCUIT: SCHEMATIC DIAGRAM - 7 ~ 8
24 25 26
27 28
A
REG3.3V CP B
DSP_GND
CP
C
D
CS_DSP CP
INTREQ_DSP CP
BUSY_DSP CP
CLK_DSP CP
MISO_DSP
CP
MOSI_DSP CP
RESET_DSP CP
E
CP
CS_CODEC
RESET_CODEC CP
INTREQ_CODEC CP
F
REG5V CP
DSP_SD1
DSP_SD1 CP
G
DSP_SD2
DSP_SD2 CP
DSP_SD3
DSP_SD3 CP
DSP_SCLK
DSP_SCLK CP
DSP_LRCLK
DSP_LRCLK
CP
DSP_MCLK
DSP_MCLK CP
H
SC-HTB550PH (SU-HTB550PH)
2/2
MAIN (DSP) CIRCUIT
27 28