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Table of Contents
Summary of Contents for ASIX OMEGA
- Page 1 OMEGA LOGIC ANALYZER Reference Manual...
- Page 2 ASIX s.r.o. reserves the right to make changes to this document, the latest version of which can be found on the Internet. ASIX s.r.o. renounces responsibility for any damage caused by the use of ASIX s.r.o. products.
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Page 3: Table Of Contents
Controls 3.1 Indicators and button Linking the events window with the analyzer window 3.2 Target Connection Gathering of related communication into trees 4.6 Auxiliary functions Using SIGMA & OMEGA Logic Analyzers Software 4.6.1 Insider 4.6.2 Function Generator 4.1 Clock Source 4.7 Frequency Measuring... - Page 4 6.2.1 Using Synchronization Cable 6.2.2 Interconnection of two Logic Analyzers 6.2.3 Interconnection of three Logic Analyzers 6.2.4 Interconnection of more than three Logic Analyzers 6.3 Synchronization Accuracy Using OMEGA Logic Analyzer under Linux OMEGA and SIGMA2 Comparison Specifications Document history...
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Page 5: General Information
Please inspect the logic analyzer mechanically and electrically upon receiving it. Unpack all items from the OMEGA is a logic analyzer - development tool designated shipping box and check for any obvious signs of physical for tracing and debugging of TTL (and compatible) digital damage that may have occurred during transportation. -
Page 6: Panel Overview
Detailed comparison of the logic analyzers is in the chapter OMEGA and SIGMA2 Comparison. Fig.2: OMEGA Panel Overview Panel Overview OMEGA will use approximately 18.1 bits of memory per 16 input sample. USB port Indication LEDs Multifunction Start/Stop/Trigger button Target interface... -
Page 7: Getting Started
Target connection The OMEGA Logic Analyzer is equipped with 16 high Getting started impedance inputs with logic levels compatible to TTL and auxiliary Trigger In and Trigger Out pins. Before connecting and powering up the logic analyzer, please review and go through all the instructions in this chapter. -
Page 8: Acquire The Data
Acquire the data Start the application ASIX SIGMA & OMEGA Logic Analyzers from start menu and launch the data acquisition by pressing Enter. The OMEGA memory will last most probably for minutes, so you can stop data acquisition any time by pressing button Stop Acquisition Now. -
Page 9: Controls
Fig.5: Target connector ONLINE / BUSY (green/yellow LED) The OMEGA Logic Analyzer is equipped with sixteen high off: OMEGA is in low-power (Sleep) mode or no impedance inputs with TTL input logic levels and 1 MΩ... - Page 10 GO button. Usage of any OMEGA-powered logic level translator is possible thanks to possibility to power it from the logic analyzer using Power Output feature on Trigger In pin.
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Page 11: Using Sigma & Omega Logic Analyzers Software
Analyzers Software Clock Source 4.1.1 Modes of operation OMEGA can operate in one of several modes adapted to actual user needs and particular debugged application (number of inputs, sampling period etc...). The mode of operation can be selected in Settings ➙ Clock source. - Page 12 99.95 MHz. Due to internal pipeline circuits, the clock signal must be present before start of the data acquisition and some time Fig.7: Clock not present on Input 1 during OMEGA after the end of the acquisition otherwise Synchronous Clock Mode several last samples will not be contained in the captured data.
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Page 13: Synchronous Clock Timing
4.1.2 Synchronous Clock Input pins Timing The term input pin refers to physical input of OMEGA Logic Analyzer. The logic analyzer use fixed input threshold levels compatible with TTL or 5V / 3.3V CMOS. If a particular input is not required by user, but its value... -
Page 14: Trigger Settings
Trace move buttons Click the button to move the trace up and down. The shortcut to use the buttons is Shift+↑ and Shift +↓ . Plugin Config Dialog When a decoder is selected as source of the data, the configuration of the decoder can be invoked by pressing the Plugin Config Dialog button. -
Page 15: Basic Trigger Settings
defined combination turns up) or delayed by a counter. 4.4.1 Basic Trigger 4.4.2 Advanced Trigger Settings Settings Advanced trigger settings define the trigger event by a set of boolean expressions in combination with an advanced event and delay counter. Fig.10: Basic Trigger Settings Basic trigger settings define a trigger event as a combination of desired levels and edges on input pins. -
Page 16: Trigger Position Within Acquisition
The value of the counter. Due to a prescaler, the hardware. If the expression is too complex to be value may be rounded to nearest value achievable implemented in the OMEGA Logic Analyzer hardware, an with the prescaler. exclamation icon appears to indicate this fact. -
Page 17: External Triggering
±1%. • During acquisition. 4.4.4 External Triggering • During acquisition after it has been triggered. The OMEGA Logic Analyzer comes with Trigger In and Min. Typ. Max. Trigger Out pins (on the SIGCAB20 cable described as TI and TO). The Trigger Out can be configured as input low voltage 3.3V CMOS output with negative or positive polarity or as... -
Page 18: 4.4.6 Amount Of Triggers
(e.g. rise edge of a communication clock) is highly discouraged in the real-time mode because the When using OMEGA Real-Time Mode, the trigger is being trigger is stored in the FIFO and consumes significant detected and stored during whole acquisition, not only for amount of the buffer. -
Page 19: Working With The Acquired Data
Working with the 4.5.1 Navigation and analysis acquired data Navigation in the main viewer can be controlled by keyboard, mouse or by a combination of both. Action Key or mouse action Viewer window sliding along the ← or → time axis mouse wheel Ctrl and mouse move Zoom... -
Page 20: Uart Protocol Decoder
Fig.15: UART Decoder Several options can be set up: Input The input pin. Line Polarity The polarity of the line. This is useful when using direct connection of voltage limited RS-232 (be aware of maximum ratings on OMEGA pins). Page 20... -
Page 21: 4.5.3 Spi Bus Decoder
Start Bit Inversion The polarity of the start bit and idle bus logic level. Stop Bit Inversion The polarity of the stop bit. Bit Frames Visibility This option enables display of bit frames. Data Bits The number of start bits can be configured from 1 to 16. -
Page 22: Usb 1.1 Analyzer Plugin
For setting up the license 1.1 signals. Reading of the USB specification is highly hit License ➙ Install New License... in ASIX SIGMA & recommended before using the USB decoder. OMEGA Logic Analyzers application main menu. -
Page 23: What To Measure
The USBprobe includes two 74AHCT125 TTL gates and two USB connectors of type A and B wired so that it acts as a USB extension. The OMEGA Logic Analyzer can be connected before or beyond the buffer, it depends on an application –... -
Page 24: Viewing
events events window (which simultaneously the main window). Viewing After the decoding have finished the list of measured USB events is in the events window. To decrease the number of events in the event window a configurable filter can be applied so that only requested events are displayed. -
Page 25: Searching
Fig.21: Searching Window Fig.20: Window with hidden transactions which are ended with Searching For searching for a specific type of packet or event (Bus Reset, any error, Stuffed Bit) open the Search ➙ Find... menu or hit Ctrl+F and then for another occurrence hit the F3 key. -
Page 26: Linking The Events Window With The Analyzer
This opens Clock Source dialog and allows setup operation mode and number of input pins. The OMEGA Logic Analyzer have some useful auxiliary functions. This functions are controlled all at once using a Setup Inputs gateway dialog Settings ➙ Utilities Setup.. -
Page 27: 4.6.1 Insider
I 2 C Bus Speed device (1 00 kHz / 400 kHz) OMEGA Insider is a tool for real-time sniffing of most I 2 C Bus L ogger I 2 C Bus logger L og all bus I 2 C Bus Speed Any two inputs common busses and streaming them to a TCP/IP port. - Page 28 Fig.26: Example I2C Log in PuTTY window In the picture there is a PuTTY output of an example logging on an I C bus with multiple slave devices. Fig.25: Opening Insider Connection in PuTTY The picture above shows the basic options required to open the connection in the PuTTY terminal application.
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Page 29: 4.6.2 Function Generator
0us 4.6.2 Function Generator ; this line is a comment 1us The OMEGA Logic Analyzer can change the direction of a 2us loop single port (either Inputs 1-8 or Inputs 9-16) and the port The first column contains time from beginning of the file. -
Page 30: Frequency Measuring
Daisy Chain 1 6 I nputs Yes, for all Slave inputs OMEGA Pin View is a logic probe tool for inspecting of the Synchronous 1 5 I nputs + Yes, for all Yes, either I nput 1 Yes, single correct connection of the OMEGA Logic Analyzer. -
Page 31: Using The Application For Automated Acquisition
*.stf, the saved file is in -export • -post 50% STF format. • {-serial sernum}{code] - use OMEGA with this serial Command Line Interface 4.11 number (must be in format A6031234 or 031234) • example: omegacli.exe •... -
Page 32: Data Streaming Using Command Line Interface Omegartmcli.exe
• The first column is a timestamp (5ns units) relative to • {-serial sernum}{code] - use OMEGA with this serial the position of the trigger. number (must be in format A6031234 or 031234) • The second column are pin states, always represented •... -
Page 33: Working With Binary Data Stream Using Binconvert.exe
Input can be STF file acquired and saved using This will filter Input 10 from in.stf and save the result to OMEGA Logic Analyzer in Real-Time mode. Data acquired out.stf. in other modes cannot be converted into data stream. - Page 34 Individual plugins can be enabled or disabled in Settings ➙ Plugins dialog and configured in Settings ➙ Plugin Settings (if applicable). Several plugins are part of the ASIX SIGMA&OMEGA APPLICATION PACKAGE by default. The Plugin API is described in a separate document.
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Page 35: Using The Logic Analyzer
Powering the Analyzer The OMEGA Logic Analyzer is powered directly from a USB bus. The USB bus should provide voltage V = 4.75 to 5.25 V on high-powered ports at maximum current = 500 mA. -
Page 36: Using The Application As A Portable Application
Using the Application Pin number Function Cable Required color as a Portable █ Power Application DATA- █ White USB Data DATA+ █ Green USB Data The logic analyzer application can be used as a portable application. The files required by the application are the █... - Page 37 OMEGA Logic Analyzer default sampling period. If the input changes during this window, data are indeterminate. For V lower than 5.0 V Software not yet started. Slow inputs, no outputs, no power on Trigger In Maximum current claimed to USB bus. If power on Trigger In and digital outputs are drained significantly, this power may be exceeded.
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Page 38: Synchronization
Analyzers from a bus-powered USB hub Synchronization Synchronization Interconnection Two or more OMEGA Logic Analyzers can be connected together with included synchronization header and cable. 6.2.1 Using Each OMEGA Logic Analyzer in synchronization setup can measure 16 inputs with sampling rate 200 Msps. -
Page 39: Interconnection Of Two Logic Analyzers
48 with sampling period 200 Msps. The optimal timing (typical When using more than three OMEGA Logic Analyzers in accuracy ±2 ns) is achieved when the Master logic daisy-chain operation, number of used inputs can be up analyzer is in the middle of the daisy chain and the Slave to 16×n with sampling period 200 Msps. -
Page 40: Synchronization Accuracy
Many bus-powered USB hubs claims themselves as self- analyzers. powered. In case of bus-powered USB hub Windows will deny to power more than one OMEGA Logic Analyzer Note: Please note that when using more than five logic from a single USB port. -
Page 41: Using Omega Logic Analyzer Under Linux
Create a user group (or use in any of the suitable existing groups) which will have access to ASIX USB devices. Add a new file with udev rules to the directory /etc/ The software for the OMEGA Logic Analyzer is capable of (Depending on udev/rules.d /lib/udev/rules.d working under Wine. - Page 42 Install lin_ftd2xx by ASIX into this directory. Installation of the Microsoft™ TrueType core fonts are recommended. These fonts may be obtained by installing msttcorefonts package from Ubuntu package repository. Note: Library libftd2xx requires also access rights during opening of the programmer or logic analyzer to all FTDI serial devices to check that this is not the device it wants to open.
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Page 43: Omega And Sigma2 Comparison
Trigger-In pin 2.4 - triggering) Output max. 100 mA 3.0 V, max. 100 mA Synchronous clock 15 inputs / 15 inputs / Table 14: OMEGA and SIGMA2 comparison mode 49.975 MHz 99.95 MHz Real-Time Available up to 2 operation mode tree nodes Prior to 2011 as SIGMA. -
Page 44: Specifications
Trigger In power output on Trigger In Not applicable in synchronous timing Input Pins Skew Adjustable OMEGA logic analyzers prior to serial number A6030165 pin-to-pin skew within single sksp have degraded clock precision to ±200 ppm port Indoor use only... - Page 45 Page 45...
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Page 46: Document History
Document history Document Modifications made revision 2014-12-18 Initial release of a new version of manual. 2015-04-15 Updated info on parameters of -out and -export of sigmalogan.exe and omegacli.exe. 2016-12-24 Added info about utilites omegacli, omegartmcli, stf2bin, bin2stf, binconvert. 2017-02-10 Updated Linux info Page 46...
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