Interfacing with the Pmod The PmodSSD communicates with the host board via the GPIO protocol. A logic level high signal on a particular anode will light up that respective segment on whichever digit is currently enabled. Users are able to select a particular digit by driving the Digit Selection pin (C) to a logic high or low voltage.
Table 1. Pinout description table. 560 Figure 1. Seven-segment display connection diagram. Any external power applied to the PmodSSD must be within 2.7V and 5.25V; however, it is recommended that Pmod is operated at 3.3V. Physical Dimensions The pins on the pin header are spaced 100 mil apart. The PCB is 1 inch long on the sides parallel to the pins on the pin header and 1.7 inches long on the sides perpendicular to the pin header.
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